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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[linux/fpc-iii.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
blob7e00cbd5ba133320e6fa769491ee00d5b5cfbe70
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
30
31 /* Local includes */
32 #include "i40e.h"
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
35
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
39
40 #define DRV_KERN "-k"
41
42 #define DRV_VERSION_MAJOR 1
43 #define DRV_VERSION_MINOR 6
44 #define DRV_VERSION_BUILD 4
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
50
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
61 u16 rss_table_size, u16 rss_size);
62 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
63 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
64
65 /* i40e_pci_tbl - PCI Device ID Table
66 *
67 * Last entry must be all 0s
68 *
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
71 */
72 static const struct pci_device_id i40e_pci_tbl[] = {
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_I_X722), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
92 /* required last entry */
93 {0, }
94 };
95 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
96
97 #define I40E_MAX_VF_COUNT 128
98 static int debug = -1;
99 module_param(debug, int, 0);
100 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
101
102 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
103 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
104 MODULE_LICENSE("GPL");
105 MODULE_VERSION(DRV_VERSION);
106
107 static struct workqueue_struct *i40e_wq;
108
109 /**
110 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
111 * @hw: pointer to the HW structure
112 * @mem: ptr to mem struct to fill out
113 * @size: size of memory requested
114 * @alignment: what to align the allocation to
115 **/
116 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
117 u64 size, u32 alignment)
118 {
119 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
120
121 mem->size = ALIGN(size, alignment);
122 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
123 &mem->pa, GFP_KERNEL);
124 if (!mem->va)
125 return -ENOMEM;
126
127 return 0;
128 }
129
130 /**
131 * i40e_free_dma_mem_d - OS specific memory free for shared code
132 * @hw: pointer to the HW structure
133 * @mem: ptr to mem struct to free
134 **/
135 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
136 {
137 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
138
139 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
140 mem->va = NULL;
141 mem->pa = 0;
142 mem->size = 0;
143
144 return 0;
145 }
146
147 /**
148 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
149 * @hw: pointer to the HW structure
150 * @mem: ptr to mem struct to fill out
151 * @size: size of memory requested
152 **/
153 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
154 u32 size)
155 {
156 mem->size = size;
157 mem->va = kzalloc(size, GFP_KERNEL);
158
159 if (!mem->va)
160 return -ENOMEM;
161
162 return 0;
163 }
164
165 /**
166 * i40e_free_virt_mem_d - OS specific memory free for shared code
167 * @hw: pointer to the HW structure
168 * @mem: ptr to mem struct to free
169 **/
170 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
171 {
172 /* it's ok to kfree a NULL pointer */
173 kfree(mem->va);
174 mem->va = NULL;
175 mem->size = 0;
176
177 return 0;
178 }
179
180 /**
181 * i40e_get_lump - find a lump of free generic resource
182 * @pf: board private structure
183 * @pile: the pile of resource to search
184 * @needed: the number of items needed
185 * @id: an owner id to stick on the items assigned
186 *
187 * Returns the base item index of the lump, or negative for error
188 *
189 * The search_hint trick and lack of advanced fit-finding only work
190 * because we're highly likely to have all the same size lump requests.
191 * Linear search time and any fragmentation should be minimal.
192 **/
193 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
194 u16 needed, u16 id)
195 {
196 int ret = -ENOMEM;
197 int i, j;
198
199 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
200 dev_info(&pf->pdev->dev,
201 "param err: pile=%p needed=%d id=0x%04x\n",
202 pile, needed, id);
203 return -EINVAL;
204 }
205
206 /* start the linear search with an imperfect hint */
207 i = pile->search_hint;
208 while (i < pile->num_entries) {
209 /* skip already allocated entries */
210 if (pile->list[i] & I40E_PILE_VALID_BIT) {
211 i++;
212 continue;
213 }
214
215 /* do we have enough in this lump? */
216 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
217 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
218 break;
219 }
220
221 if (j == needed) {
222 /* there was enough, so assign it to the requestor */
223 for (j = 0; j < needed; j++)
224 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
225 ret = i;
226 pile->search_hint = i + j;
227 break;
228 }
229
230 /* not enough, so skip over it and continue looking */
231 i += j;
232 }
233
234 return ret;
235 }
236
237 /**
238 * i40e_put_lump - return a lump of generic resource
239 * @pile: the pile of resource to search
240 * @index: the base item index
241 * @id: the owner id of the items assigned
242 *
243 * Returns the count of items in the lump
244 **/
245 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
246 {
247 int valid_id = (id | I40E_PILE_VALID_BIT);
248 int count = 0;
249 int i;
250
251 if (!pile || index >= pile->num_entries)
252 return -EINVAL;
253
254 for (i = index;
255 i < pile->num_entries && pile->list[i] == valid_id;
256 i++) {
257 pile->list[i] = 0;
258 count++;
259 }
260
261 if (count && index < pile->search_hint)
262 pile->search_hint = index;
263
264 return count;
265 }
266
267 /**
268 * i40e_find_vsi_from_id - searches for the vsi with the given id
269 * @pf - the pf structure to search for the vsi
270 * @id - id of the vsi it is searching for
271 **/
272 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
273 {
274 int i;
275
276 for (i = 0; i < pf->num_alloc_vsi; i++)
277 if (pf->vsi[i] && (pf->vsi[i]->id == id))
278 return pf->vsi[i];
279
280 return NULL;
281 }
282
283 /**
284 * i40e_service_event_schedule - Schedule the service task to wake up
285 * @pf: board private structure
286 *
287 * If not already scheduled, this puts the task into the work queue
288 **/
289 void i40e_service_event_schedule(struct i40e_pf *pf)
290 {
291 if (!test_bit(__I40E_DOWN, &pf->state) &&
292 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
293 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
294 queue_work(i40e_wq, &pf->service_task);
295 }
296
297 /**
298 * i40e_tx_timeout - Respond to a Tx Hang
299 * @netdev: network interface device structure
300 *
301 * If any port has noticed a Tx timeout, it is likely that the whole
302 * device is munged, not just the one netdev port, so go for the full
303 * reset.
304 **/
305 #ifdef I40E_FCOE
306 void i40e_tx_timeout(struct net_device *netdev)
307 #else
308 static void i40e_tx_timeout(struct net_device *netdev)
309 #endif
310 {
311 struct i40e_netdev_priv *np = netdev_priv(netdev);
312 struct i40e_vsi *vsi = np->vsi;
313 struct i40e_pf *pf = vsi->back;
314 struct i40e_ring *tx_ring = NULL;
315 unsigned int i, hung_queue = 0;
316 u32 head, val;
317
318 pf->tx_timeout_count++;
319
320 /* find the stopped queue the same way the stack does */
321 for (i = 0; i < netdev->num_tx_queues; i++) {
322 struct netdev_queue *q;
323 unsigned long trans_start;
324
325 q = netdev_get_tx_queue(netdev, i);
326 trans_start = q->trans_start;
327 if (netif_xmit_stopped(q) &&
328 time_after(jiffies,
329 (trans_start + netdev->watchdog_timeo))) {
330 hung_queue = i;
331 break;
332 }
333 }
334
335 if (i == netdev->num_tx_queues) {
336 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
337 } else {
338 /* now that we have an index, find the tx_ring struct */
339 for (i = 0; i < vsi->num_queue_pairs; i++) {
340 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
341 if (hung_queue ==
342 vsi->tx_rings[i]->queue_index) {
343 tx_ring = vsi->tx_rings[i];
344 break;
345 }
346 }
347 }
348 }
349
350 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
351 pf->tx_timeout_recovery_level = 1; /* reset after some time */
352 else if (time_before(jiffies,
353 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
354 return; /* don't do any new action before the next timeout */
355
356 if (tx_ring) {
357 head = i40e_get_head(tx_ring);
358 /* Read interrupt register */
359 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
360 val = rd32(&pf->hw,
361 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
362 tx_ring->vsi->base_vector - 1));
363 else
364 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
365
366 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
367 vsi->seid, hung_queue, tx_ring->next_to_clean,
368 head, tx_ring->next_to_use,
369 readl(tx_ring->tail), val);
370 }
371
372 pf->tx_timeout_last_recovery = jiffies;
373 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
374 pf->tx_timeout_recovery_level, hung_queue);
375
376 switch (pf->tx_timeout_recovery_level) {
377 case 1:
378 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
379 break;
380 case 2:
381 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
382 break;
383 case 3:
384 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
385 break;
386 default:
387 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
388 break;
389 }
390
391 i40e_service_event_schedule(pf);
392 pf->tx_timeout_recovery_level++;
393 }
394
395 /**
396 * i40e_get_vsi_stats_struct - Get System Network Statistics
397 * @vsi: the VSI we care about
398 *
399 * Returns the address of the device statistics structure.
400 * The statistics are actually updated from the service task.
401 **/
402 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
403 {
404 return &vsi->net_stats;
405 }
406
407 /**
408 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
409 * @netdev: network interface device structure
410 *
411 * Returns the address of the device statistics structure.
412 * The statistics are actually updated from the service task.
413 **/
414 #ifdef I40E_FCOE
415 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
416 struct net_device *netdev,
417 struct rtnl_link_stats64 *stats)
418 #else
419 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
420 struct net_device *netdev,
421 struct rtnl_link_stats64 *stats)
422 #endif
423 {
424 struct i40e_netdev_priv *np = netdev_priv(netdev);
425 struct i40e_ring *tx_ring, *rx_ring;
426 struct i40e_vsi *vsi = np->vsi;
427 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
428 int i;
429
430 if (test_bit(__I40E_DOWN, &vsi->state))
431 return stats;
432
433 if (!vsi->tx_rings)
434 return stats;
435
436 rcu_read_lock();
437 for (i = 0; i < vsi->num_queue_pairs; i++) {
438 u64 bytes, packets;
439 unsigned int start;
440
441 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
442 if (!tx_ring)
443 continue;
444
445 do {
446 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
447 packets = tx_ring->stats.packets;
448 bytes = tx_ring->stats.bytes;
449 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
450
451 stats->tx_packets += packets;
452 stats->tx_bytes += bytes;
453 rx_ring = &tx_ring[1];
454
455 do {
456 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
457 packets = rx_ring->stats.packets;
458 bytes = rx_ring->stats.bytes;
459 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
460
461 stats->rx_packets += packets;
462 stats->rx_bytes += bytes;
463 }
464 rcu_read_unlock();
465
466 /* following stats updated by i40e_watchdog_subtask() */
467 stats->multicast = vsi_stats->multicast;
468 stats->tx_errors = vsi_stats->tx_errors;
469 stats->tx_dropped = vsi_stats->tx_dropped;
470 stats->rx_errors = vsi_stats->rx_errors;
471 stats->rx_dropped = vsi_stats->rx_dropped;
472 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
473 stats->rx_length_errors = vsi_stats->rx_length_errors;
474
475 return stats;
476 }
477
478 /**
479 * i40e_vsi_reset_stats - Resets all stats of the given vsi
480 * @vsi: the VSI to have its stats reset
481 **/
482 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
483 {
484 struct rtnl_link_stats64 *ns;
485 int i;
486
487 if (!vsi)
488 return;
489
490 ns = i40e_get_vsi_stats_struct(vsi);
491 memset(ns, 0, sizeof(*ns));
492 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
493 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
494 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
495 if (vsi->rx_rings && vsi->rx_rings[0]) {
496 for (i = 0; i < vsi->num_queue_pairs; i++) {
497 memset(&vsi->rx_rings[i]->stats, 0,
498 sizeof(vsi->rx_rings[i]->stats));
499 memset(&vsi->rx_rings[i]->rx_stats, 0,
500 sizeof(vsi->rx_rings[i]->rx_stats));
501 memset(&vsi->tx_rings[i]->stats, 0,
502 sizeof(vsi->tx_rings[i]->stats));
503 memset(&vsi->tx_rings[i]->tx_stats, 0,
504 sizeof(vsi->tx_rings[i]->tx_stats));
505 }
506 }
507 vsi->stat_offsets_loaded = false;
508 }
509
510 /**
511 * i40e_pf_reset_stats - Reset all of the stats for the given PF
512 * @pf: the PF to be reset
513 **/
514 void i40e_pf_reset_stats(struct i40e_pf *pf)
515 {
516 int i;
517
518 memset(&pf->stats, 0, sizeof(pf->stats));
519 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
520 pf->stat_offsets_loaded = false;
521
522 for (i = 0; i < I40E_MAX_VEB; i++) {
523 if (pf->veb[i]) {
524 memset(&pf->veb[i]->stats, 0,
525 sizeof(pf->veb[i]->stats));
526 memset(&pf->veb[i]->stats_offsets, 0,
527 sizeof(pf->veb[i]->stats_offsets));
528 pf->veb[i]->stat_offsets_loaded = false;
529 }
530 }
531 }
532
533 /**
534 * i40e_stat_update48 - read and update a 48 bit stat from the chip
535 * @hw: ptr to the hardware info
536 * @hireg: the high 32 bit reg to read
537 * @loreg: the low 32 bit reg to read
538 * @offset_loaded: has the initial offset been loaded yet
539 * @offset: ptr to current offset value
540 * @stat: ptr to the stat
541 *
542 * Since the device stats are not reset at PFReset, they likely will not
543 * be zeroed when the driver starts. We'll save the first values read
544 * and use them as offsets to be subtracted from the raw values in order
545 * to report stats that count from zero. In the process, we also manage
546 * the potential roll-over.
547 **/
548 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
549 bool offset_loaded, u64 *offset, u64 *stat)
550 {
551 u64 new_data;
552
553 if (hw->device_id == I40E_DEV_ID_QEMU) {
554 new_data = rd32(hw, loreg);
555 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
556 } else {
557 new_data = rd64(hw, loreg);
558 }
559 if (!offset_loaded)
560 *offset = new_data;
561 if (likely(new_data >= *offset))
562 *stat = new_data - *offset;
563 else
564 *stat = (new_data + BIT_ULL(48)) - *offset;
565 *stat &= 0xFFFFFFFFFFFFULL;
566 }
567
568 /**
569 * i40e_stat_update32 - read and update a 32 bit stat from the chip
570 * @hw: ptr to the hardware info
571 * @reg: the hw reg to read
572 * @offset_loaded: has the initial offset been loaded yet
573 * @offset: ptr to current offset value
574 * @stat: ptr to the stat
575 **/
576 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
577 bool offset_loaded, u64 *offset, u64 *stat)
578 {
579 u32 new_data;
580
581 new_data = rd32(hw, reg);
582 if (!offset_loaded)
583 *offset = new_data;
584 if (likely(new_data >= *offset))
585 *stat = (u32)(new_data - *offset);
586 else
587 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
588 }
589
590 /**
591 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
592 * @vsi: the VSI to be updated
593 **/
594 void i40e_update_eth_stats(struct i40e_vsi *vsi)
595 {
596 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
597 struct i40e_pf *pf = vsi->back;
598 struct i40e_hw *hw = &pf->hw;
599 struct i40e_eth_stats *oes;
600 struct i40e_eth_stats *es; /* device's eth stats */
601
602 es = &vsi->eth_stats;
603 oes = &vsi->eth_stats_offsets;
604
605 /* Gather up the stats that the hw collects */
606 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
607 vsi->stat_offsets_loaded,
608 &oes->tx_errors, &es->tx_errors);
609 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
610 vsi->stat_offsets_loaded,
611 &oes->rx_discards, &es->rx_discards);
612 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
613 vsi->stat_offsets_loaded,
614 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618
619 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
620 I40E_GLV_GORCL(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_bytes, &es->rx_bytes);
623 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
624 I40E_GLV_UPRCL(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->rx_unicast, &es->rx_unicast);
627 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
628 I40E_GLV_MPRCL(stat_idx),
629 vsi->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
632 I40E_GLV_BPRCL(stat_idx),
633 vsi->stat_offsets_loaded,
634 &oes->rx_broadcast, &es->rx_broadcast);
635
636 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
637 I40E_GLV_GOTCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->tx_bytes, &es->tx_bytes);
640 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
641 I40E_GLV_UPTCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_unicast, &es->tx_unicast);
644 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
645 I40E_GLV_MPTCL(stat_idx),
646 vsi->stat_offsets_loaded,
647 &oes->tx_multicast, &es->tx_multicast);
648 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
649 I40E_GLV_BPTCL(stat_idx),
650 vsi->stat_offsets_loaded,
651 &oes->tx_broadcast, &es->tx_broadcast);
652 vsi->stat_offsets_loaded = true;
653 }
654
655 /**
656 * i40e_update_veb_stats - Update Switch component statistics
657 * @veb: the VEB being updated
658 **/
659 static void i40e_update_veb_stats(struct i40e_veb *veb)
660 {
661 struct i40e_pf *pf = veb->pf;
662 struct i40e_hw *hw = &pf->hw;
663 struct i40e_eth_stats *oes;
664 struct i40e_eth_stats *es; /* device's eth stats */
665 struct i40e_veb_tc_stats *veb_oes;
666 struct i40e_veb_tc_stats *veb_es;
667 int i, idx = 0;
668
669 idx = veb->stats_idx;
670 es = &veb->stats;
671 oes = &veb->stats_offsets;
672 veb_es = &veb->tc_stats;
673 veb_oes = &veb->tc_stats_offsets;
674
675 /* Gather up the stats that the hw collects */
676 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
677 veb->stat_offsets_loaded,
678 &oes->tx_discards, &es->tx_discards);
679 if (hw->revision_id > 0)
680 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
681 veb->stat_offsets_loaded,
682 &oes->rx_unknown_protocol,
683 &es->rx_unknown_protocol);
684 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
685 veb->stat_offsets_loaded,
686 &oes->rx_bytes, &es->rx_bytes);
687 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
688 veb->stat_offsets_loaded,
689 &oes->rx_unicast, &es->rx_unicast);
690 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
691 veb->stat_offsets_loaded,
692 &oes->rx_multicast, &es->rx_multicast);
693 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_broadcast, &es->rx_broadcast);
696
697 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
698 veb->stat_offsets_loaded,
699 &oes->tx_bytes, &es->tx_bytes);
700 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
701 veb->stat_offsets_loaded,
702 &oes->tx_unicast, &es->tx_unicast);
703 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
704 veb->stat_offsets_loaded,
705 &oes->tx_multicast, &es->tx_multicast);
706 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_broadcast, &es->tx_broadcast);
709 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
710 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
711 I40E_GLVEBTC_RPCL(i, idx),
712 veb->stat_offsets_loaded,
713 &veb_oes->tc_rx_packets[i],
714 &veb_es->tc_rx_packets[i]);
715 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
716 I40E_GLVEBTC_RBCL(i, idx),
717 veb->stat_offsets_loaded,
718 &veb_oes->tc_rx_bytes[i],
719 &veb_es->tc_rx_bytes[i]);
720 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
721 I40E_GLVEBTC_TPCL(i, idx),
722 veb->stat_offsets_loaded,
723 &veb_oes->tc_tx_packets[i],
724 &veb_es->tc_tx_packets[i]);
725 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
726 I40E_GLVEBTC_TBCL(i, idx),
727 veb->stat_offsets_loaded,
728 &veb_oes->tc_tx_bytes[i],
729 &veb_es->tc_tx_bytes[i]);
730 }
731 veb->stat_offsets_loaded = true;
732 }
733
734 #ifdef I40E_FCOE
735 /**
736 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
737 * @vsi: the VSI that is capable of doing FCoE
738 **/
739 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
740 {
741 struct i40e_pf *pf = vsi->back;
742 struct i40e_hw *hw = &pf->hw;
743 struct i40e_fcoe_stats *ofs;
744 struct i40e_fcoe_stats *fs; /* device's eth stats */
745 int idx;
746
747 if (vsi->type != I40E_VSI_FCOE)
748 return;
749
750 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
751 fs = &vsi->fcoe_stats;
752 ofs = &vsi->fcoe_stats_offsets;
753
754 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
755 vsi->fcoe_stat_offsets_loaded,
756 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
757 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
758 vsi->fcoe_stat_offsets_loaded,
759 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
760 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
761 vsi->fcoe_stat_offsets_loaded,
762 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
763 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
772 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->fcoe_last_error, &fs->fcoe_last_error);
775 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
778
779 vsi->fcoe_stat_offsets_loaded = true;
780 }
781
782 #endif
783 /**
784 * i40e_update_vsi_stats - Update the vsi statistics counters.
785 * @vsi: the VSI to be updated
786 *
787 * There are a few instances where we store the same stat in a
788 * couple of different structs. This is partly because we have
789 * the netdev stats that need to be filled out, which is slightly
790 * different from the "eth_stats" defined by the chip and used in
791 * VF communications. We sort it out here.
792 **/
793 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
794 {
795 struct i40e_pf *pf = vsi->back;
796 struct rtnl_link_stats64 *ons;
797 struct rtnl_link_stats64 *ns; /* netdev stats */
798 struct i40e_eth_stats *oes;
799 struct i40e_eth_stats *es; /* device's eth stats */
800 u32 tx_restart, tx_busy;
801 u64 tx_lost_interrupt;
802 struct i40e_ring *p;
803 u32 rx_page, rx_buf;
804 u64 bytes, packets;
805 unsigned int start;
806 u64 tx_linearize;
807 u64 tx_force_wb;
808 u64 rx_p, rx_b;
809 u64 tx_p, tx_b;
810 u16 q;
811
812 if (test_bit(__I40E_DOWN, &vsi->state) ||
813 test_bit(__I40E_CONFIG_BUSY, &pf->state))
814 return;
815
816 ns = i40e_get_vsi_stats_struct(vsi);
817 ons = &vsi->net_stats_offsets;
818 es = &vsi->eth_stats;
819 oes = &vsi->eth_stats_offsets;
820
821 /* Gather up the netdev and vsi stats that the driver collects
822 * on the fly during packet processing
823 */
824 rx_b = rx_p = 0;
825 tx_b = tx_p = 0;
826 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
827 tx_lost_interrupt = 0;
828 rx_page = 0;
829 rx_buf = 0;
830 rcu_read_lock();
831 for (q = 0; q < vsi->num_queue_pairs; q++) {
832 /* locate Tx ring */
833 p = ACCESS_ONCE(vsi->tx_rings[q]);
834
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 packets = p->stats.packets;
838 bytes = p->stats.bytes;
839 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
840 tx_b += bytes;
841 tx_p += packets;
842 tx_restart += p->tx_stats.restart_queue;
843 tx_busy += p->tx_stats.tx_busy;
844 tx_linearize += p->tx_stats.tx_linearize;
845 tx_force_wb += p->tx_stats.tx_force_wb;
846 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
847
848 /* Rx queue is part of the same block as Tx queue */
849 p = &p[1];
850 do {
851 start = u64_stats_fetch_begin_irq(&p->syncp);
852 packets = p->stats.packets;
853 bytes = p->stats.bytes;
854 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
855 rx_b += bytes;
856 rx_p += packets;
857 rx_buf += p->rx_stats.alloc_buff_failed;
858 rx_page += p->rx_stats.alloc_page_failed;
859 }
860 rcu_read_unlock();
861 vsi->tx_restart = tx_restart;
862 vsi->tx_busy = tx_busy;
863 vsi->tx_linearize = tx_linearize;
864 vsi->tx_force_wb = tx_force_wb;
865 vsi->tx_lost_interrupt = tx_lost_interrupt;
866 vsi->rx_page_failed = rx_page;
867 vsi->rx_buf_failed = rx_buf;
868
869 ns->rx_packets = rx_p;
870 ns->rx_bytes = rx_b;
871 ns->tx_packets = tx_p;
872 ns->tx_bytes = tx_b;
873
874 /* update netdev stats from eth stats */
875 i40e_update_eth_stats(vsi);
876 ons->tx_errors = oes->tx_errors;
877 ns->tx_errors = es->tx_errors;
878 ons->multicast = oes->rx_multicast;
879 ns->multicast = es->rx_multicast;
880 ons->rx_dropped = oes->rx_discards;
881 ns->rx_dropped = es->rx_discards;
882 ons->tx_dropped = oes->tx_discards;
883 ns->tx_dropped = es->tx_discards;
884
885 /* pull in a couple PF stats if this is the main vsi */
886 if (vsi == pf->vsi[pf->lan_vsi]) {
887 ns->rx_crc_errors = pf->stats.crc_errors;
888 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
889 ns->rx_length_errors = pf->stats.rx_length_errors;
890 }
891 }
892
893 /**
894 * i40e_update_pf_stats - Update the PF statistics counters.
895 * @pf: the PF to be updated
896 **/
897 static void i40e_update_pf_stats(struct i40e_pf *pf)
898 {
899 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
900 struct i40e_hw_port_stats *nsd = &pf->stats;
901 struct i40e_hw *hw = &pf->hw;
902 u32 val;
903 int i;
904
905 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
906 I40E_GLPRT_GORCL(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
909 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
910 I40E_GLPRT_GOTCL(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
913 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
914 pf->stat_offsets_loaded,
915 &osd->eth.rx_discards,
916 &nsd->eth.rx_discards);
917 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
918 I40E_GLPRT_UPRCL(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_unicast,
921 &nsd->eth.rx_unicast);
922 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
923 I40E_GLPRT_MPRCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_multicast,
926 &nsd->eth.rx_multicast);
927 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
928 I40E_GLPRT_BPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_broadcast,
931 &nsd->eth.rx_broadcast);
932 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
933 I40E_GLPRT_UPTCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.tx_unicast,
936 &nsd->eth.tx_unicast);
937 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
938 I40E_GLPRT_MPTCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.tx_multicast,
941 &nsd->eth.tx_multicast);
942 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
943 I40E_GLPRT_BPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_broadcast,
946 &nsd->eth.tx_broadcast);
947
948 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->tx_dropped_link_down,
951 &nsd->tx_dropped_link_down);
952
953 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->crc_errors, &nsd->crc_errors);
956
957 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->illegal_bytes, &nsd->illegal_bytes);
960
961 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->mac_local_faults,
964 &nsd->mac_local_faults);
965 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
966 pf->stat_offsets_loaded,
967 &osd->mac_remote_faults,
968 &nsd->mac_remote_faults);
969
970 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_length_errors,
973 &nsd->rx_length_errors);
974
975 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->link_xon_rx, &nsd->link_xon_rx);
978 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->link_xon_tx, &nsd->link_xon_tx);
981 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->link_xoff_rx, &nsd->link_xoff_rx);
984 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->link_xoff_tx, &nsd->link_xoff_tx);
987
988 for (i = 0; i < 8; i++) {
989 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
990 pf->stat_offsets_loaded,
991 &osd->priority_xoff_rx[i],
992 &nsd->priority_xoff_rx[i]);
993 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
994 pf->stat_offsets_loaded,
995 &osd->priority_xon_rx[i],
996 &nsd->priority_xon_rx[i]);
997 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
998 pf->stat_offsets_loaded,
999 &osd->priority_xon_tx[i],
1000 &nsd->priority_xon_tx[i]);
1001 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1002 pf->stat_offsets_loaded,
1003 &osd->priority_xoff_tx[i],
1004 &nsd->priority_xoff_tx[i]);
1005 i40e_stat_update32(hw,
1006 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1007 pf->stat_offsets_loaded,
1008 &osd->priority_xon_2_xoff[i],
1009 &nsd->priority_xon_2_xoff[i]);
1010 }
1011
1012 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1013 I40E_GLPRT_PRC64L(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->rx_size_64, &nsd->rx_size_64);
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1017 I40E_GLPRT_PRC127L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_127, &nsd->rx_size_127);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1021 I40E_GLPRT_PRC255L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_255, &nsd->rx_size_255);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1025 I40E_GLPRT_PRC511L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_511, &nsd->rx_size_511);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1029 I40E_GLPRT_PRC1023L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_1023, &nsd->rx_size_1023);
1032 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1033 I40E_GLPRT_PRC1522L(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_size_1522, &nsd->rx_size_1522);
1036 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1037 I40E_GLPRT_PRC9522L(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_size_big, &nsd->rx_size_big);
1040
1041 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1042 I40E_GLPRT_PTC64L(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->tx_size_64, &nsd->tx_size_64);
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1046 I40E_GLPRT_PTC127L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_127, &nsd->tx_size_127);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1050 I40E_GLPRT_PTC255L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_255, &nsd->tx_size_255);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1054 I40E_GLPRT_PTC511L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_511, &nsd->tx_size_511);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1058 I40E_GLPRT_PTC1023L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_1023, &nsd->tx_size_1023);
1061 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1062 I40E_GLPRT_PTC1522L(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->tx_size_1522, &nsd->tx_size_1522);
1065 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1066 I40E_GLPRT_PTC9522L(hw->port),
1067 pf->stat_offsets_loaded,
1068 &osd->tx_size_big, &nsd->tx_size_big);
1069
1070 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1071 pf->stat_offsets_loaded,
1072 &osd->rx_undersize, &nsd->rx_undersize);
1073 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1074 pf->stat_offsets_loaded,
1075 &osd->rx_fragments, &nsd->rx_fragments);
1076 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->rx_oversize, &nsd->rx_oversize);
1079 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1080 pf->stat_offsets_loaded,
1081 &osd->rx_jabber, &nsd->rx_jabber);
1082
1083 /* FDIR stats */
1084 i40e_stat_update32(hw,
1085 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1086 pf->stat_offsets_loaded,
1087 &osd->fd_atr_match, &nsd->fd_atr_match);
1088 i40e_stat_update32(hw,
1089 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1090 pf->stat_offsets_loaded,
1091 &osd->fd_sb_match, &nsd->fd_sb_match);
1092 i40e_stat_update32(hw,
1093 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1094 pf->stat_offsets_loaded,
1095 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1096
1097 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1098 nsd->tx_lpi_status =
1099 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1100 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1101 nsd->rx_lpi_status =
1102 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1103 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1104 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1105 pf->stat_offsets_loaded,
1106 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1107 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1108 pf->stat_offsets_loaded,
1109 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1110
1111 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1112 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1113 nsd->fd_sb_status = true;
1114 else
1115 nsd->fd_sb_status = false;
1116
1117 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1118 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1119 nsd->fd_atr_status = true;
1120 else
1121 nsd->fd_atr_status = false;
1122
1123 pf->stat_offsets_loaded = true;
1124 }
1125
1126 /**
1127 * i40e_update_stats - Update the various statistics counters.
1128 * @vsi: the VSI to be updated
1129 *
1130 * Update the various stats for this VSI and its related entities.
1131 **/
1132 void i40e_update_stats(struct i40e_vsi *vsi)
1133 {
1134 struct i40e_pf *pf = vsi->back;
1135
1136 if (vsi == pf->vsi[pf->lan_vsi])
1137 i40e_update_pf_stats(pf);
1138
1139 i40e_update_vsi_stats(vsi);
1140 #ifdef I40E_FCOE
1141 i40e_update_fcoe_stats(vsi);
1142 #endif
1143 }
1144
1145 /**
1146 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1147 * @vsi: the VSI to be searched
1148 * @macaddr: the MAC address
1149 * @vlan: the vlan
1150 * @is_vf: make sure its a VF filter, else doesn't matter
1151 * @is_netdev: make sure its a netdev filter, else doesn't matter
1152 *
1153 * Returns ptr to the filter object or NULL
1154 **/
1155 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1156 u8 *macaddr, s16 vlan,
1157 bool is_vf, bool is_netdev)
1158 {
1159 struct i40e_mac_filter *f;
1160
1161 if (!vsi || !macaddr)
1162 return NULL;
1163
1164 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1165 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1166 (vlan == f->vlan) &&
1167 (!is_vf || f->is_vf) &&
1168 (!is_netdev || f->is_netdev))
1169 return f;
1170 }
1171 return NULL;
1172 }
1173
1174 /**
1175 * i40e_find_mac - Find a mac addr in the macvlan filters list
1176 * @vsi: the VSI to be searched
1177 * @macaddr: the MAC address we are searching for
1178 * @is_vf: make sure its a VF filter, else doesn't matter
1179 * @is_netdev: make sure its a netdev filter, else doesn't matter
1180 *
1181 * Returns the first filter with the provided MAC address or NULL if
1182 * MAC address was not found
1183 **/
1184 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1185 bool is_vf, bool is_netdev)
1186 {
1187 struct i40e_mac_filter *f;
1188
1189 if (!vsi || !macaddr)
1190 return NULL;
1191
1192 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1193 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1194 (!is_vf || f->is_vf) &&
1195 (!is_netdev || f->is_netdev))
1196 return f;
1197 }
1198 return NULL;
1199 }
1200
1201 /**
1202 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1203 * @vsi: the VSI to be searched
1204 *
1205 * Returns true if VSI is in vlan mode or false otherwise
1206 **/
1207 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1208 {
1209 struct i40e_mac_filter *f;
1210
1211 /* Only -1 for all the filters denotes not in vlan mode
1212 * so we have to go through all the list in order to make sure
1213 */
1214 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1215 if (f->vlan >= 0 || vsi->info.pvid)
1216 return true;
1217 }
1218
1219 return false;
1220 }
1221
1222 /**
1223 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1224 * @vsi: the VSI to be searched
1225 * @macaddr: the mac address to be filtered
1226 * @is_vf: true if it is a VF
1227 * @is_netdev: true if it is a netdev
1228 *
1229 * Goes through all the macvlan filters and adds a
1230 * macvlan filter for each unique vlan that already exists
1231 *
1232 * Returns first filter found on success, else NULL
1233 **/
1234 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1235 bool is_vf, bool is_netdev)
1236 {
1237 struct i40e_mac_filter *f;
1238
1239 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1240 if (vsi->info.pvid)
1241 f->vlan = le16_to_cpu(vsi->info.pvid);
1242 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1243 is_vf, is_netdev)) {
1244 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1245 is_vf, is_netdev))
1246 return NULL;
1247 }
1248 }
1249
1250 return list_first_entry_or_null(&vsi->mac_filter_list,
1251 struct i40e_mac_filter, list);
1252 }
1253
1254 /**
1255 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1256 * @vsi: the VSI to be searched
1257 * @macaddr: the mac address to be removed
1258 * @is_vf: true if it is a VF
1259 * @is_netdev: true if it is a netdev
1260 *
1261 * Removes a given MAC address from a VSI, regardless of VLAN
1262 *
1263 * Returns 0 for success, or error
1264 **/
1265 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1266 bool is_vf, bool is_netdev)
1267 {
1268 struct i40e_mac_filter *f = NULL;
1269 int changed = 0;
1270
1271 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1272 "Missing mac_filter_list_lock\n");
1273 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1274 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1275 (is_vf == f->is_vf) &&
1276 (is_netdev == f->is_netdev)) {
1277 f->counter--;
1278 f->changed = true;
1279 changed = 1;
1280 }
1281 }
1282 if (changed) {
1283 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1284 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1285 return 0;
1286 }
1287 return -ENOENT;
1288 }
1289
1290 /**
1291 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1292 * @vsi: the PF Main VSI - inappropriate for any other VSI
1293 * @macaddr: the MAC address
1294 *
1295 * Some older firmware configurations set up a default promiscuous VLAN
1296 * filter that needs to be removed.
1297 **/
1298 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1299 {
1300 struct i40e_aqc_remove_macvlan_element_data element;
1301 struct i40e_pf *pf = vsi->back;
1302 i40e_status ret;
1303
1304 /* Only appropriate for the PF main VSI */
1305 if (vsi->type != I40E_VSI_MAIN)
1306 return -EINVAL;
1307
1308 memset(&element, 0, sizeof(element));
1309 ether_addr_copy(element.mac_addr, macaddr);
1310 element.vlan_tag = 0;
1311 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1312 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1313 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1314 if (ret)
1315 return -ENOENT;
1316
1317 return 0;
1318 }
1319
1320 /**
1321 * i40e_add_filter - Add a mac/vlan filter to the VSI
1322 * @vsi: the VSI to be searched
1323 * @macaddr: the MAC address
1324 * @vlan: the vlan
1325 * @is_vf: make sure its a VF filter, else doesn't matter
1326 * @is_netdev: make sure its a netdev filter, else doesn't matter
1327 *
1328 * Returns ptr to the filter object or NULL when no memory available.
1329 *
1330 * NOTE: This function is expected to be called with mac_filter_list_lock
1331 * being held.
1332 **/
1333 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1334 u8 *macaddr, s16 vlan,
1335 bool is_vf, bool is_netdev)
1336 {
1337 struct i40e_mac_filter *f;
1338
1339 if (!vsi || !macaddr)
1340 return NULL;
1341
1342 /* Do not allow broadcast filter to be added since broadcast filter
1343 * is added as part of add VSI for any newly created VSI except
1344 * FDIR VSI
1345 */
1346 if (is_broadcast_ether_addr(macaddr))
1347 return NULL;
1348
1349 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1350 if (!f) {
1351 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1352 if (!f)
1353 goto add_filter_out;
1354
1355 ether_addr_copy(f->macaddr, macaddr);
1356 f->vlan = vlan;
1357 f->changed = true;
1358
1359 INIT_LIST_HEAD(&f->list);
1360 list_add_tail(&f->list, &vsi->mac_filter_list);
1361 }
1362
1363 /* increment counter and add a new flag if needed */
1364 if (is_vf) {
1365 if (!f->is_vf) {
1366 f->is_vf = true;
1367 f->counter++;
1368 }
1369 } else if (is_netdev) {
1370 if (!f->is_netdev) {
1371 f->is_netdev = true;
1372 f->counter++;
1373 }
1374 } else {
1375 f->counter++;
1376 }
1377
1378 /* changed tells sync_filters_subtask to
1379 * push the filter down to the firmware
1380 */
1381 if (f->changed) {
1382 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1383 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1384 }
1385
1386 add_filter_out:
1387 return f;
1388 }
1389
1390 /**
1391 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1392 * @vsi: the VSI to be searched
1393 * @macaddr: the MAC address
1394 * @vlan: the vlan
1395 * @is_vf: make sure it's a VF filter, else doesn't matter
1396 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1397 *
1398 * NOTE: This function is expected to be called with mac_filter_list_lock
1399 * being held.
1400 **/
1401 void i40e_del_filter(struct i40e_vsi *vsi,
1402 u8 *macaddr, s16 vlan,
1403 bool is_vf, bool is_netdev)
1404 {
1405 struct i40e_mac_filter *f;
1406
1407 if (!vsi || !macaddr)
1408 return;
1409
1410 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1411 if (!f || f->counter == 0)
1412 return;
1413
1414 if (is_vf) {
1415 if (f->is_vf) {
1416 f->is_vf = false;
1417 f->counter--;
1418 }
1419 } else if (is_netdev) {
1420 if (f->is_netdev) {
1421 f->is_netdev = false;
1422 f->counter--;
1423 }
1424 } else {
1425 /* make sure we don't remove a filter in use by VF or netdev */
1426 int min_f = 0;
1427
1428 min_f += (f->is_vf ? 1 : 0);
1429 min_f += (f->is_netdev ? 1 : 0);
1430
1431 if (f->counter > min_f)
1432 f->counter--;
1433 }
1434
1435 /* counter == 0 tells sync_filters_subtask to
1436 * remove the filter from the firmware's list
1437 */
1438 if (f->counter == 0) {
1439 f->changed = true;
1440 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1441 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1442 }
1443 }
1444
1445 /**
1446 * i40e_set_mac - NDO callback to set mac address
1447 * @netdev: network interface device structure
1448 * @p: pointer to an address structure
1449 *
1450 * Returns 0 on success, negative on failure
1451 **/
1452 #ifdef I40E_FCOE
1453 int i40e_set_mac(struct net_device *netdev, void *p)
1454 #else
1455 static int i40e_set_mac(struct net_device *netdev, void *p)
1456 #endif
1457 {
1458 struct i40e_netdev_priv *np = netdev_priv(netdev);
1459 struct i40e_vsi *vsi = np->vsi;
1460 struct i40e_pf *pf = vsi->back;
1461 struct i40e_hw *hw = &pf->hw;
1462 struct sockaddr *addr = p;
1463 struct i40e_mac_filter *f;
1464
1465 if (!is_valid_ether_addr(addr->sa_data))
1466 return -EADDRNOTAVAIL;
1467
1468 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1469 netdev_info(netdev, "already using mac address %pM\n",
1470 addr->sa_data);
1471 return 0;
1472 }
1473
1474 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1475 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1476 return -EADDRNOTAVAIL;
1477
1478 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1479 netdev_info(netdev, "returning to hw mac address %pM\n",
1480 hw->mac.addr);
1481 else
1482 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1483
1484 if (vsi->type == I40E_VSI_MAIN) {
1485 i40e_status ret;
1486
1487 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1488 I40E_AQC_WRITE_TYPE_LAA_WOL,
1489 addr->sa_data, NULL);
1490 if (ret) {
1491 netdev_info(netdev,
1492 "Addr change for Main VSI failed: %d\n",
1493 ret);
1494 return -EADDRNOTAVAIL;
1495 }
1496 }
1497
1498 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1499 struct i40e_aqc_remove_macvlan_element_data element;
1500
1501 memset(&element, 0, sizeof(element));
1502 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1503 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1504 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1505 } else {
1506 spin_lock_bh(&vsi->mac_filter_list_lock);
1507 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1508 false, false);
1509 spin_unlock_bh(&vsi->mac_filter_list_lock);
1510 }
1511
1512 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1513 struct i40e_aqc_add_macvlan_element_data element;
1514
1515 memset(&element, 0, sizeof(element));
1516 ether_addr_copy(element.mac_addr, hw->mac.addr);
1517 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1518 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1519 } else {
1520 spin_lock_bh(&vsi->mac_filter_list_lock);
1521 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1522 false, false);
1523 if (f)
1524 f->is_laa = true;
1525 spin_unlock_bh(&vsi->mac_filter_list_lock);
1526 }
1527
1528 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1529
1530 /* schedule our worker thread which will take care of
1531 * applying the new filter changes
1532 */
1533 i40e_service_event_schedule(vsi->back);
1534 return 0;
1535 }
1536
1537 /**
1538 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1539 * @vsi: the VSI being setup
1540 * @ctxt: VSI context structure
1541 * @enabled_tc: Enabled TCs bitmap
1542 * @is_add: True if called before Add VSI
1543 *
1544 * Setup VSI queue mapping for enabled traffic classes.
1545 **/
1546 #ifdef I40E_FCOE
1547 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1548 struct i40e_vsi_context *ctxt,
1549 u8 enabled_tc,
1550 bool is_add)
1551 #else
1552 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1553 struct i40e_vsi_context *ctxt,
1554 u8 enabled_tc,
1555 bool is_add)
1556 #endif
1557 {
1558 struct i40e_pf *pf = vsi->back;
1559 u16 sections = 0;
1560 u8 netdev_tc = 0;
1561 u16 numtc = 0;
1562 u16 qcount;
1563 u8 offset;
1564 u16 qmap;
1565 int i;
1566 u16 num_tc_qps = 0;
1567
1568 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1569 offset = 0;
1570
1571 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1572 /* Find numtc from enabled TC bitmap */
1573 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1574 if (enabled_tc & BIT(i)) /* TC is enabled */
1575 numtc++;
1576 }
1577 if (!numtc) {
1578 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1579 numtc = 1;
1580 }
1581 } else {
1582 /* At least TC0 is enabled in case of non-DCB case */
1583 numtc = 1;
1584 }
1585
1586 vsi->tc_config.numtc = numtc;
1587 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1588 /* Number of queues per enabled TC */
1589 qcount = vsi->alloc_queue_pairs;
1590
1591 num_tc_qps = qcount / numtc;
1592 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1593
1594 /* Setup queue offset/count for all TCs for given VSI */
1595 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1596 /* See if the given TC is enabled for the given VSI */
1597 if (vsi->tc_config.enabled_tc & BIT(i)) {
1598 /* TC is enabled */
1599 int pow, num_qps;
1600
1601 switch (vsi->type) {
1602 case I40E_VSI_MAIN:
1603 qcount = min_t(int, pf->alloc_rss_size,
1604 num_tc_qps);
1605 break;
1606 #ifdef I40E_FCOE
1607 case I40E_VSI_FCOE:
1608 qcount = num_tc_qps;
1609 break;
1610 #endif
1611 case I40E_VSI_FDIR:
1612 case I40E_VSI_SRIOV:
1613 case I40E_VSI_VMDQ2:
1614 default:
1615 qcount = num_tc_qps;
1616 WARN_ON(i != 0);
1617 break;
1618 }
1619 vsi->tc_config.tc_info[i].qoffset = offset;
1620 vsi->tc_config.tc_info[i].qcount = qcount;
1621
1622 /* find the next higher power-of-2 of num queue pairs */
1623 num_qps = qcount;
1624 pow = 0;
1625 while (num_qps && (BIT_ULL(pow) < qcount)) {
1626 pow++;
1627 num_qps >>= 1;
1628 }
1629
1630 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1631 qmap =
1632 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1633 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1634
1635 offset += qcount;
1636 } else {
1637 /* TC is not enabled so set the offset to
1638 * default queue and allocate one queue
1639 * for the given TC.
1640 */
1641 vsi->tc_config.tc_info[i].qoffset = 0;
1642 vsi->tc_config.tc_info[i].qcount = 1;
1643 vsi->tc_config.tc_info[i].netdev_tc = 0;
1644
1645 qmap = 0;
1646 }
1647 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1648 }
1649
1650 /* Set actual Tx/Rx queue pairs */
1651 vsi->num_queue_pairs = offset;
1652 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1653 if (vsi->req_queue_pairs > 0)
1654 vsi->num_queue_pairs = vsi->req_queue_pairs;
1655 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1656 vsi->num_queue_pairs = pf->num_lan_msix;
1657 }
1658
1659 /* Scheduler section valid can only be set for ADD VSI */
1660 if (is_add) {
1661 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1662
1663 ctxt->info.up_enable_bits = enabled_tc;
1664 }
1665 if (vsi->type == I40E_VSI_SRIOV) {
1666 ctxt->info.mapping_flags |=
1667 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1668 for (i = 0; i < vsi->num_queue_pairs; i++)
1669 ctxt->info.queue_mapping[i] =
1670 cpu_to_le16(vsi->base_queue + i);
1671 } else {
1672 ctxt->info.mapping_flags |=
1673 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1674 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1675 }
1676 ctxt->info.valid_sections |= cpu_to_le16(sections);
1677 }
1678
1679 /**
1680 * i40e_set_rx_mode - NDO callback to set the netdev filters
1681 * @netdev: network interface device structure
1682 **/
1683 #ifdef I40E_FCOE
1684 void i40e_set_rx_mode(struct net_device *netdev)
1685 #else
1686 static void i40e_set_rx_mode(struct net_device *netdev)
1687 #endif
1688 {
1689 struct i40e_netdev_priv *np = netdev_priv(netdev);
1690 struct i40e_mac_filter *f, *ftmp;
1691 struct i40e_vsi *vsi = np->vsi;
1692 struct netdev_hw_addr *uca;
1693 struct netdev_hw_addr *mca;
1694 struct netdev_hw_addr *ha;
1695
1696 spin_lock_bh(&vsi->mac_filter_list_lock);
1697
1698 /* add addr if not already in the filter list */
1699 netdev_for_each_uc_addr(uca, netdev) {
1700 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1701 if (i40e_is_vsi_in_vlan(vsi))
1702 i40e_put_mac_in_vlan(vsi, uca->addr,
1703 false, true);
1704 else
1705 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1706 false, true);
1707 }
1708 }
1709
1710 netdev_for_each_mc_addr(mca, netdev) {
1711 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1712 if (i40e_is_vsi_in_vlan(vsi))
1713 i40e_put_mac_in_vlan(vsi, mca->addr,
1714 false, true);
1715 else
1716 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1717 false, true);
1718 }
1719 }
1720
1721 /* remove filter if not in netdev list */
1722 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1723
1724 if (!f->is_netdev)
1725 continue;
1726
1727 netdev_for_each_mc_addr(mca, netdev)
1728 if (ether_addr_equal(mca->addr, f->macaddr))
1729 goto bottom_of_search_loop;
1730
1731 netdev_for_each_uc_addr(uca, netdev)
1732 if (ether_addr_equal(uca->addr, f->macaddr))
1733 goto bottom_of_search_loop;
1734
1735 for_each_dev_addr(netdev, ha)
1736 if (ether_addr_equal(ha->addr, f->macaddr))
1737 goto bottom_of_search_loop;
1738
1739 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1740 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1741
1742 bottom_of_search_loop:
1743 continue;
1744 }
1745 spin_unlock_bh(&vsi->mac_filter_list_lock);
1746
1747 /* check for other flag changes */
1748 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1749 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1750 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1751 }
1752
1753 /* schedule our worker thread which will take care of
1754 * applying the new filter changes
1755 */
1756 i40e_service_event_schedule(vsi->back);
1757 }
1758
1759 /**
1760 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1761 * @src: source MAC filter entry to be clones
1762 *
1763 * Returns the pointer to newly cloned MAC filter entry or NULL
1764 * in case of error
1765 **/
1766 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1767 struct i40e_mac_filter *src)
1768 {
1769 struct i40e_mac_filter *f;
1770
1771 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1772 if (!f)
1773 return NULL;
1774 *f = *src;
1775
1776 INIT_LIST_HEAD(&f->list);
1777
1778 return f;
1779 }
1780
1781 /**
1782 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1783 * @vsi: pointer to vsi struct
1784 * @from: Pointer to list which contains MAC filter entries - changes to
1785 * those entries needs to be undone.
1786 *
1787 * MAC filter entries from list were slated to be removed from device.
1788 **/
1789 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1790 struct list_head *from)
1791 {
1792 struct i40e_mac_filter *f, *ftmp;
1793
1794 list_for_each_entry_safe(f, ftmp, from, list) {
1795 f->changed = true;
1796 /* Move the element back into MAC filter list*/
1797 list_move_tail(&f->list, &vsi->mac_filter_list);
1798 }
1799 }
1800
1801 /**
1802 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1803 * @vsi: pointer to vsi struct
1804 *
1805 * MAC filter entries from list were slated to be added from device.
1806 **/
1807 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1808 {
1809 struct i40e_mac_filter *f, *ftmp;
1810
1811 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1812 if (!f->changed && f->counter)
1813 f->changed = true;
1814 }
1815 }
1816
1817 /**
1818 * i40e_cleanup_add_list - Deletes the element from add list and release
1819 * memory
1820 * @add_list: Pointer to list which contains MAC filter entries
1821 **/
1822 static void i40e_cleanup_add_list(struct list_head *add_list)
1823 {
1824 struct i40e_mac_filter *f, *ftmp;
1825
1826 list_for_each_entry_safe(f, ftmp, add_list, list) {
1827 list_del(&f->list);
1828 kfree(f);
1829 }
1830 }
1831
1832 /**
1833 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1834 * @vsi: ptr to the VSI
1835 *
1836 * Push any outstanding VSI filter changes through the AdminQ.
1837 *
1838 * Returns 0 or error value
1839 **/
1840 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1841 {
1842 struct list_head tmp_del_list, tmp_add_list;
1843 struct i40e_mac_filter *f, *ftmp, *fclone;
1844 struct i40e_hw *hw = &vsi->back->hw;
1845 bool promisc_forced_on = false;
1846 bool add_happened = false;
1847 char vsi_name[16] = "PF";
1848 int filter_list_len = 0;
1849 u32 changed_flags = 0;
1850 i40e_status aq_ret = 0;
1851 bool err_cond = false;
1852 int retval = 0;
1853 struct i40e_pf *pf;
1854 int num_add = 0;
1855 int num_del = 0;
1856 int aq_err = 0;
1857 u16 cmd_flags;
1858
1859 /* empty array typed pointers, kcalloc later */
1860 struct i40e_aqc_add_macvlan_element_data *add_list;
1861 struct i40e_aqc_remove_macvlan_element_data *del_list;
1862
1863 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1864 usleep_range(1000, 2000);
1865 pf = vsi->back;
1866
1867 if (vsi->netdev) {
1868 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1869 vsi->current_netdev_flags = vsi->netdev->flags;
1870 }
1871
1872 INIT_LIST_HEAD(&tmp_del_list);
1873 INIT_LIST_HEAD(&tmp_add_list);
1874
1875 if (vsi->type == I40E_VSI_SRIOV)
1876 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
1877 else if (vsi->type != I40E_VSI_MAIN)
1878 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
1879
1880 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1881 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1882
1883 spin_lock_bh(&vsi->mac_filter_list_lock);
1884 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1885 if (!f->changed)
1886 continue;
1887
1888 if (f->counter != 0)
1889 continue;
1890 f->changed = false;
1891
1892 /* Move the element into temporary del_list */
1893 list_move_tail(&f->list, &tmp_del_list);
1894 }
1895
1896 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1897 if (!f->changed)
1898 continue;
1899
1900 if (f->counter == 0)
1901 continue;
1902 f->changed = false;
1903
1904 /* Clone MAC filter entry and add into temporary list */
1905 fclone = i40e_mac_filter_entry_clone(f);
1906 if (!fclone) {
1907 err_cond = true;
1908 break;
1909 }
1910 list_add_tail(&fclone->list, &tmp_add_list);
1911 }
1912
1913 /* if failed to clone MAC filter entry - undo */
1914 if (err_cond) {
1915 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1916 i40e_undo_add_filter_entries(vsi);
1917 }
1918 spin_unlock_bh(&vsi->mac_filter_list_lock);
1919
1920 if (err_cond) {
1921 i40e_cleanup_add_list(&tmp_add_list);
1922 retval = -ENOMEM;
1923 goto out;
1924 }
1925 }
1926
1927 /* Now process 'del_list' outside the lock */
1928 if (!list_empty(&tmp_del_list)) {
1929 int del_list_size;
1930
1931 filter_list_len = hw->aq.asq_buf_size /
1932 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1933 del_list_size = filter_list_len *
1934 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1935 del_list = kzalloc(del_list_size, GFP_ATOMIC);
1936 if (!del_list) {
1937 i40e_cleanup_add_list(&tmp_add_list);
1938
1939 /* Undo VSI's MAC filter entry element updates */
1940 spin_lock_bh(&vsi->mac_filter_list_lock);
1941 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1942 i40e_undo_add_filter_entries(vsi);
1943 spin_unlock_bh(&vsi->mac_filter_list_lock);
1944 retval = -ENOMEM;
1945 goto out;
1946 }
1947
1948 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1949 cmd_flags = 0;
1950
1951 /* add to delete list */
1952 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1953 del_list[num_del].vlan_tag =
1954 cpu_to_le16((u16)(f->vlan ==
1955 I40E_VLAN_ANY ? 0 : f->vlan));
1956
1957 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1958 del_list[num_del].flags = cmd_flags;
1959 num_del++;
1960
1961 /* flush a full buffer */
1962 if (num_del == filter_list_len) {
1963 aq_ret =
1964 i40e_aq_remove_macvlan(hw, vsi->seid,
1965 del_list,
1966 num_del, NULL);
1967 aq_err = hw->aq.asq_last_status;
1968 num_del = 0;
1969 memset(del_list, 0, del_list_size);
1970
1971 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1972 retval = -EIO;
1973 dev_err(&pf->pdev->dev,
1974 "ignoring delete macvlan error on %s, err %s, aq_err %s while flushing a full buffer\n",
1975 vsi_name,
1976 i40e_stat_str(hw, aq_ret),
1977 i40e_aq_str(hw, aq_err));
1978 }
1979 }
1980 /* Release memory for MAC filter entries which were
1981 * synced up with HW.
1982 */
1983 list_del(&f->list);
1984 kfree(f);
1985 }
1986
1987 if (num_del) {
1988 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, del_list,
1989 num_del, NULL);
1990 aq_err = hw->aq.asq_last_status;
1991 num_del = 0;
1992
1993 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
1994 dev_info(&pf->pdev->dev,
1995 "ignoring delete macvlan error on %s, err %s aq_err %s\n",
1996 vsi_name,
1997 i40e_stat_str(hw, aq_ret),
1998 i40e_aq_str(hw, aq_err));
1999 }
2000
2001 kfree(del_list);
2002 del_list = NULL;
2003 }
2004
2005 if (!list_empty(&tmp_add_list)) {
2006 int add_list_size;
2007
2008 /* do all the adds now */
2009 filter_list_len = hw->aq.asq_buf_size /
2010 sizeof(struct i40e_aqc_add_macvlan_element_data),
2011 add_list_size = filter_list_len *
2012 sizeof(struct i40e_aqc_add_macvlan_element_data);
2013 add_list = kzalloc(add_list_size, GFP_ATOMIC);
2014 if (!add_list) {
2015 /* Purge element from temporary lists */
2016 i40e_cleanup_add_list(&tmp_add_list);
2017
2018 /* Undo add filter entries from VSI MAC filter list */
2019 spin_lock_bh(&vsi->mac_filter_list_lock);
2020 i40e_undo_add_filter_entries(vsi);
2021 spin_unlock_bh(&vsi->mac_filter_list_lock);
2022 retval = -ENOMEM;
2023 goto out;
2024 }
2025
2026 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2027
2028 add_happened = true;
2029 cmd_flags = 0;
2030
2031 /* add to add array */
2032 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2033 add_list[num_add].vlan_tag =
2034 cpu_to_le16(
2035 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2036 add_list[num_add].queue_number = 0;
2037
2038 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2039 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2040 num_add++;
2041
2042 /* flush a full buffer */
2043 if (num_add == filter_list_len) {
2044 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2045 add_list, num_add,
2046 NULL);
2047 aq_err = hw->aq.asq_last_status;
2048 num_add = 0;
2049
2050 if (aq_ret)
2051 break;
2052 memset(add_list, 0, add_list_size);
2053 }
2054 /* Entries from tmp_add_list were cloned from MAC
2055 * filter list, hence clean those cloned entries
2056 */
2057 list_del(&f->list);
2058 kfree(f);
2059 }
2060
2061 if (num_add) {
2062 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2063 add_list, num_add, NULL);
2064 aq_err = hw->aq.asq_last_status;
2065 num_add = 0;
2066 }
2067 kfree(add_list);
2068 add_list = NULL;
2069
2070 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2071 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2072 dev_info(&pf->pdev->dev,
2073 "add filter failed on %s, err %s aq_err %s\n",
2074 vsi_name,
2075 i40e_stat_str(hw, aq_ret),
2076 i40e_aq_str(hw, aq_err));
2077 if ((hw->aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2078 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2079 &vsi->state)) {
2080 promisc_forced_on = true;
2081 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2082 &vsi->state);
2083 dev_info(&pf->pdev->dev, "promiscuous mode forced on %s\n",
2084 vsi_name);
2085 }
2086 }
2087 }
2088
2089 /* if the VF is not trusted do not do promisc */
2090 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2091 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2092 goto out;
2093 }
2094
2095 /* check for changes in promiscuous modes */
2096 if (changed_flags & IFF_ALLMULTI) {
2097 bool cur_multipromisc;
2098
2099 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2100 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2101 vsi->seid,
2102 cur_multipromisc,
2103 NULL);
2104 if (aq_ret) {
2105 retval = i40e_aq_rc_to_posix(aq_ret,
2106 hw->aq.asq_last_status);
2107 dev_info(&pf->pdev->dev,
2108 "set multi promisc failed on %s, err %s aq_err %s\n",
2109 vsi_name,
2110 i40e_stat_str(hw, aq_ret),
2111 i40e_aq_str(hw, hw->aq.asq_last_status));
2112 }
2113 }
2114 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2115 bool cur_promisc;
2116
2117 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2118 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2119 &vsi->state));
2120 if ((vsi->type == I40E_VSI_MAIN) &&
2121 (pf->lan_veb != I40E_NO_VEB) &&
2122 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2123 /* set defport ON for Main VSI instead of true promisc
2124 * this way we will get all unicast/multicast and VLAN
2125 * promisc behavior but will not get VF or VMDq traffic
2126 * replicated on the Main VSI.
2127 */
2128 if (pf->cur_promisc != cur_promisc) {
2129 pf->cur_promisc = cur_promisc;
2130 if (cur_promisc)
2131 aq_ret =
2132 i40e_aq_set_default_vsi(hw,
2133 vsi->seid,
2134 NULL);
2135 else
2136 aq_ret =
2137 i40e_aq_clear_default_vsi(hw,
2138 vsi->seid,
2139 NULL);
2140 if (aq_ret) {
2141 retval = i40e_aq_rc_to_posix(aq_ret,
2142 hw->aq.asq_last_status);
2143 dev_info(&pf->pdev->dev,
2144 "Set default VSI failed on %s, err %s, aq_err %s\n",
2145 vsi_name,
2146 i40e_stat_str(hw, aq_ret),
2147 i40e_aq_str(hw,
2148 hw->aq.asq_last_status));
2149 }
2150 }
2151 } else {
2152 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2153 hw,
2154 vsi->seid,
2155 cur_promisc, NULL,
2156 true);
2157 if (aq_ret) {
2158 retval =
2159 i40e_aq_rc_to_posix(aq_ret,
2160 hw->aq.asq_last_status);
2161 dev_info(&pf->pdev->dev,
2162 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2163 vsi_name,
2164 i40e_stat_str(hw, aq_ret),
2165 i40e_aq_str(hw,
2166 hw->aq.asq_last_status));
2167 }
2168 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2169 hw,
2170 vsi->seid,
2171 cur_promisc, NULL);
2172 if (aq_ret) {
2173 retval =
2174 i40e_aq_rc_to_posix(aq_ret,
2175 hw->aq.asq_last_status);
2176 dev_info(&pf->pdev->dev,
2177 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2178 vsi_name,
2179 i40e_stat_str(hw, aq_ret),
2180 i40e_aq_str(hw,
2181 hw->aq.asq_last_status));
2182 }
2183 }
2184 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2185 vsi->seid,
2186 cur_promisc, NULL);
2187 if (aq_ret) {
2188 retval = i40e_aq_rc_to_posix(aq_ret,
2189 pf->hw.aq.asq_last_status);
2190 dev_info(&pf->pdev->dev,
2191 "set brdcast promisc failed, err %s, aq_err %s\n",
2192 i40e_stat_str(hw, aq_ret),
2193 i40e_aq_str(hw,
2194 hw->aq.asq_last_status));
2195 }
2196 }
2197 out:
2198 /* if something went wrong then set the changed flag so we try again */
2199 if (retval)
2200 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2201
2202 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2203 return retval;
2204 }
2205
2206 /**
2207 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2208 * @pf: board private structure
2209 **/
2210 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2211 {
2212 int v;
2213
2214 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2215 return;
2216 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2217
2218 for (v = 0; v < pf->num_alloc_vsi; v++) {
2219 if (pf->vsi[v] &&
2220 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2221 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2222
2223 if (ret) {
2224 /* come back and try again later */
2225 pf->flags |= I40E_FLAG_FILTER_SYNC;
2226 break;
2227 }
2228 }
2229 }
2230 }
2231
2232 /**
2233 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2234 * @netdev: network interface device structure
2235 * @new_mtu: new value for maximum frame size
2236 *
2237 * Returns 0 on success, negative on failure
2238 **/
2239 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2240 {
2241 struct i40e_netdev_priv *np = netdev_priv(netdev);
2242 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2243 struct i40e_vsi *vsi = np->vsi;
2244
2245 /* MTU < 68 is an error and causes problems on some kernels */
2246 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2247 return -EINVAL;
2248
2249 netdev_info(netdev, "changing MTU from %d to %d\n",
2250 netdev->mtu, new_mtu);
2251 netdev->mtu = new_mtu;
2252 if (netif_running(netdev))
2253 i40e_vsi_reinit_locked(vsi);
2254 i40e_notify_client_of_l2_param_changes(vsi);
2255 return 0;
2256 }
2257
2258 /**
2259 * i40e_ioctl - Access the hwtstamp interface
2260 * @netdev: network interface device structure
2261 * @ifr: interface request data
2262 * @cmd: ioctl command
2263 **/
2264 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2265 {
2266 struct i40e_netdev_priv *np = netdev_priv(netdev);
2267 struct i40e_pf *pf = np->vsi->back;
2268
2269 switch (cmd) {
2270 case SIOCGHWTSTAMP:
2271 return i40e_ptp_get_ts_config(pf, ifr);
2272 case SIOCSHWTSTAMP:
2273 return i40e_ptp_set_ts_config(pf, ifr);
2274 default:
2275 return -EOPNOTSUPP;
2276 }
2277 }
2278
2279 /**
2280 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2281 * @vsi: the vsi being adjusted
2282 **/
2283 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2284 {
2285 struct i40e_vsi_context ctxt;
2286 i40e_status ret;
2287
2288 if ((vsi->info.valid_sections &
2289 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2290 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2291 return; /* already enabled */
2292
2293 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2294 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2295 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2296
2297 ctxt.seid = vsi->seid;
2298 ctxt.info = vsi->info;
2299 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2300 if (ret) {
2301 dev_info(&vsi->back->pdev->dev,
2302 "update vlan stripping failed, err %s aq_err %s\n",
2303 i40e_stat_str(&vsi->back->hw, ret),
2304 i40e_aq_str(&vsi->back->hw,
2305 vsi->back->hw.aq.asq_last_status));
2306 }
2307 }
2308
2309 /**
2310 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2311 * @vsi: the vsi being adjusted
2312 **/
2313 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2314 {
2315 struct i40e_vsi_context ctxt;
2316 i40e_status ret;
2317
2318 if ((vsi->info.valid_sections &
2319 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2320 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2321 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2322 return; /* already disabled */
2323
2324 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2325 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2326 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2327
2328 ctxt.seid = vsi->seid;
2329 ctxt.info = vsi->info;
2330 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2331 if (ret) {
2332 dev_info(&vsi->back->pdev->dev,
2333 "update vlan stripping failed, err %s aq_err %s\n",
2334 i40e_stat_str(&vsi->back->hw, ret),
2335 i40e_aq_str(&vsi->back->hw,
2336 vsi->back->hw.aq.asq_last_status));
2337 }
2338 }
2339
2340 /**
2341 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2342 * @netdev: network interface to be adjusted
2343 * @features: netdev features to test if VLAN offload is enabled or not
2344 **/
2345 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2346 {
2347 struct i40e_netdev_priv *np = netdev_priv(netdev);
2348 struct i40e_vsi *vsi = np->vsi;
2349
2350 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2351 i40e_vlan_stripping_enable(vsi);
2352 else
2353 i40e_vlan_stripping_disable(vsi);
2354 }
2355
2356 /**
2357 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2358 * @vsi: the vsi being configured
2359 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2360 **/
2361 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2362 {
2363 struct i40e_mac_filter *f, *add_f;
2364 bool is_netdev, is_vf;
2365
2366 is_vf = (vsi->type == I40E_VSI_SRIOV);
2367 is_netdev = !!(vsi->netdev);
2368
2369 /* Locked once because all functions invoked below iterates list*/
2370 spin_lock_bh(&vsi->mac_filter_list_lock);
2371
2372 if (is_netdev) {
2373 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2374 is_vf, is_netdev);
2375 if (!add_f) {
2376 dev_info(&vsi->back->pdev->dev,
2377 "Could not add vlan filter %d for %pM\n",
2378 vid, vsi->netdev->dev_addr);
2379 spin_unlock_bh(&vsi->mac_filter_list_lock);
2380 return -ENOMEM;
2381 }
2382 }
2383
2384 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2385 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2386 if (!add_f) {
2387 dev_info(&vsi->back->pdev->dev,
2388 "Could not add vlan filter %d for %pM\n",
2389 vid, f->macaddr);
2390 spin_unlock_bh(&vsi->mac_filter_list_lock);
2391 return -ENOMEM;
2392 }
2393 }
2394
2395 /* Now if we add a vlan tag, make sure to check if it is the first
2396 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2397 * with 0, so we now accept untagged and specified tagged traffic
2398 * (and not any taged and untagged)
2399 */
2400 if (vid > 0) {
2401 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2402 I40E_VLAN_ANY,
2403 is_vf, is_netdev)) {
2404 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2405 I40E_VLAN_ANY, is_vf, is_netdev);
2406 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2407 is_vf, is_netdev);
2408 if (!add_f) {
2409 dev_info(&vsi->back->pdev->dev,
2410 "Could not add filter 0 for %pM\n",
2411 vsi->netdev->dev_addr);
2412 spin_unlock_bh(&vsi->mac_filter_list_lock);
2413 return -ENOMEM;
2414 }
2415 }
2416 }
2417
2418 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2419 if (vid > 0 && !vsi->info.pvid) {
2420 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2421 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2422 is_vf, is_netdev))
2423 continue;
2424 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2425 is_vf, is_netdev);
2426 add_f = i40e_add_filter(vsi, f->macaddr,
2427 0, is_vf, is_netdev);
2428 if (!add_f) {
2429 dev_info(&vsi->back->pdev->dev,
2430 "Could not add filter 0 for %pM\n",
2431 f->macaddr);
2432 spin_unlock_bh(&vsi->mac_filter_list_lock);
2433 return -ENOMEM;
2434 }
2435 }
2436 }
2437
2438 spin_unlock_bh(&vsi->mac_filter_list_lock);
2439
2440 /* schedule our worker thread which will take care of
2441 * applying the new filter changes
2442 */
2443 i40e_service_event_schedule(vsi->back);
2444 return 0;
2445 }
2446
2447 /**
2448 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2449 * @vsi: the vsi being configured
2450 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2451 *
2452 * Return: 0 on success or negative otherwise
2453 **/
2454 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2455 {
2456 struct net_device *netdev = vsi->netdev;
2457 struct i40e_mac_filter *f, *add_f;
2458 bool is_vf, is_netdev;
2459 int filter_count = 0;
2460
2461 is_vf = (vsi->type == I40E_VSI_SRIOV);
2462 is_netdev = !!(netdev);
2463
2464 /* Locked once because all functions invoked below iterates list */
2465 spin_lock_bh(&vsi->mac_filter_list_lock);
2466
2467 if (is_netdev)
2468 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2469
2470 list_for_each_entry(f, &vsi->mac_filter_list, list)
2471 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2472
2473 /* go through all the filters for this VSI and if there is only
2474 * vid == 0 it means there are no other filters, so vid 0 must
2475 * be replaced with -1. This signifies that we should from now
2476 * on accept any traffic (with any tag present, or untagged)
2477 */
2478 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2479 if (is_netdev) {
2480 if (f->vlan &&
2481 ether_addr_equal(netdev->dev_addr, f->macaddr))
2482 filter_count++;
2483 }
2484
2485 if (f->vlan)
2486 filter_count++;
2487 }
2488
2489 if (!filter_count && is_netdev) {
2490 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2491 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2492 is_vf, is_netdev);
2493 if (!f) {
2494 dev_info(&vsi->back->pdev->dev,
2495 "Could not add filter %d for %pM\n",
2496 I40E_VLAN_ANY, netdev->dev_addr);
2497 spin_unlock_bh(&vsi->mac_filter_list_lock);
2498 return -ENOMEM;
2499 }
2500 }
2501
2502 if (!filter_count) {
2503 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2504 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2505 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2506 is_vf, is_netdev);
2507 if (!add_f) {
2508 dev_info(&vsi->back->pdev->dev,
2509 "Could not add filter %d for %pM\n",
2510 I40E_VLAN_ANY, f->macaddr);
2511 spin_unlock_bh(&vsi->mac_filter_list_lock);
2512 return -ENOMEM;
2513 }
2514 }
2515 }
2516
2517 spin_unlock_bh(&vsi->mac_filter_list_lock);
2518
2519 /* schedule our worker thread which will take care of
2520 * applying the new filter changes
2521 */
2522 i40e_service_event_schedule(vsi->back);
2523 return 0;
2524 }
2525
2526 /**
2527 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2528 * @netdev: network interface to be adjusted
2529 * @vid: vlan id to be added
2530 *
2531 * net_device_ops implementation for adding vlan ids
2532 **/
2533 #ifdef I40E_FCOE
2534 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2535 __always_unused __be16 proto, u16 vid)
2536 #else
2537 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2538 __always_unused __be16 proto, u16 vid)
2539 #endif
2540 {
2541 struct i40e_netdev_priv *np = netdev_priv(netdev);
2542 struct i40e_vsi *vsi = np->vsi;
2543 int ret = 0;
2544
2545 if (vid > 4095)
2546 return -EINVAL;
2547
2548 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2549
2550 /* If the network stack called us with vid = 0 then
2551 * it is asking to receive priority tagged packets with
2552 * vlan id 0. Our HW receives them by default when configured
2553 * to receive untagged packets so there is no need to add an
2554 * extra filter for vlan 0 tagged packets.
2555 */
2556 if (vid)
2557 ret = i40e_vsi_add_vlan(vsi, vid);
2558
2559 if (!ret && (vid < VLAN_N_VID))
2560 set_bit(vid, vsi->active_vlans);
2561
2562 return ret;
2563 }
2564
2565 /**
2566 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2567 * @netdev: network interface to be adjusted
2568 * @vid: vlan id to be removed
2569 *
2570 * net_device_ops implementation for removing vlan ids
2571 **/
2572 #ifdef I40E_FCOE
2573 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2574 __always_unused __be16 proto, u16 vid)
2575 #else
2576 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2577 __always_unused __be16 proto, u16 vid)
2578 #endif
2579 {
2580 struct i40e_netdev_priv *np = netdev_priv(netdev);
2581 struct i40e_vsi *vsi = np->vsi;
2582
2583 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2584
2585 /* return code is ignored as there is nothing a user
2586 * can do about failure to remove and a log message was
2587 * already printed from the other function
2588 */
2589 i40e_vsi_kill_vlan(vsi, vid);
2590
2591 clear_bit(vid, vsi->active_vlans);
2592
2593 return 0;
2594 }
2595
2596 /**
2597 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2598 * @vsi: the vsi being brought back up
2599 **/
2600 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2601 {
2602 u16 vid;
2603
2604 if (!vsi->netdev)
2605 return;
2606
2607 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2608
2609 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2610 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2611 vid);
2612 }
2613
2614 /**
2615 * i40e_vsi_add_pvid - Add pvid for the VSI
2616 * @vsi: the vsi being adjusted
2617 * @vid: the vlan id to set as a PVID
2618 **/
2619 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2620 {
2621 struct i40e_vsi_context ctxt;
2622 i40e_status ret;
2623
2624 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2625 vsi->info.pvid = cpu_to_le16(vid);
2626 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2627 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2628 I40E_AQ_VSI_PVLAN_EMOD_STR;
2629
2630 ctxt.seid = vsi->seid;
2631 ctxt.info = vsi->info;
2632 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2633 if (ret) {
2634 dev_info(&vsi->back->pdev->dev,
2635 "add pvid failed, err %s aq_err %s\n",
2636 i40e_stat_str(&vsi->back->hw, ret),
2637 i40e_aq_str(&vsi->back->hw,
2638 vsi->back->hw.aq.asq_last_status));
2639 return -ENOENT;
2640 }
2641
2642 return 0;
2643 }
2644
2645 /**
2646 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2647 * @vsi: the vsi being adjusted
2648 *
2649 * Just use the vlan_rx_register() service to put it back to normal
2650 **/
2651 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2652 {
2653 i40e_vlan_stripping_disable(vsi);
2654
2655 vsi->info.pvid = 0;
2656 }
2657
2658 /**
2659 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2660 * @vsi: ptr to the VSI
2661 *
2662 * If this function returns with an error, then it's possible one or
2663 * more of the rings is populated (while the rest are not). It is the
2664 * callers duty to clean those orphaned rings.
2665 *
2666 * Return 0 on success, negative on failure
2667 **/
2668 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2669 {
2670 int i, err = 0;
2671
2672 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2673 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2674
2675 return err;
2676 }
2677
2678 /**
2679 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2680 * @vsi: ptr to the VSI
2681 *
2682 * Free VSI's transmit software resources
2683 **/
2684 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2685 {
2686 int i;
2687
2688 if (!vsi->tx_rings)
2689 return;
2690
2691 for (i = 0; i < vsi->num_queue_pairs; i++)
2692 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2693 i40e_free_tx_resources(vsi->tx_rings[i]);
2694 }
2695
2696 /**
2697 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2698 * @vsi: ptr to the VSI
2699 *
2700 * If this function returns with an error, then it's possible one or
2701 * more of the rings is populated (while the rest are not). It is the
2702 * callers duty to clean those orphaned rings.
2703 *
2704 * Return 0 on success, negative on failure
2705 **/
2706 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2707 {
2708 int i, err = 0;
2709
2710 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2711 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2712 #ifdef I40E_FCOE
2713 i40e_fcoe_setup_ddp_resources(vsi);
2714 #endif
2715 return err;
2716 }
2717
2718 /**
2719 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2720 * @vsi: ptr to the VSI
2721 *
2722 * Free all receive software resources
2723 **/
2724 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2725 {
2726 int i;
2727
2728 if (!vsi->rx_rings)
2729 return;
2730
2731 for (i = 0; i < vsi->num_queue_pairs; i++)
2732 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2733 i40e_free_rx_resources(vsi->rx_rings[i]);
2734 #ifdef I40E_FCOE
2735 i40e_fcoe_free_ddp_resources(vsi);
2736 #endif
2737 }
2738
2739 /**
2740 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2741 * @ring: The Tx ring to configure
2742 *
2743 * This enables/disables XPS for a given Tx descriptor ring
2744 * based on the TCs enabled for the VSI that ring belongs to.
2745 **/
2746 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2747 {
2748 struct i40e_vsi *vsi = ring->vsi;
2749 cpumask_var_t mask;
2750
2751 if (!ring->q_vector || !ring->netdev)
2752 return;
2753
2754 /* Single TC mode enable XPS */
2755 if (vsi->tc_config.numtc <= 1) {
2756 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2757 netif_set_xps_queue(ring->netdev,
2758 &ring->q_vector->affinity_mask,
2759 ring->queue_index);
2760 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2761 /* Disable XPS to allow selection based on TC */
2762 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2763 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2764 free_cpumask_var(mask);
2765 }
2766
2767 /* schedule our worker thread which will take care of
2768 * applying the new filter changes
2769 */
2770 i40e_service_event_schedule(vsi->back);
2771 }
2772
2773 /**
2774 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2775 * @ring: The Tx ring to configure
2776 *
2777 * Configure the Tx descriptor ring in the HMC context.
2778 **/
2779 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2780 {
2781 struct i40e_vsi *vsi = ring->vsi;
2782 u16 pf_q = vsi->base_queue + ring->queue_index;
2783 struct i40e_hw *hw = &vsi->back->hw;
2784 struct i40e_hmc_obj_txq tx_ctx;
2785 i40e_status err = 0;
2786 u32 qtx_ctl = 0;
2787
2788 /* some ATR related tx ring init */
2789 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2790 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2791 ring->atr_count = 0;
2792 } else {
2793 ring->atr_sample_rate = 0;
2794 }
2795
2796 /* configure XPS */
2797 i40e_config_xps_tx_ring(ring);
2798
2799 /* clear the context structure first */
2800 memset(&tx_ctx, 0, sizeof(tx_ctx));
2801
2802 tx_ctx.new_context = 1;
2803 tx_ctx.base = (ring->dma / 128);
2804 tx_ctx.qlen = ring->count;
2805 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2806 I40E_FLAG_FD_ATR_ENABLED));
2807 #ifdef I40E_FCOE
2808 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2809 #endif
2810 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2811 /* FDIR VSI tx ring can still use RS bit and writebacks */
2812 if (vsi->type != I40E_VSI_FDIR)
2813 tx_ctx.head_wb_ena = 1;
2814 tx_ctx.head_wb_addr = ring->dma +
2815 (ring->count * sizeof(struct i40e_tx_desc));
2816
2817 /* As part of VSI creation/update, FW allocates certain
2818 * Tx arbitration queue sets for each TC enabled for
2819 * the VSI. The FW returns the handles to these queue
2820 * sets as part of the response buffer to Add VSI,
2821 * Update VSI, etc. AQ commands. It is expected that
2822 * these queue set handles be associated with the Tx
2823 * queues by the driver as part of the TX queue context
2824 * initialization. This has to be done regardless of
2825 * DCB as by default everything is mapped to TC0.
2826 */
2827 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2828 tx_ctx.rdylist_act = 0;
2829
2830 /* clear the context in the HMC */
2831 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2832 if (err) {
2833 dev_info(&vsi->back->pdev->dev,
2834 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2835 ring->queue_index, pf_q, err);
2836 return -ENOMEM;
2837 }
2838
2839 /* set the context in the HMC */
2840 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2841 if (err) {
2842 dev_info(&vsi->back->pdev->dev,
2843 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2844 ring->queue_index, pf_q, err);
2845 return -ENOMEM;
2846 }
2847
2848 /* Now associate this queue with this PCI function */
2849 if (vsi->type == I40E_VSI_VMDQ2) {
2850 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2851 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2852 I40E_QTX_CTL_VFVM_INDX_MASK;
2853 } else {
2854 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2855 }
2856
2857 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2858 I40E_QTX_CTL_PF_INDX_MASK);
2859 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2860 i40e_flush(hw);
2861
2862 /* cache tail off for easier writes later */
2863 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2864
2865 return 0;
2866 }
2867
2868 /**
2869 * i40e_configure_rx_ring - Configure a receive ring context
2870 * @ring: The Rx ring to configure
2871 *
2872 * Configure the Rx descriptor ring in the HMC context.
2873 **/
2874 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2875 {
2876 struct i40e_vsi *vsi = ring->vsi;
2877 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2878 u16 pf_q = vsi->base_queue + ring->queue_index;
2879 struct i40e_hw *hw = &vsi->back->hw;
2880 struct i40e_hmc_obj_rxq rx_ctx;
2881 i40e_status err = 0;
2882
2883 ring->state = 0;
2884
2885 /* clear the context structure first */
2886 memset(&rx_ctx, 0, sizeof(rx_ctx));
2887
2888 ring->rx_buf_len = vsi->rx_buf_len;
2889
2890 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2891
2892 rx_ctx.base = (ring->dma / 128);
2893 rx_ctx.qlen = ring->count;
2894
2895 /* use 32 byte descriptors */
2896 rx_ctx.dsize = 1;
2897
2898 /* descriptor type is always zero
2899 * rx_ctx.dtype = 0;
2900 */
2901 rx_ctx.hsplit_0 = 0;
2902
2903 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
2904 if (hw->revision_id == 0)
2905 rx_ctx.lrxqthresh = 0;
2906 else
2907 rx_ctx.lrxqthresh = 2;
2908 rx_ctx.crcstrip = 1;
2909 rx_ctx.l2tsel = 1;
2910 /* this controls whether VLAN is stripped from inner headers */
2911 rx_ctx.showiv = 0;
2912 #ifdef I40E_FCOE
2913 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2914 #endif
2915 /* set the prefena field to 1 because the manual says to */
2916 rx_ctx.prefena = 1;
2917
2918 /* clear the context in the HMC */
2919 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2920 if (err) {
2921 dev_info(&vsi->back->pdev->dev,
2922 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2923 ring->queue_index, pf_q, err);
2924 return -ENOMEM;
2925 }
2926
2927 /* set the context in the HMC */
2928 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2929 if (err) {
2930 dev_info(&vsi->back->pdev->dev,
2931 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2932 ring->queue_index, pf_q, err);
2933 return -ENOMEM;
2934 }
2935
2936 /* cache tail for quicker writes, and clear the reg before use */
2937 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2938 writel(0, ring->tail);
2939
2940 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2941
2942 return 0;
2943 }
2944
2945 /**
2946 * i40e_vsi_configure_tx - Configure the VSI for Tx
2947 * @vsi: VSI structure describing this set of rings and resources
2948 *
2949 * Configure the Tx VSI for operation.
2950 **/
2951 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2952 {
2953 int err = 0;
2954 u16 i;
2955
2956 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2957 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2958
2959 return err;
2960 }
2961
2962 /**
2963 * i40e_vsi_configure_rx - Configure the VSI for Rx
2964 * @vsi: the VSI being configured
2965 *
2966 * Configure the Rx VSI for operation.
2967 **/
2968 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2969 {
2970 int err = 0;
2971 u16 i;
2972
2973 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2974 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2975 + ETH_FCS_LEN + VLAN_HLEN;
2976 else
2977 vsi->max_frame = I40E_RXBUFFER_2048;
2978
2979 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2980
2981 #ifdef I40E_FCOE
2982 /* setup rx buffer for FCoE */
2983 if ((vsi->type == I40E_VSI_FCOE) &&
2984 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2985 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2986 vsi->max_frame = I40E_RXBUFFER_3072;
2987 }
2988
2989 #endif /* I40E_FCOE */
2990 /* round up for the chip's needs */
2991 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2992 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2993
2994 /* set up individual rings */
2995 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2996 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2997
2998 return err;
2999 }
3000
3001 /**
3002 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3003 * @vsi: ptr to the VSI
3004 **/
3005 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3006 {
3007 struct i40e_ring *tx_ring, *rx_ring;
3008 u16 qoffset, qcount;
3009 int i, n;
3010
3011 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3012 /* Reset the TC information */
3013 for (i = 0; i < vsi->num_queue_pairs; i++) {
3014 rx_ring = vsi->rx_rings[i];
3015 tx_ring = vsi->tx_rings[i];
3016 rx_ring->dcb_tc = 0;
3017 tx_ring->dcb_tc = 0;
3018 }
3019 }
3020
3021 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3022 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3023 continue;
3024
3025 qoffset = vsi->tc_config.tc_info[n].qoffset;
3026 qcount = vsi->tc_config.tc_info[n].qcount;
3027 for (i = qoffset; i < (qoffset + qcount); i++) {
3028 rx_ring = vsi->rx_rings[i];
3029 tx_ring = vsi->tx_rings[i];
3030 rx_ring->dcb_tc = n;
3031 tx_ring->dcb_tc = n;
3032 }
3033 }
3034 }
3035
3036 /**
3037 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3038 * @vsi: ptr to the VSI
3039 **/
3040 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3041 {
3042 if (vsi->netdev)
3043 i40e_set_rx_mode(vsi->netdev);
3044 }
3045
3046 /**
3047 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3048 * @vsi: Pointer to the targeted VSI
3049 *
3050 * This function replays the hlist on the hw where all the SB Flow Director
3051 * filters were saved.
3052 **/
3053 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3054 {
3055 struct i40e_fdir_filter *filter;
3056 struct i40e_pf *pf = vsi->back;
3057 struct hlist_node *node;
3058
3059 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3060 return;
3061
3062 hlist_for_each_entry_safe(filter, node,
3063 &pf->fdir_filter_list, fdir_node) {
3064 i40e_add_del_fdir(vsi, filter, true);
3065 }
3066 }
3067
3068 /**
3069 * i40e_vsi_configure - Set up the VSI for action
3070 * @vsi: the VSI being configured
3071 **/
3072 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3073 {
3074 int err;
3075
3076 i40e_set_vsi_rx_mode(vsi);
3077 i40e_restore_vlan(vsi);
3078 i40e_vsi_config_dcb_rings(vsi);
3079 err = i40e_vsi_configure_tx(vsi);
3080 if (!err)
3081 err = i40e_vsi_configure_rx(vsi);
3082
3083 return err;
3084 }
3085
3086 /**
3087 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3088 * @vsi: the VSI being configured
3089 **/
3090 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3091 {
3092 struct i40e_pf *pf = vsi->back;
3093 struct i40e_hw *hw = &pf->hw;
3094 u16 vector;
3095 int i, q;
3096 u32 qp;
3097
3098 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3099 * and PFINT_LNKLSTn registers, e.g.:
3100 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3101 */
3102 qp = vsi->base_queue;
3103 vector = vsi->base_vector;
3104 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3105 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3106
3107 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3108 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3109 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3110 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3111 q_vector->rx.itr);
3112 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3113 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3114 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3115 q_vector->tx.itr);
3116 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3117 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3118
3119 /* Linked list for the queuepairs assigned to this vector */
3120 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3121 for (q = 0; q < q_vector->num_ringpairs; q++) {
3122 u32 val;
3123
3124 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3125 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3126 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3127 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3128 (I40E_QUEUE_TYPE_TX
3129 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3130
3131 wr32(hw, I40E_QINT_RQCTL(qp), val);
3132
3133 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3134 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3135 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3136 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3137 (I40E_QUEUE_TYPE_RX
3138 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3139
3140 /* Terminate the linked list */
3141 if (q == (q_vector->num_ringpairs - 1))
3142 val |= (I40E_QUEUE_END_OF_LIST
3143 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3144
3145 wr32(hw, I40E_QINT_TQCTL(qp), val);
3146 qp++;
3147 }
3148 }
3149
3150 i40e_flush(hw);
3151 }
3152
3153 /**
3154 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3155 * @hw: ptr to the hardware info
3156 **/
3157 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3158 {
3159 struct i40e_hw *hw = &pf->hw;
3160 u32 val;
3161
3162 /* clear things first */
3163 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3164 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3165
3166 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3167 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3168 I40E_PFINT_ICR0_ENA_GRST_MASK |
3169 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3170 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3171 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3172 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3173 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3174
3175 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3176 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3177
3178 if (pf->flags & I40E_FLAG_PTP)
3179 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3180
3181 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3182
3183 /* SW_ITR_IDX = 0, but don't change INTENA */
3184 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3185 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3186
3187 /* OTHER_ITR_IDX = 0 */
3188 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3189 }
3190
3191 /**
3192 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3193 * @vsi: the VSI being configured
3194 **/
3195 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3196 {
3197 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3198 struct i40e_pf *pf = vsi->back;
3199 struct i40e_hw *hw = &pf->hw;
3200 u32 val;
3201
3202 /* set the ITR configuration */
3203 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3204 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3205 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3206 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3207 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3208 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3209 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3210
3211 i40e_enable_misc_int_causes(pf);
3212
3213 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3214 wr32(hw, I40E_PFINT_LNKLST0, 0);
3215
3216 /* Associate the queue pair to the vector and enable the queue int */
3217 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3218 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3219 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3220
3221 wr32(hw, I40E_QINT_RQCTL(0), val);
3222
3223 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3224 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3225 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3226
3227 wr32(hw, I40E_QINT_TQCTL(0), val);
3228 i40e_flush(hw);
3229 }
3230
3231 /**
3232 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3233 * @pf: board private structure
3234 **/
3235 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3236 {
3237 struct i40e_hw *hw = &pf->hw;
3238
3239 wr32(hw, I40E_PFINT_DYN_CTL0,
3240 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3241 i40e_flush(hw);
3242 }
3243
3244 /**
3245 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3246 * @pf: board private structure
3247 * @clearpba: true when all pending interrupt events should be cleared
3248 **/
3249 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3250 {
3251 struct i40e_hw *hw = &pf->hw;
3252 u32 val;
3253
3254 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3255 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3256 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3257
3258 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3259 i40e_flush(hw);
3260 }
3261
3262 /**
3263 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3264 * @irq: interrupt number
3265 * @data: pointer to a q_vector
3266 **/
3267 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3268 {
3269 struct i40e_q_vector *q_vector = data;
3270
3271 if (!q_vector->tx.ring && !q_vector->rx.ring)
3272 return IRQ_HANDLED;
3273
3274 napi_schedule_irqoff(&q_vector->napi);
3275
3276 return IRQ_HANDLED;
3277 }
3278
3279 /**
3280 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3281 * @vsi: the VSI being configured
3282 * @basename: name for the vector
3283 *
3284 * Allocates MSI-X vectors and requests interrupts from the kernel.
3285 **/
3286 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3287 {
3288 int q_vectors = vsi->num_q_vectors;
3289 struct i40e_pf *pf = vsi->back;
3290 int base = vsi->base_vector;
3291 int rx_int_idx = 0;
3292 int tx_int_idx = 0;
3293 int vector, err;
3294
3295 for (vector = 0; vector < q_vectors; vector++) {
3296 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3297
3298 if (q_vector->tx.ring && q_vector->rx.ring) {
3299 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3300 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3301 tx_int_idx++;
3302 } else if (q_vector->rx.ring) {
3303 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3304 "%s-%s-%d", basename, "rx", rx_int_idx++);
3305 } else if (q_vector->tx.ring) {
3306 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3307 "%s-%s-%d", basename, "tx", tx_int_idx++);
3308 } else {
3309 /* skip this unused q_vector */
3310 continue;
3311 }
3312 err = request_irq(pf->msix_entries[base + vector].vector,
3313 vsi->irq_handler,
3314 0,
3315 q_vector->name,
3316 q_vector);
3317 if (err) {
3318 dev_info(&pf->pdev->dev,
3319 "MSIX request_irq failed, error: %d\n", err);
3320 goto free_queue_irqs;
3321 }
3322 /* assign the mask for this irq */
3323 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3324 &q_vector->affinity_mask);
3325 }
3326
3327 vsi->irqs_ready = true;
3328 return 0;
3329
3330 free_queue_irqs:
3331 while (vector) {
3332 vector--;
3333 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3334 NULL);
3335 free_irq(pf->msix_entries[base + vector].vector,
3336 &(vsi->q_vectors[vector]));
3337 }
3338 return err;
3339 }
3340
3341 /**
3342 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3343 * @vsi: the VSI being un-configured
3344 **/
3345 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3346 {
3347 struct i40e_pf *pf = vsi->back;
3348 struct i40e_hw *hw = &pf->hw;
3349 int base = vsi->base_vector;
3350 int i;
3351
3352 for (i = 0; i < vsi->num_queue_pairs; i++) {
3353 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3354 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3355 }
3356
3357 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3358 for (i = vsi->base_vector;
3359 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3360 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3361
3362 i40e_flush(hw);
3363 for (i = 0; i < vsi->num_q_vectors; i++)
3364 synchronize_irq(pf->msix_entries[i + base].vector);
3365 } else {
3366 /* Legacy and MSI mode - this stops all interrupt handling */
3367 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3368 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3369 i40e_flush(hw);
3370 synchronize_irq(pf->pdev->irq);
3371 }
3372 }
3373
3374 /**
3375 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3376 * @vsi: the VSI being configured
3377 **/
3378 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3379 {
3380 struct i40e_pf *pf = vsi->back;
3381 int i;
3382
3383 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3384 for (i = 0; i < vsi->num_q_vectors; i++)
3385 i40e_irq_dynamic_enable(vsi, i);
3386 } else {
3387 i40e_irq_dynamic_enable_icr0(pf, true);
3388 }
3389
3390 i40e_flush(&pf->hw);
3391 return 0;
3392 }
3393
3394 /**
3395 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3396 * @pf: board private structure
3397 **/
3398 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3399 {
3400 /* Disable ICR 0 */
3401 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3402 i40e_flush(&pf->hw);
3403 }
3404
3405 /**
3406 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3407 * @irq: interrupt number
3408 * @data: pointer to a q_vector
3409 *
3410 * This is the handler used for all MSI/Legacy interrupts, and deals
3411 * with both queue and non-queue interrupts. This is also used in
3412 * MSIX mode to handle the non-queue interrupts.
3413 **/
3414 static irqreturn_t i40e_intr(int irq, void *data)
3415 {
3416 struct i40e_pf *pf = (struct i40e_pf *)data;
3417 struct i40e_hw *hw = &pf->hw;
3418 irqreturn_t ret = IRQ_NONE;
3419 u32 icr0, icr0_remaining;
3420 u32 val, ena_mask;
3421
3422 icr0 = rd32(hw, I40E_PFINT_ICR0);
3423 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3424
3425 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3426 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3427 goto enable_intr;
3428
3429 /* if interrupt but no bits showing, must be SWINT */
3430 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3431 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3432 pf->sw_int_count++;
3433
3434 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3435 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3436 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3437 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3438 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3439 }
3440
3441 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3442 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3443 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3444 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3445
3446 /* We do not have a way to disarm Queue causes while leaving
3447 * interrupt enabled for all other causes, ideally
3448 * interrupt should be disabled while we are in NAPI but
3449 * this is not a performance path and napi_schedule()
3450 * can deal with rescheduling.
3451 */
3452 if (!test_bit(__I40E_DOWN, &pf->state))
3453 napi_schedule_irqoff(&q_vector->napi);
3454 }
3455
3456 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3457 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3458 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3459 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3460 }
3461
3462 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3463 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3464 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3465 }
3466
3467 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3468 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3469 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3470 }
3471
3472 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3473 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3474 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3475 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3476 val = rd32(hw, I40E_GLGEN_RSTAT);
3477 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3478 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3479 if (val == I40E_RESET_CORER) {
3480 pf->corer_count++;
3481 } else if (val == I40E_RESET_GLOBR) {
3482 pf->globr_count++;
3483 } else if (val == I40E_RESET_EMPR) {
3484 pf->empr_count++;
3485 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3486 }
3487 }
3488
3489 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3490 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3491 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3492 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3493 rd32(hw, I40E_PFHMC_ERRORINFO),
3494 rd32(hw, I40E_PFHMC_ERRORDATA));
3495 }
3496
3497 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3498 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3499
3500 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3501 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3502 i40e_ptp_tx_hwtstamp(pf);
3503 }
3504 }
3505
3506 /* If a critical error is pending we have no choice but to reset the
3507 * device.
3508 * Report and mask out any remaining unexpected interrupts.
3509 */
3510 icr0_remaining = icr0 & ena_mask;
3511 if (icr0_remaining) {
3512 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3513 icr0_remaining);
3514 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3515 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3516 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3517 dev_info(&pf->pdev->dev, "device will be reset\n");
3518 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3519 i40e_service_event_schedule(pf);
3520 }
3521 ena_mask &= ~icr0_remaining;
3522 }
3523 ret = IRQ_HANDLED;
3524
3525 enable_intr:
3526 /* re-enable interrupt causes */
3527 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3528 if (!test_bit(__I40E_DOWN, &pf->state)) {
3529 i40e_service_event_schedule(pf);
3530 i40e_irq_dynamic_enable_icr0(pf, false);
3531 }
3532
3533 return ret;
3534 }
3535
3536 /**
3537 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3538 * @tx_ring: tx ring to clean
3539 * @budget: how many cleans we're allowed
3540 *
3541 * Returns true if there's any budget left (e.g. the clean is finished)
3542 **/
3543 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3544 {
3545 struct i40e_vsi *vsi = tx_ring->vsi;
3546 u16 i = tx_ring->next_to_clean;
3547 struct i40e_tx_buffer *tx_buf;
3548 struct i40e_tx_desc *tx_desc;
3549
3550 tx_buf = &tx_ring->tx_bi[i];
3551 tx_desc = I40E_TX_DESC(tx_ring, i);
3552 i -= tx_ring->count;
3553
3554 do {
3555 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3556
3557 /* if next_to_watch is not set then there is no work pending */
3558 if (!eop_desc)
3559 break;
3560
3561 /* prevent any other reads prior to eop_desc */
3562 read_barrier_depends();
3563
3564 /* if the descriptor isn't done, no work yet to do */
3565 if (!(eop_desc->cmd_type_offset_bsz &
3566 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3567 break;
3568
3569 /* clear next_to_watch to prevent false hangs */
3570 tx_buf->next_to_watch = NULL;
3571
3572 tx_desc->buffer_addr = 0;
3573 tx_desc->cmd_type_offset_bsz = 0;
3574 /* move past filter desc */
3575 tx_buf++;
3576 tx_desc++;
3577 i++;
3578 if (unlikely(!i)) {
3579 i -= tx_ring->count;
3580 tx_buf = tx_ring->tx_bi;
3581 tx_desc = I40E_TX_DESC(tx_ring, 0);
3582 }
3583 /* unmap skb header data */
3584 dma_unmap_single(tx_ring->dev,
3585 dma_unmap_addr(tx_buf, dma),
3586 dma_unmap_len(tx_buf, len),
3587 DMA_TO_DEVICE);
3588 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3589 kfree(tx_buf->raw_buf);
3590
3591 tx_buf->raw_buf = NULL;
3592 tx_buf->tx_flags = 0;
3593 tx_buf->next_to_watch = NULL;
3594 dma_unmap_len_set(tx_buf, len, 0);
3595 tx_desc->buffer_addr = 0;
3596 tx_desc->cmd_type_offset_bsz = 0;
3597
3598 /* move us past the eop_desc for start of next FD desc */
3599 tx_buf++;
3600 tx_desc++;
3601 i++;
3602 if (unlikely(!i)) {
3603 i -= tx_ring->count;
3604 tx_buf = tx_ring->tx_bi;
3605 tx_desc = I40E_TX_DESC(tx_ring, 0);
3606 }
3607
3608 /* update budget accounting */
3609 budget--;
3610 } while (likely(budget));
3611
3612 i += tx_ring->count;
3613 tx_ring->next_to_clean = i;
3614
3615 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3616 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3617
3618 return budget > 0;
3619 }
3620
3621 /**
3622 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3623 * @irq: interrupt number
3624 * @data: pointer to a q_vector
3625 **/
3626 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3627 {
3628 struct i40e_q_vector *q_vector = data;
3629 struct i40e_vsi *vsi;
3630
3631 if (!q_vector->tx.ring)
3632 return IRQ_HANDLED;
3633
3634 vsi = q_vector->tx.ring->vsi;
3635 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3636
3637 return IRQ_HANDLED;
3638 }
3639
3640 /**
3641 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3642 * @vsi: the VSI being configured
3643 * @v_idx: vector index
3644 * @qp_idx: queue pair index
3645 **/
3646 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3647 {
3648 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3649 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3650 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3651
3652 tx_ring->q_vector = q_vector;
3653 tx_ring->next = q_vector->tx.ring;
3654 q_vector->tx.ring = tx_ring;
3655 q_vector->tx.count++;
3656
3657 rx_ring->q_vector = q_vector;
3658 rx_ring->next = q_vector->rx.ring;
3659 q_vector->rx.ring = rx_ring;
3660 q_vector->rx.count++;
3661 }
3662
3663 /**
3664 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3665 * @vsi: the VSI being configured
3666 *
3667 * This function maps descriptor rings to the queue-specific vectors
3668 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3669 * one vector per queue pair, but on a constrained vector budget, we
3670 * group the queue pairs as "efficiently" as possible.
3671 **/
3672 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3673 {
3674 int qp_remaining = vsi->num_queue_pairs;
3675 int q_vectors = vsi->num_q_vectors;
3676 int num_ringpairs;
3677 int v_start = 0;
3678 int qp_idx = 0;
3679
3680 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3681 * group them so there are multiple queues per vector.
3682 * It is also important to go through all the vectors available to be
3683 * sure that if we don't use all the vectors, that the remaining vectors
3684 * are cleared. This is especially important when decreasing the
3685 * number of queues in use.
3686 */
3687 for (; v_start < q_vectors; v_start++) {
3688 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3689
3690 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3691
3692 q_vector->num_ringpairs = num_ringpairs;
3693
3694 q_vector->rx.count = 0;
3695 q_vector->tx.count = 0;
3696 q_vector->rx.ring = NULL;
3697 q_vector->tx.ring = NULL;
3698
3699 while (num_ringpairs--) {
3700 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3701 qp_idx++;
3702 qp_remaining--;
3703 }
3704 }
3705 }
3706
3707 /**
3708 * i40e_vsi_request_irq - Request IRQ from the OS
3709 * @vsi: the VSI being configured
3710 * @basename: name for the vector
3711 **/
3712 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3713 {
3714 struct i40e_pf *pf = vsi->back;
3715 int err;
3716
3717 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3718 err = i40e_vsi_request_irq_msix(vsi, basename);
3719 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3720 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3721 pf->int_name, pf);
3722 else
3723 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3724 pf->int_name, pf);
3725
3726 if (err)
3727 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3728
3729 return err;
3730 }
3731
3732 #ifdef CONFIG_NET_POLL_CONTROLLER
3733 /**
3734 * i40e_netpoll - A Polling 'interrupt' handler
3735 * @netdev: network interface device structure
3736 *
3737 * This is used by netconsole to send skbs without having to re-enable
3738 * interrupts. It's not called while the normal interrupt routine is executing.
3739 **/
3740 #ifdef I40E_FCOE
3741 void i40e_netpoll(struct net_device *netdev)
3742 #else
3743 static void i40e_netpoll(struct net_device *netdev)
3744 #endif
3745 {
3746 struct i40e_netdev_priv *np = netdev_priv(netdev);
3747 struct i40e_vsi *vsi = np->vsi;
3748 struct i40e_pf *pf = vsi->back;
3749 int i;
3750
3751 /* if interface is down do nothing */
3752 if (test_bit(__I40E_DOWN, &vsi->state))
3753 return;
3754
3755 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3756 for (i = 0; i < vsi->num_q_vectors; i++)
3757 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3758 } else {
3759 i40e_intr(pf->pdev->irq, netdev);
3760 }
3761 }
3762 #endif
3763
3764 /**
3765 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3766 * @pf: the PF being configured
3767 * @pf_q: the PF queue
3768 * @enable: enable or disable state of the queue
3769 *
3770 * This routine will wait for the given Tx queue of the PF to reach the
3771 * enabled or disabled state.
3772 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3773 * multiple retries; else will return 0 in case of success.
3774 **/
3775 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3776 {
3777 int i;
3778 u32 tx_reg;
3779
3780 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3781 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3782 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3783 break;
3784
3785 usleep_range(10, 20);
3786 }
3787 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3788 return -ETIMEDOUT;
3789
3790 return 0;
3791 }
3792
3793 /**
3794 * i40e_vsi_control_tx - Start or stop a VSI's rings
3795 * @vsi: the VSI being configured
3796 * @enable: start or stop the rings
3797 **/
3798 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3799 {
3800 struct i40e_pf *pf = vsi->back;
3801 struct i40e_hw *hw = &pf->hw;
3802 int i, j, pf_q, ret = 0;
3803 u32 tx_reg;
3804
3805 pf_q = vsi->base_queue;
3806 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3807
3808 /* warn the TX unit of coming changes */
3809 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3810 if (!enable)
3811 usleep_range(10, 20);
3812
3813 for (j = 0; j < 50; j++) {
3814 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3815 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3816 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3817 break;
3818 usleep_range(1000, 2000);
3819 }
3820 /* Skip if the queue is already in the requested state */
3821 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3822 continue;
3823
3824 /* turn on/off the queue */
3825 if (enable) {
3826 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3827 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3828 } else {
3829 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3830 }
3831
3832 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3833 /* No waiting for the Tx queue to disable */
3834 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3835 continue;
3836
3837 /* wait for the change to finish */
3838 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3839 if (ret) {
3840 dev_info(&pf->pdev->dev,
3841 "VSI seid %d Tx ring %d %sable timeout\n",
3842 vsi->seid, pf_q, (enable ? "en" : "dis"));
3843 break;
3844 }
3845 }
3846
3847 if (hw->revision_id == 0)
3848 mdelay(50);
3849 return ret;
3850 }
3851
3852 /**
3853 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3854 * @pf: the PF being configured
3855 * @pf_q: the PF queue
3856 * @enable: enable or disable state of the queue
3857 *
3858 * This routine will wait for the given Rx queue of the PF to reach the
3859 * enabled or disabled state.
3860 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3861 * multiple retries; else will return 0 in case of success.
3862 **/
3863 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3864 {
3865 int i;
3866 u32 rx_reg;
3867
3868 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3869 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3870 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3871 break;
3872
3873 usleep_range(10, 20);
3874 }
3875 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3876 return -ETIMEDOUT;
3877
3878 return 0;
3879 }
3880
3881 /**
3882 * i40e_vsi_control_rx - Start or stop a VSI's rings
3883 * @vsi: the VSI being configured
3884 * @enable: start or stop the rings
3885 **/
3886 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3887 {
3888 struct i40e_pf *pf = vsi->back;
3889 struct i40e_hw *hw = &pf->hw;
3890 int i, j, pf_q, ret = 0;
3891 u32 rx_reg;
3892
3893 pf_q = vsi->base_queue;
3894 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3895 for (j = 0; j < 50; j++) {
3896 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3897 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3898 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3899 break;
3900 usleep_range(1000, 2000);
3901 }
3902
3903 /* Skip if the queue is already in the requested state */
3904 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3905 continue;
3906
3907 /* turn on/off the queue */
3908 if (enable)
3909 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3910 else
3911 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3912 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3913 /* No waiting for the Tx queue to disable */
3914 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3915 continue;
3916
3917 /* wait for the change to finish */
3918 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3919 if (ret) {
3920 dev_info(&pf->pdev->dev,
3921 "VSI seid %d Rx ring %d %sable timeout\n",
3922 vsi->seid, pf_q, (enable ? "en" : "dis"));
3923 break;
3924 }
3925 }
3926
3927 return ret;
3928 }
3929
3930 /**
3931 * i40e_vsi_control_rings - Start or stop a VSI's rings
3932 * @vsi: the VSI being configured
3933 * @enable: start or stop the rings
3934 **/
3935 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3936 {
3937 int ret = 0;
3938
3939 /* do rx first for enable and last for disable */
3940 if (request) {
3941 ret = i40e_vsi_control_rx(vsi, request);
3942 if (ret)
3943 return ret;
3944 ret = i40e_vsi_control_tx(vsi, request);
3945 } else {
3946 /* Ignore return value, we need to shutdown whatever we can */
3947 i40e_vsi_control_tx(vsi, request);
3948 i40e_vsi_control_rx(vsi, request);
3949 }
3950
3951 return ret;
3952 }
3953
3954 /**
3955 * i40e_vsi_free_irq - Free the irq association with the OS
3956 * @vsi: the VSI being configured
3957 **/
3958 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3959 {
3960 struct i40e_pf *pf = vsi->back;
3961 struct i40e_hw *hw = &pf->hw;
3962 int base = vsi->base_vector;
3963 u32 val, qp;
3964 int i;
3965
3966 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3967 if (!vsi->q_vectors)
3968 return;
3969
3970 if (!vsi->irqs_ready)
3971 return;
3972
3973 vsi->irqs_ready = false;
3974 for (i = 0; i < vsi->num_q_vectors; i++) {
3975 u16 vector = i + base;
3976
3977 /* free only the irqs that were actually requested */
3978 if (!vsi->q_vectors[i] ||
3979 !vsi->q_vectors[i]->num_ringpairs)
3980 continue;
3981
3982 /* clear the affinity_mask in the IRQ descriptor */
3983 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3984 NULL);
3985 synchronize_irq(pf->msix_entries[vector].vector);
3986 free_irq(pf->msix_entries[vector].vector,
3987 vsi->q_vectors[i]);
3988
3989 /* Tear down the interrupt queue link list
3990 *
3991 * We know that they come in pairs and always
3992 * the Rx first, then the Tx. To clear the
3993 * link list, stick the EOL value into the
3994 * next_q field of the registers.
3995 */
3996 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3997 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3998 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3999 val |= I40E_QUEUE_END_OF_LIST
4000 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4001 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4002
4003 while (qp != I40E_QUEUE_END_OF_LIST) {
4004 u32 next;
4005
4006 val = rd32(hw, I40E_QINT_RQCTL(qp));
4007
4008 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4009 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4010 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4011 I40E_QINT_RQCTL_INTEVENT_MASK);
4012
4013 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4014 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4015
4016 wr32(hw, I40E_QINT_RQCTL(qp), val);
4017
4018 val = rd32(hw, I40E_QINT_TQCTL(qp));
4019
4020 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4021 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4022
4023 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4024 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4025 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4026 I40E_QINT_TQCTL_INTEVENT_MASK);
4027
4028 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4029 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4030
4031 wr32(hw, I40E_QINT_TQCTL(qp), val);
4032 qp = next;
4033 }
4034 }
4035 } else {
4036 free_irq(pf->pdev->irq, pf);
4037
4038 val = rd32(hw, I40E_PFINT_LNKLST0);
4039 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4040 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4041 val |= I40E_QUEUE_END_OF_LIST
4042 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4043 wr32(hw, I40E_PFINT_LNKLST0, val);
4044
4045 val = rd32(hw, I40E_QINT_RQCTL(qp));
4046 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4047 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4048 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4049 I40E_QINT_RQCTL_INTEVENT_MASK);
4050
4051 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4052 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4053
4054 wr32(hw, I40E_QINT_RQCTL(qp), val);
4055
4056 val = rd32(hw, I40E_QINT_TQCTL(qp));
4057
4058 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4059 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4060 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4061 I40E_QINT_TQCTL_INTEVENT_MASK);
4062
4063 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4064 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4065
4066 wr32(hw, I40E_QINT_TQCTL(qp), val);
4067 }
4068 }
4069
4070 /**
4071 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4072 * @vsi: the VSI being configured
4073 * @v_idx: Index of vector to be freed
4074 *
4075 * This function frees the memory allocated to the q_vector. In addition if
4076 * NAPI is enabled it will delete any references to the NAPI struct prior
4077 * to freeing the q_vector.
4078 **/
4079 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4080 {
4081 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4082 struct i40e_ring *ring;
4083
4084 if (!q_vector)
4085 return;
4086
4087 /* disassociate q_vector from rings */
4088 i40e_for_each_ring(ring, q_vector->tx)
4089 ring->q_vector = NULL;
4090
4091 i40e_for_each_ring(ring, q_vector->rx)
4092 ring->q_vector = NULL;
4093
4094 /* only VSI w/ an associated netdev is set up w/ NAPI */
4095 if (vsi->netdev)
4096 netif_napi_del(&q_vector->napi);
4097
4098 vsi->q_vectors[v_idx] = NULL;
4099
4100 kfree_rcu(q_vector, rcu);
4101 }
4102
4103 /**
4104 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4105 * @vsi: the VSI being un-configured
4106 *
4107 * This frees the memory allocated to the q_vectors and
4108 * deletes references to the NAPI struct.
4109 **/
4110 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4111 {
4112 int v_idx;
4113
4114 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4115 i40e_free_q_vector(vsi, v_idx);
4116 }
4117
4118 /**
4119 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4120 * @pf: board private structure
4121 **/
4122 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4123 {
4124 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4125 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4126 pci_disable_msix(pf->pdev);
4127 kfree(pf->msix_entries);
4128 pf->msix_entries = NULL;
4129 kfree(pf->irq_pile);
4130 pf->irq_pile = NULL;
4131 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4132 pci_disable_msi(pf->pdev);
4133 }
4134 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4135 }
4136
4137 /**
4138 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4139 * @pf: board private structure
4140 *
4141 * We go through and clear interrupt specific resources and reset the structure
4142 * to pre-load conditions
4143 **/
4144 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4145 {
4146 int i;
4147
4148 i40e_stop_misc_vector(pf);
4149 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4150 synchronize_irq(pf->msix_entries[0].vector);
4151 free_irq(pf->msix_entries[0].vector, pf);
4152 }
4153
4154 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4155 I40E_IWARP_IRQ_PILE_ID);
4156
4157 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4158 for (i = 0; i < pf->num_alloc_vsi; i++)
4159 if (pf->vsi[i])
4160 i40e_vsi_free_q_vectors(pf->vsi[i]);
4161 i40e_reset_interrupt_capability(pf);
4162 }
4163
4164 /**
4165 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4166 * @vsi: the VSI being configured
4167 **/
4168 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4169 {
4170 int q_idx;
4171
4172 if (!vsi->netdev)
4173 return;
4174
4175 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4176 napi_enable(&vsi->q_vectors[q_idx]->napi);
4177 }
4178
4179 /**
4180 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4181 * @vsi: the VSI being configured
4182 **/
4183 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4184 {
4185 int q_idx;
4186
4187 if (!vsi->netdev)
4188 return;
4189
4190 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4191 napi_disable(&vsi->q_vectors[q_idx]->napi);
4192 }
4193
4194 /**
4195 * i40e_vsi_close - Shut down a VSI
4196 * @vsi: the vsi to be quelled
4197 **/
4198 static void i40e_vsi_close(struct i40e_vsi *vsi)
4199 {
4200 bool reset = false;
4201
4202 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4203 i40e_down(vsi);
4204 i40e_vsi_free_irq(vsi);
4205 i40e_vsi_free_tx_resources(vsi);
4206 i40e_vsi_free_rx_resources(vsi);
4207 vsi->current_netdev_flags = 0;
4208 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4209 reset = true;
4210 i40e_notify_client_of_netdev_close(vsi, reset);
4211 }
4212
4213 /**
4214 * i40e_quiesce_vsi - Pause a given VSI
4215 * @vsi: the VSI being paused
4216 **/
4217 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4218 {
4219 if (test_bit(__I40E_DOWN, &vsi->state))
4220 return;
4221
4222 /* No need to disable FCoE VSI when Tx suspended */
4223 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4224 vsi->type == I40E_VSI_FCOE) {
4225 dev_dbg(&vsi->back->pdev->dev,
4226 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4227 return;
4228 }
4229
4230 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4231 if (vsi->netdev && netif_running(vsi->netdev))
4232 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4233 else
4234 i40e_vsi_close(vsi);
4235 }
4236
4237 /**
4238 * i40e_unquiesce_vsi - Resume a given VSI
4239 * @vsi: the VSI being resumed
4240 **/
4241 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4242 {
4243 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4244 return;
4245
4246 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4247 if (vsi->netdev && netif_running(vsi->netdev))
4248 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4249 else
4250 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4251 }
4252
4253 /**
4254 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4255 * @pf: the PF
4256 **/
4257 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4258 {
4259 int v;
4260
4261 for (v = 0; v < pf->num_alloc_vsi; v++) {
4262 if (pf->vsi[v])
4263 i40e_quiesce_vsi(pf->vsi[v]);
4264 }
4265 }
4266
4267 /**
4268 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4269 * @pf: the PF
4270 **/
4271 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4272 {
4273 int v;
4274
4275 for (v = 0; v < pf->num_alloc_vsi; v++) {
4276 if (pf->vsi[v])
4277 i40e_unquiesce_vsi(pf->vsi[v]);
4278 }
4279 }
4280
4281 #ifdef CONFIG_I40E_DCB
4282 /**
4283 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4284 * @vsi: the VSI being configured
4285 *
4286 * This function waits for the given VSI's queues to be disabled.
4287 **/
4288 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4289 {
4290 struct i40e_pf *pf = vsi->back;
4291 int i, pf_q, ret;
4292
4293 pf_q = vsi->base_queue;
4294 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4295 /* Check and wait for the disable status of the queue */
4296 ret = i40e_pf_txq_wait(pf, pf_q, false);
4297 if (ret) {
4298 dev_info(&pf->pdev->dev,
4299 "VSI seid %d Tx ring %d disable timeout\n",
4300 vsi->seid, pf_q);
4301 return ret;
4302 }
4303 }
4304
4305 pf_q = vsi->base_queue;
4306 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4307 /* Check and wait for the disable status of the queue */
4308 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4309 if (ret) {
4310 dev_info(&pf->pdev->dev,
4311 "VSI seid %d Rx ring %d disable timeout\n",
4312 vsi->seid, pf_q);
4313 return ret;
4314 }
4315 }
4316
4317 return 0;
4318 }
4319
4320 /**
4321 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4322 * @pf: the PF
4323 *
4324 * This function waits for the queues to be in disabled state for all the
4325 * VSIs that are managed by this PF.
4326 **/
4327 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4328 {
4329 int v, ret = 0;
4330
4331 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4332 /* No need to wait for FCoE VSI queues */
4333 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4334 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4335 if (ret)
4336 break;
4337 }
4338 }
4339
4340 return ret;
4341 }
4342
4343 #endif
4344
4345 /**
4346 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4347 * @q_idx: TX queue number
4348 * @vsi: Pointer to VSI struct
4349 *
4350 * This function checks specified queue for given VSI. Detects hung condition.
4351 * Sets hung bit since it is two step process. Before next run of service task
4352 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4353 * hung condition remain unchanged and during subsequent run, this function
4354 * issues SW interrupt to recover from hung condition.
4355 **/
4356 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4357 {
4358 struct i40e_ring *tx_ring = NULL;
4359 struct i40e_pf *pf;
4360 u32 head, val, tx_pending_hw;
4361 int i;
4362
4363 pf = vsi->back;
4364
4365 /* now that we have an index, find the tx_ring struct */
4366 for (i = 0; i < vsi->num_queue_pairs; i++) {
4367 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4368 if (q_idx == vsi->tx_rings[i]->queue_index) {
4369 tx_ring = vsi->tx_rings[i];
4370 break;
4371 }
4372 }
4373 }
4374
4375 if (!tx_ring)
4376 return;
4377
4378 /* Read interrupt register */
4379 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4380 val = rd32(&pf->hw,
4381 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4382 tx_ring->vsi->base_vector - 1));
4383 else
4384 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4385
4386 head = i40e_get_head(tx_ring);
4387
4388 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4389
4390 /* HW is done executing descriptors, updated HEAD write back,
4391 * but SW hasn't processed those descriptors. If interrupt is
4392 * not generated from this point ON, it could result into
4393 * dev_watchdog detecting timeout on those netdev_queue,
4394 * hence proactively trigger SW interrupt.
4395 */
4396 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4397 /* NAPI Poll didn't run and clear since it was set */
4398 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4399 &tx_ring->q_vector->hung_detected)) {
4400 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4401 vsi->seid, q_idx, tx_pending_hw,
4402 tx_ring->next_to_clean, head,
4403 tx_ring->next_to_use,
4404 readl(tx_ring->tail));
4405 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4406 vsi->seid, q_idx, val);
4407 i40e_force_wb(vsi, tx_ring->q_vector);
4408 } else {
4409 /* First Chance - detected possible hung */
4410 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4411 &tx_ring->q_vector->hung_detected);
4412 }
4413 }
4414
4415 /* This is the case where we have interrupts missing,
4416 * so the tx_pending in HW will most likely be 0, but we
4417 * will have tx_pending in SW since the WB happened but the
4418 * interrupt got lost.
4419 */
4420 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4421 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4422 if (napi_reschedule(&tx_ring->q_vector->napi))
4423 tx_ring->tx_stats.tx_lost_interrupt++;
4424 }
4425 }
4426
4427 /**
4428 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4429 * @pf: pointer to PF struct
4430 *
4431 * LAN VSI has netdev and netdev has TX queues. This function is to check
4432 * each of those TX queues if they are hung, trigger recovery by issuing
4433 * SW interrupt.
4434 **/
4435 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4436 {
4437 struct net_device *netdev;
4438 struct i40e_vsi *vsi;
4439 int i;
4440
4441 /* Only for LAN VSI */
4442 vsi = pf->vsi[pf->lan_vsi];
4443
4444 if (!vsi)
4445 return;
4446
4447 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4448 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4449 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4450 return;
4451
4452 /* Make sure type is MAIN VSI */
4453 if (vsi->type != I40E_VSI_MAIN)
4454 return;
4455
4456 netdev = vsi->netdev;
4457 if (!netdev)
4458 return;
4459
4460 /* Bail out if netif_carrier is not OK */
4461 if (!netif_carrier_ok(netdev))
4462 return;
4463
4464 /* Go thru' TX queues for netdev */
4465 for (i = 0; i < netdev->num_tx_queues; i++) {
4466 struct netdev_queue *q;
4467
4468 q = netdev_get_tx_queue(netdev, i);
4469 if (q)
4470 i40e_detect_recover_hung_queue(i, vsi);
4471 }
4472 }
4473
4474 /**
4475 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4476 * @pf: pointer to PF
4477 *
4478 * Get TC map for ISCSI PF type that will include iSCSI TC
4479 * and LAN TC.
4480 **/
4481 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4482 {
4483 struct i40e_dcb_app_priority_table app;
4484 struct i40e_hw *hw = &pf->hw;
4485 u8 enabled_tc = 1; /* TC0 is always enabled */
4486 u8 tc, i;
4487 /* Get the iSCSI APP TLV */
4488 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4489
4490 for (i = 0; i < dcbcfg->numapps; i++) {
4491 app = dcbcfg->app[i];
4492 if (app.selector == I40E_APP_SEL_TCPIP &&
4493 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4494 tc = dcbcfg->etscfg.prioritytable[app.priority];
4495 enabled_tc |= BIT(tc);
4496 break;
4497 }
4498 }
4499
4500 return enabled_tc;
4501 }
4502
4503 /**
4504 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4505 * @dcbcfg: the corresponding DCBx configuration structure
4506 *
4507 * Return the number of TCs from given DCBx configuration
4508 **/
4509 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4510 {
4511 u8 num_tc = 0;
4512 int i;
4513
4514 /* Scan the ETS Config Priority Table to find
4515 * traffic class enabled for a given priority
4516 * and use the traffic class index to get the
4517 * number of traffic classes enabled
4518 */
4519 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4520 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4521 num_tc = dcbcfg->etscfg.prioritytable[i];
4522 }
4523
4524 /* Traffic class index starts from zero so
4525 * increment to return the actual count
4526 */
4527 return num_tc + 1;
4528 }
4529
4530 /**
4531 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4532 * @dcbcfg: the corresponding DCBx configuration structure
4533 *
4534 * Query the current DCB configuration and return the number of
4535 * traffic classes enabled from the given DCBX config
4536 **/
4537 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4538 {
4539 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4540 u8 enabled_tc = 1;
4541 u8 i;
4542
4543 for (i = 0; i < num_tc; i++)
4544 enabled_tc |= BIT(i);
4545
4546 return enabled_tc;
4547 }
4548
4549 /**
4550 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4551 * @pf: PF being queried
4552 *
4553 * Return number of traffic classes enabled for the given PF
4554 **/
4555 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4556 {
4557 struct i40e_hw *hw = &pf->hw;
4558 u8 i, enabled_tc;
4559 u8 num_tc = 0;
4560 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4561
4562 /* If DCB is not enabled then always in single TC */
4563 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4564 return 1;
4565
4566 /* SFP mode will be enabled for all TCs on port */
4567 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4568 return i40e_dcb_get_num_tc(dcbcfg);
4569
4570 /* MFP mode return count of enabled TCs for this PF */
4571 if (pf->hw.func_caps.iscsi)
4572 enabled_tc = i40e_get_iscsi_tc_map(pf);
4573 else
4574 return 1; /* Only TC0 */
4575
4576 /* At least have TC0 */
4577 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4578 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4579 if (enabled_tc & BIT(i))
4580 num_tc++;
4581 }
4582 return num_tc;
4583 }
4584
4585 /**
4586 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4587 * @pf: PF being queried
4588 *
4589 * Return a bitmap for first enabled traffic class for this PF.
4590 **/
4591 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4592 {
4593 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4594 u8 i = 0;
4595
4596 if (!enabled_tc)
4597 return 0x1; /* TC0 */
4598
4599 /* Find the first enabled TC */
4600 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4601 if (enabled_tc & BIT(i))
4602 break;
4603 }
4604
4605 return BIT(i);
4606 }
4607
4608 /**
4609 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4610 * @pf: PF being queried
4611 *
4612 * Return a bitmap for enabled traffic classes for this PF.
4613 **/
4614 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4615 {
4616 /* If DCB is not enabled for this PF then just return default TC */
4617 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4618 return i40e_pf_get_default_tc(pf);
4619
4620 /* SFP mode we want PF to be enabled for all TCs */
4621 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4622 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4623
4624 /* MFP enabled and iSCSI PF type */
4625 if (pf->hw.func_caps.iscsi)
4626 return i40e_get_iscsi_tc_map(pf);
4627 else
4628 return i40e_pf_get_default_tc(pf);
4629 }
4630
4631 /**
4632 * i40e_vsi_get_bw_info - Query VSI BW Information
4633 * @vsi: the VSI being queried
4634 *
4635 * Returns 0 on success, negative value on failure
4636 **/
4637 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4638 {
4639 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4640 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4641 struct i40e_pf *pf = vsi->back;
4642 struct i40e_hw *hw = &pf->hw;
4643 i40e_status ret;
4644 u32 tc_bw_max;
4645 int i;
4646
4647 /* Get the VSI level BW configuration */
4648 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4649 if (ret) {
4650 dev_info(&pf->pdev->dev,
4651 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4652 i40e_stat_str(&pf->hw, ret),
4653 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4654 return -EINVAL;
4655 }
4656
4657 /* Get the VSI level BW configuration per TC */
4658 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4659 NULL);
4660 if (ret) {
4661 dev_info(&pf->pdev->dev,
4662 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4663 i40e_stat_str(&pf->hw, ret),
4664 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4665 return -EINVAL;
4666 }
4667
4668 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4669 dev_info(&pf->pdev->dev,
4670 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4671 bw_config.tc_valid_bits,
4672 bw_ets_config.tc_valid_bits);
4673 /* Still continuing */
4674 }
4675
4676 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4677 vsi->bw_max_quanta = bw_config.max_bw;
4678 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4679 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4680 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4681 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4682 vsi->bw_ets_limit_credits[i] =
4683 le16_to_cpu(bw_ets_config.credits[i]);
4684 /* 3 bits out of 4 for each TC */
4685 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4686 }
4687
4688 return 0;
4689 }
4690
4691 /**
4692 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4693 * @vsi: the VSI being configured
4694 * @enabled_tc: TC bitmap
4695 * @bw_credits: BW shared credits per TC
4696 *
4697 * Returns 0 on success, negative value on failure
4698 **/
4699 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4700 u8 *bw_share)
4701 {
4702 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4703 i40e_status ret;
4704 int i;
4705
4706 bw_data.tc_valid_bits = enabled_tc;
4707 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4708 bw_data.tc_bw_credits[i] = bw_share[i];
4709
4710 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4711 NULL);
4712 if (ret) {
4713 dev_info(&vsi->back->pdev->dev,
4714 "AQ command Config VSI BW allocation per TC failed = %d\n",
4715 vsi->back->hw.aq.asq_last_status);
4716 return -EINVAL;
4717 }
4718
4719 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4720 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4721
4722 return 0;
4723 }
4724
4725 /**
4726 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4727 * @vsi: the VSI being configured
4728 * @enabled_tc: TC map to be enabled
4729 *
4730 **/
4731 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4732 {
4733 struct net_device *netdev = vsi->netdev;
4734 struct i40e_pf *pf = vsi->back;
4735 struct i40e_hw *hw = &pf->hw;
4736 u8 netdev_tc = 0;
4737 int i;
4738 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4739
4740 if (!netdev)
4741 return;
4742
4743 if (!enabled_tc) {
4744 netdev_reset_tc(netdev);
4745 return;
4746 }
4747
4748 /* Set up actual enabled TCs on the VSI */
4749 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4750 return;
4751
4752 /* set per TC queues for the VSI */
4753 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4754 /* Only set TC queues for enabled tcs
4755 *
4756 * e.g. For a VSI that has TC0 and TC3 enabled the
4757 * enabled_tc bitmap would be 0x00001001; the driver
4758 * will set the numtc for netdev as 2 that will be
4759 * referenced by the netdev layer as TC 0 and 1.
4760 */
4761 if (vsi->tc_config.enabled_tc & BIT(i))
4762 netdev_set_tc_queue(netdev,
4763 vsi->tc_config.tc_info[i].netdev_tc,
4764 vsi->tc_config.tc_info[i].qcount,
4765 vsi->tc_config.tc_info[i].qoffset);
4766 }
4767
4768 /* Assign UP2TC map for the VSI */
4769 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4770 /* Get the actual TC# for the UP */
4771 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4772 /* Get the mapped netdev TC# for the UP */
4773 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4774 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4775 }
4776 }
4777
4778 /**
4779 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4780 * @vsi: the VSI being configured
4781 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4782 **/
4783 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4784 struct i40e_vsi_context *ctxt)
4785 {
4786 /* copy just the sections touched not the entire info
4787 * since not all sections are valid as returned by
4788 * update vsi params
4789 */
4790 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4791 memcpy(&vsi->info.queue_mapping,
4792 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4793 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4794 sizeof(vsi->info.tc_mapping));
4795 }
4796
4797 /**
4798 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4799 * @vsi: VSI to be configured
4800 * @enabled_tc: TC bitmap
4801 *
4802 * This configures a particular VSI for TCs that are mapped to the
4803 * given TC bitmap. It uses default bandwidth share for TCs across
4804 * VSIs to configure TC for a particular VSI.
4805 *
4806 * NOTE:
4807 * It is expected that the VSI queues have been quisced before calling
4808 * this function.
4809 **/
4810 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4811 {
4812 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4813 struct i40e_vsi_context ctxt;
4814 int ret = 0;
4815 int i;
4816
4817 /* Check if enabled_tc is same as existing or new TCs */
4818 if (vsi->tc_config.enabled_tc == enabled_tc)
4819 return ret;
4820
4821 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4822 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4823 if (enabled_tc & BIT(i))
4824 bw_share[i] = 1;
4825 }
4826
4827 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4828 if (ret) {
4829 dev_info(&vsi->back->pdev->dev,
4830 "Failed configuring TC map %d for VSI %d\n",
4831 enabled_tc, vsi->seid);
4832 goto out;
4833 }
4834
4835 /* Update Queue Pairs Mapping for currently enabled UPs */
4836 ctxt.seid = vsi->seid;
4837 ctxt.pf_num = vsi->back->hw.pf_id;
4838 ctxt.vf_num = 0;
4839 ctxt.uplink_seid = vsi->uplink_seid;
4840 ctxt.info = vsi->info;
4841 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4842
4843 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4844 ctxt.info.valid_sections |=
4845 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4846 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4847 }
4848
4849 /* Update the VSI after updating the VSI queue-mapping information */
4850 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4851 if (ret) {
4852 dev_info(&vsi->back->pdev->dev,
4853 "Update vsi tc config failed, err %s aq_err %s\n",
4854 i40e_stat_str(&vsi->back->hw, ret),
4855 i40e_aq_str(&vsi->back->hw,
4856 vsi->back->hw.aq.asq_last_status));
4857 goto out;
4858 }
4859 /* update the local VSI info with updated queue map */
4860 i40e_vsi_update_queue_map(vsi, &ctxt);
4861 vsi->info.valid_sections = 0;
4862
4863 /* Update current VSI BW information */
4864 ret = i40e_vsi_get_bw_info(vsi);
4865 if (ret) {
4866 dev_info(&vsi->back->pdev->dev,
4867 "Failed updating vsi bw info, err %s aq_err %s\n",
4868 i40e_stat_str(&vsi->back->hw, ret),
4869 i40e_aq_str(&vsi->back->hw,
4870 vsi->back->hw.aq.asq_last_status));
4871 goto out;
4872 }
4873
4874 /* Update the netdev TC setup */
4875 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4876 out:
4877 return ret;
4878 }
4879
4880 /**
4881 * i40e_veb_config_tc - Configure TCs for given VEB
4882 * @veb: given VEB
4883 * @enabled_tc: TC bitmap
4884 *
4885 * Configures given TC bitmap for VEB (switching) element
4886 **/
4887 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4888 {
4889 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4890 struct i40e_pf *pf = veb->pf;
4891 int ret = 0;
4892 int i;
4893
4894 /* No TCs or already enabled TCs just return */
4895 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4896 return ret;
4897
4898 bw_data.tc_valid_bits = enabled_tc;
4899 /* bw_data.absolute_credits is not set (relative) */
4900
4901 /* Enable ETS TCs with equal BW Share for now */
4902 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4903 if (enabled_tc & BIT(i))
4904 bw_data.tc_bw_share_credits[i] = 1;
4905 }
4906
4907 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4908 &bw_data, NULL);
4909 if (ret) {
4910 dev_info(&pf->pdev->dev,
4911 "VEB bw config failed, err %s aq_err %s\n",
4912 i40e_stat_str(&pf->hw, ret),
4913 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4914 goto out;
4915 }
4916
4917 /* Update the BW information */
4918 ret = i40e_veb_get_bw_info(veb);
4919 if (ret) {
4920 dev_info(&pf->pdev->dev,
4921 "Failed getting veb bw config, err %s aq_err %s\n",
4922 i40e_stat_str(&pf->hw, ret),
4923 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4924 }
4925
4926 out:
4927 return ret;
4928 }
4929
4930 #ifdef CONFIG_I40E_DCB
4931 /**
4932 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4933 * @pf: PF struct
4934 *
4935 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4936 * the caller would've quiesce all the VSIs before calling
4937 * this function
4938 **/
4939 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4940 {
4941 u8 tc_map = 0;
4942 int ret;
4943 u8 v;
4944
4945 /* Enable the TCs available on PF to all VEBs */
4946 tc_map = i40e_pf_get_tc_map(pf);
4947 for (v = 0; v < I40E_MAX_VEB; v++) {
4948 if (!pf->veb[v])
4949 continue;
4950 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4951 if (ret) {
4952 dev_info(&pf->pdev->dev,
4953 "Failed configuring TC for VEB seid=%d\n",
4954 pf->veb[v]->seid);
4955 /* Will try to configure as many components */
4956 }
4957 }
4958
4959 /* Update each VSI */
4960 for (v = 0; v < pf->num_alloc_vsi; v++) {
4961 if (!pf->vsi[v])
4962 continue;
4963
4964 /* - Enable all TCs for the LAN VSI
4965 #ifdef I40E_FCOE
4966 * - For FCoE VSI only enable the TC configured
4967 * as per the APP TLV
4968 #endif
4969 * - For all others keep them at TC0 for now
4970 */
4971 if (v == pf->lan_vsi)
4972 tc_map = i40e_pf_get_tc_map(pf);
4973 else
4974 tc_map = i40e_pf_get_default_tc(pf);
4975 #ifdef I40E_FCOE
4976 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4977 tc_map = i40e_get_fcoe_tc_map(pf);
4978 #endif /* #ifdef I40E_FCOE */
4979
4980 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4981 if (ret) {
4982 dev_info(&pf->pdev->dev,
4983 "Failed configuring TC for VSI seid=%d\n",
4984 pf->vsi[v]->seid);
4985 /* Will try to configure as many components */
4986 } else {
4987 /* Re-configure VSI vectors based on updated TC map */
4988 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4989 if (pf->vsi[v]->netdev)
4990 i40e_dcbnl_set_all(pf->vsi[v]);
4991 }
4992 }
4993 }
4994
4995 /**
4996 * i40e_resume_port_tx - Resume port Tx
4997 * @pf: PF struct
4998 *
4999 * Resume a port's Tx and issue a PF reset in case of failure to
5000 * resume.
5001 **/
5002 static int i40e_resume_port_tx(struct i40e_pf *pf)
5003 {
5004 struct i40e_hw *hw = &pf->hw;
5005 int ret;
5006
5007 ret = i40e_aq_resume_port_tx(hw, NULL);
5008 if (ret) {
5009 dev_info(&pf->pdev->dev,
5010 "Resume Port Tx failed, err %s aq_err %s\n",
5011 i40e_stat_str(&pf->hw, ret),
5012 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5013 /* Schedule PF reset to recover */
5014 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5015 i40e_service_event_schedule(pf);
5016 }
5017
5018 return ret;
5019 }
5020
5021 /**
5022 * i40e_init_pf_dcb - Initialize DCB configuration
5023 * @pf: PF being configured
5024 *
5025 * Query the current DCB configuration and cache it
5026 * in the hardware structure
5027 **/
5028 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5029 {
5030 struct i40e_hw *hw = &pf->hw;
5031 int err = 0;
5032
5033 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5034 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5035 goto out;
5036
5037 /* Get the initial DCB configuration */
5038 err = i40e_init_dcb(hw);
5039 if (!err) {
5040 /* Device/Function is not DCBX capable */
5041 if ((!hw->func_caps.dcb) ||
5042 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5043 dev_info(&pf->pdev->dev,
5044 "DCBX offload is not supported or is disabled for this PF.\n");
5045
5046 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5047 goto out;
5048
5049 } else {
5050 /* When status is not DISABLED then DCBX in FW */
5051 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5052 DCB_CAP_DCBX_VER_IEEE;
5053
5054 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5055 /* Enable DCB tagging only when more than one TC */
5056 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5057 pf->flags |= I40E_FLAG_DCB_ENABLED;
5058 dev_dbg(&pf->pdev->dev,
5059 "DCBX offload is supported for this PF.\n");
5060 }
5061 } else {
5062 dev_info(&pf->pdev->dev,
5063 "Query for DCB configuration failed, err %s aq_err %s\n",
5064 i40e_stat_str(&pf->hw, err),
5065 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5066 }
5067
5068 out:
5069 return err;
5070 }
5071 #endif /* CONFIG_I40E_DCB */
5072 #define SPEED_SIZE 14
5073 #define FC_SIZE 8
5074 /**
5075 * i40e_print_link_message - print link up or down
5076 * @vsi: the VSI for which link needs a message
5077 */
5078 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5079 {
5080 char *speed = "Unknown";
5081 char *fc = "Unknown";
5082
5083 if (vsi->current_isup == isup)
5084 return;
5085 vsi->current_isup = isup;
5086 if (!isup) {
5087 netdev_info(vsi->netdev, "NIC Link is Down\n");
5088 return;
5089 }
5090
5091 /* Warn user if link speed on NPAR enabled partition is not at
5092 * least 10GB
5093 */
5094 if (vsi->back->hw.func_caps.npar_enable &&
5095 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5096 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5097 netdev_warn(vsi->netdev,
5098 "The partition detected link speed that is less than 10Gbps\n");
5099
5100 switch (vsi->back->hw.phy.link_info.link_speed) {
5101 case I40E_LINK_SPEED_40GB:
5102 speed = "40 G";
5103 break;
5104 case I40E_LINK_SPEED_20GB:
5105 speed = "20 G";
5106 break;
5107 case I40E_LINK_SPEED_10GB:
5108 speed = "10 G";
5109 break;
5110 case I40E_LINK_SPEED_1GB:
5111 speed = "1000 M";
5112 break;
5113 case I40E_LINK_SPEED_100MB:
5114 speed = "100 M";
5115 break;
5116 default:
5117 break;
5118 }
5119
5120 switch (vsi->back->hw.fc.current_mode) {
5121 case I40E_FC_FULL:
5122 fc = "RX/TX";
5123 break;
5124 case I40E_FC_TX_PAUSE:
5125 fc = "TX";
5126 break;
5127 case I40E_FC_RX_PAUSE:
5128 fc = "RX";
5129 break;
5130 default:
5131 fc = "None";
5132 break;
5133 }
5134
5135 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5136 speed, fc);
5137 }
5138
5139 /**
5140 * i40e_up_complete - Finish the last steps of bringing up a connection
5141 * @vsi: the VSI being configured
5142 **/
5143 static int i40e_up_complete(struct i40e_vsi *vsi)
5144 {
5145 struct i40e_pf *pf = vsi->back;
5146 int err;
5147
5148 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5149 i40e_vsi_configure_msix(vsi);
5150 else
5151 i40e_configure_msi_and_legacy(vsi);
5152
5153 /* start rings */
5154 err = i40e_vsi_control_rings(vsi, true);
5155 if (err)
5156 return err;
5157
5158 clear_bit(__I40E_DOWN, &vsi->state);
5159 i40e_napi_enable_all(vsi);
5160 i40e_vsi_enable_irq(vsi);
5161
5162 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5163 (vsi->netdev)) {
5164 i40e_print_link_message(vsi, true);
5165 netif_tx_start_all_queues(vsi->netdev);
5166 netif_carrier_on(vsi->netdev);
5167 } else if (vsi->netdev) {
5168 i40e_print_link_message(vsi, false);
5169 /* need to check for qualified module here*/
5170 if ((pf->hw.phy.link_info.link_info &
5171 I40E_AQ_MEDIA_AVAILABLE) &&
5172 (!(pf->hw.phy.link_info.an_info &
5173 I40E_AQ_QUALIFIED_MODULE)))
5174 netdev_err(vsi->netdev,
5175 "the driver failed to link because an unqualified module was detected.");
5176 }
5177
5178 /* replay FDIR SB filters */
5179 if (vsi->type == I40E_VSI_FDIR) {
5180 /* reset fd counters */
5181 pf->fd_add_err = pf->fd_atr_cnt = 0;
5182 if (pf->fd_tcp_rule > 0) {
5183 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5184 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5185 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5186 pf->fd_tcp_rule = 0;
5187 }
5188 i40e_fdir_filter_restore(vsi);
5189 }
5190
5191 /* On the next run of the service_task, notify any clients of the new
5192 * opened netdev
5193 */
5194 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5195 i40e_service_event_schedule(pf);
5196
5197 return 0;
5198 }
5199
5200 /**
5201 * i40e_vsi_reinit_locked - Reset the VSI
5202 * @vsi: the VSI being configured
5203 *
5204 * Rebuild the ring structs after some configuration
5205 * has changed, e.g. MTU size.
5206 **/
5207 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5208 {
5209 struct i40e_pf *pf = vsi->back;
5210
5211 WARN_ON(in_interrupt());
5212 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5213 usleep_range(1000, 2000);
5214 i40e_down(vsi);
5215
5216 i40e_up(vsi);
5217 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5218 }
5219
5220 /**
5221 * i40e_up - Bring the connection back up after being down
5222 * @vsi: the VSI being configured
5223 **/
5224 int i40e_up(struct i40e_vsi *vsi)
5225 {
5226 int err;
5227
5228 err = i40e_vsi_configure(vsi);
5229 if (!err)
5230 err = i40e_up_complete(vsi);
5231
5232 return err;
5233 }
5234
5235 /**
5236 * i40e_down - Shutdown the connection processing
5237 * @vsi: the VSI being stopped
5238 **/
5239 void i40e_down(struct i40e_vsi *vsi)
5240 {
5241 int i;
5242
5243 /* It is assumed that the caller of this function
5244 * sets the vsi->state __I40E_DOWN bit.
5245 */
5246 if (vsi->netdev) {
5247 netif_carrier_off(vsi->netdev);
5248 netif_tx_disable(vsi->netdev);
5249 }
5250 i40e_vsi_disable_irq(vsi);
5251 i40e_vsi_control_rings(vsi, false);
5252 i40e_napi_disable_all(vsi);
5253
5254 for (i = 0; i < vsi->num_queue_pairs; i++) {
5255 i40e_clean_tx_ring(vsi->tx_rings[i]);
5256 i40e_clean_rx_ring(vsi->rx_rings[i]);
5257 }
5258
5259 i40e_notify_client_of_netdev_close(vsi, false);
5260
5261 }
5262
5263 /**
5264 * i40e_setup_tc - configure multiple traffic classes
5265 * @netdev: net device to configure
5266 * @tc: number of traffic classes to enable
5267 **/
5268 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5269 {
5270 struct i40e_netdev_priv *np = netdev_priv(netdev);
5271 struct i40e_vsi *vsi = np->vsi;
5272 struct i40e_pf *pf = vsi->back;
5273 u8 enabled_tc = 0;
5274 int ret = -EINVAL;
5275 int i;
5276
5277 /* Check if DCB enabled to continue */
5278 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5279 netdev_info(netdev, "DCB is not enabled for adapter\n");
5280 goto exit;
5281 }
5282
5283 /* Check if MFP enabled */
5284 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5285 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5286 goto exit;
5287 }
5288
5289 /* Check whether tc count is within enabled limit */
5290 if (tc > i40e_pf_get_num_tc(pf)) {
5291 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5292 goto exit;
5293 }
5294
5295 /* Generate TC map for number of tc requested */
5296 for (i = 0; i < tc; i++)
5297 enabled_tc |= BIT(i);
5298
5299 /* Requesting same TC configuration as already enabled */
5300 if (enabled_tc == vsi->tc_config.enabled_tc)
5301 return 0;
5302
5303 /* Quiesce VSI queues */
5304 i40e_quiesce_vsi(vsi);
5305
5306 /* Configure VSI for enabled TCs */
5307 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5308 if (ret) {
5309 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5310 vsi->seid);
5311 goto exit;
5312 }
5313
5314 /* Unquiesce VSI */
5315 i40e_unquiesce_vsi(vsi);
5316
5317 exit:
5318 return ret;
5319 }
5320
5321 #ifdef I40E_FCOE
5322 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5323 struct tc_to_netdev *tc)
5324 #else
5325 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5326 struct tc_to_netdev *tc)
5327 #endif
5328 {
5329 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5330 return -EINVAL;
5331 return i40e_setup_tc(netdev, tc->tc);
5332 }
5333
5334 /**
5335 * i40e_open - Called when a network interface is made active
5336 * @netdev: network interface device structure
5337 *
5338 * The open entry point is called when a network interface is made
5339 * active by the system (IFF_UP). At this point all resources needed
5340 * for transmit and receive operations are allocated, the interrupt
5341 * handler is registered with the OS, the netdev watchdog subtask is
5342 * enabled, and the stack is notified that the interface is ready.
5343 *
5344 * Returns 0 on success, negative value on failure
5345 **/
5346 int i40e_open(struct net_device *netdev)
5347 {
5348 struct i40e_netdev_priv *np = netdev_priv(netdev);
5349 struct i40e_vsi *vsi = np->vsi;
5350 struct i40e_pf *pf = vsi->back;
5351 int err;
5352
5353 /* disallow open during test or if eeprom is broken */
5354 if (test_bit(__I40E_TESTING, &pf->state) ||
5355 test_bit(__I40E_BAD_EEPROM, &pf->state))
5356 return -EBUSY;
5357
5358 netif_carrier_off(netdev);
5359
5360 err = i40e_vsi_open(vsi);
5361 if (err)
5362 return err;
5363
5364 /* configure global TSO hardware offload settings */
5365 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5366 TCP_FLAG_FIN) >> 16);
5367 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5368 TCP_FLAG_FIN |
5369 TCP_FLAG_CWR) >> 16);
5370 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5371
5372 udp_tunnel_get_rx_info(netdev);
5373 i40e_notify_client_of_netdev_open(vsi);
5374
5375 return 0;
5376 }
5377
5378 /**
5379 * i40e_vsi_open -
5380 * @vsi: the VSI to open
5381 *
5382 * Finish initialization of the VSI.
5383 *
5384 * Returns 0 on success, negative value on failure
5385 **/
5386 int i40e_vsi_open(struct i40e_vsi *vsi)
5387 {
5388 struct i40e_pf *pf = vsi->back;
5389 char int_name[I40E_INT_NAME_STR_LEN];
5390 int err;
5391
5392 /* allocate descriptors */
5393 err = i40e_vsi_setup_tx_resources(vsi);
5394 if (err)
5395 goto err_setup_tx;
5396 err = i40e_vsi_setup_rx_resources(vsi);
5397 if (err)
5398 goto err_setup_rx;
5399
5400 err = i40e_vsi_configure(vsi);
5401 if (err)
5402 goto err_setup_rx;
5403
5404 if (vsi->netdev) {
5405 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5406 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5407 err = i40e_vsi_request_irq(vsi, int_name);
5408 if (err)
5409 goto err_setup_rx;
5410
5411 /* Notify the stack of the actual queue counts. */
5412 err = netif_set_real_num_tx_queues(vsi->netdev,
5413 vsi->num_queue_pairs);
5414 if (err)
5415 goto err_set_queues;
5416
5417 err = netif_set_real_num_rx_queues(vsi->netdev,
5418 vsi->num_queue_pairs);
5419 if (err)
5420 goto err_set_queues;
5421
5422 } else if (vsi->type == I40E_VSI_FDIR) {
5423 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5424 dev_driver_string(&pf->pdev->dev),
5425 dev_name(&pf->pdev->dev));
5426 err = i40e_vsi_request_irq(vsi, int_name);
5427
5428 } else {
5429 err = -EINVAL;
5430 goto err_setup_rx;
5431 }
5432
5433 err = i40e_up_complete(vsi);
5434 if (err)
5435 goto err_up_complete;
5436
5437 return 0;
5438
5439 err_up_complete:
5440 i40e_down(vsi);
5441 err_set_queues:
5442 i40e_vsi_free_irq(vsi);
5443 err_setup_rx:
5444 i40e_vsi_free_rx_resources(vsi);
5445 err_setup_tx:
5446 i40e_vsi_free_tx_resources(vsi);
5447 if (vsi == pf->vsi[pf->lan_vsi])
5448 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5449
5450 return err;
5451 }
5452
5453 /**
5454 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5455 * @pf: Pointer to PF
5456 *
5457 * This function destroys the hlist where all the Flow Director
5458 * filters were saved.
5459 **/
5460 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5461 {
5462 struct i40e_fdir_filter *filter;
5463 struct hlist_node *node2;
5464
5465 hlist_for_each_entry_safe(filter, node2,
5466 &pf->fdir_filter_list, fdir_node) {
5467 hlist_del(&filter->fdir_node);
5468 kfree(filter);
5469 }
5470 pf->fdir_pf_active_filters = 0;
5471 }
5472
5473 /**
5474 * i40e_close - Disables a network interface
5475 * @netdev: network interface device structure
5476 *
5477 * The close entry point is called when an interface is de-activated
5478 * by the OS. The hardware is still under the driver's control, but
5479 * this netdev interface is disabled.
5480 *
5481 * Returns 0, this is not allowed to fail
5482 **/
5483 int i40e_close(struct net_device *netdev)
5484 {
5485 struct i40e_netdev_priv *np = netdev_priv(netdev);
5486 struct i40e_vsi *vsi = np->vsi;
5487
5488 i40e_vsi_close(vsi);
5489
5490 return 0;
5491 }
5492
5493 /**
5494 * i40e_do_reset - Start a PF or Core Reset sequence
5495 * @pf: board private structure
5496 * @reset_flags: which reset is requested
5497 *
5498 * The essential difference in resets is that the PF Reset
5499 * doesn't clear the packet buffers, doesn't reset the PE
5500 * firmware, and doesn't bother the other PFs on the chip.
5501 **/
5502 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5503 {
5504 u32 val;
5505
5506 WARN_ON(in_interrupt());
5507
5508
5509 /* do the biggest reset indicated */
5510 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5511
5512 /* Request a Global Reset
5513 *
5514 * This will start the chip's countdown to the actual full
5515 * chip reset event, and a warning interrupt to be sent
5516 * to all PFs, including the requestor. Our handler
5517 * for the warning interrupt will deal with the shutdown
5518 * and recovery of the switch setup.
5519 */
5520 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5521 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5522 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5523 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5524
5525 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5526
5527 /* Request a Core Reset
5528 *
5529 * Same as Global Reset, except does *not* include the MAC/PHY
5530 */
5531 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5532 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5533 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5534 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5535 i40e_flush(&pf->hw);
5536
5537 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5538
5539 /* Request a PF Reset
5540 *
5541 * Resets only the PF-specific registers
5542 *
5543 * This goes directly to the tear-down and rebuild of
5544 * the switch, since we need to do all the recovery as
5545 * for the Core Reset.
5546 */
5547 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5548 i40e_handle_reset_warning(pf);
5549
5550 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5551 int v;
5552
5553 /* Find the VSI(s) that requested a re-init */
5554 dev_info(&pf->pdev->dev,
5555 "VSI reinit requested\n");
5556 for (v = 0; v < pf->num_alloc_vsi; v++) {
5557 struct i40e_vsi *vsi = pf->vsi[v];
5558
5559 if (vsi != NULL &&
5560 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5561 i40e_vsi_reinit_locked(pf->vsi[v]);
5562 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5563 }
5564 }
5565 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5566 int v;
5567
5568 /* Find the VSI(s) that needs to be brought down */
5569 dev_info(&pf->pdev->dev, "VSI down requested\n");
5570 for (v = 0; v < pf->num_alloc_vsi; v++) {
5571 struct i40e_vsi *vsi = pf->vsi[v];
5572
5573 if (vsi != NULL &&
5574 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5575 set_bit(__I40E_DOWN, &vsi->state);
5576 i40e_down(vsi);
5577 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5578 }
5579 }
5580 } else {
5581 dev_info(&pf->pdev->dev,
5582 "bad reset request 0x%08x\n", reset_flags);
5583 }
5584 }
5585
5586 #ifdef CONFIG_I40E_DCB
5587 /**
5588 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5589 * @pf: board private structure
5590 * @old_cfg: current DCB config
5591 * @new_cfg: new DCB config
5592 **/
5593 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5594 struct i40e_dcbx_config *old_cfg,
5595 struct i40e_dcbx_config *new_cfg)
5596 {
5597 bool need_reconfig = false;
5598
5599 /* Check if ETS configuration has changed */
5600 if (memcmp(&new_cfg->etscfg,
5601 &old_cfg->etscfg,
5602 sizeof(new_cfg->etscfg))) {
5603 /* If Priority Table has changed reconfig is needed */
5604 if (memcmp(&new_cfg->etscfg.prioritytable,
5605 &old_cfg->etscfg.prioritytable,
5606 sizeof(new_cfg->etscfg.prioritytable))) {
5607 need_reconfig = true;
5608 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5609 }
5610
5611 if (memcmp(&new_cfg->etscfg.tcbwtable,
5612 &old_cfg->etscfg.tcbwtable,
5613 sizeof(new_cfg->etscfg.tcbwtable)))
5614 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5615
5616 if (memcmp(&new_cfg->etscfg.tsatable,
5617 &old_cfg->etscfg.tsatable,
5618 sizeof(new_cfg->etscfg.tsatable)))
5619 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5620 }
5621
5622 /* Check if PFC configuration has changed */
5623 if (memcmp(&new_cfg->pfc,
5624 &old_cfg->pfc,
5625 sizeof(new_cfg->pfc))) {
5626 need_reconfig = true;
5627 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5628 }
5629
5630 /* Check if APP Table has changed */
5631 if (memcmp(&new_cfg->app,
5632 &old_cfg->app,
5633 sizeof(new_cfg->app))) {
5634 need_reconfig = true;
5635 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5636 }
5637
5638 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5639 return need_reconfig;
5640 }
5641
5642 /**
5643 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5644 * @pf: board private structure
5645 * @e: event info posted on ARQ
5646 **/
5647 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5648 struct i40e_arq_event_info *e)
5649 {
5650 struct i40e_aqc_lldp_get_mib *mib =
5651 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5652 struct i40e_hw *hw = &pf->hw;
5653 struct i40e_dcbx_config tmp_dcbx_cfg;
5654 bool need_reconfig = false;
5655 int ret = 0;
5656 u8 type;
5657
5658 /* Not DCB capable or capability disabled */
5659 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5660 return ret;
5661
5662 /* Ignore if event is not for Nearest Bridge */
5663 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5664 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5665 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5666 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5667 return ret;
5668
5669 /* Check MIB Type and return if event for Remote MIB update */
5670 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5671 dev_dbg(&pf->pdev->dev,
5672 "LLDP event mib type %s\n", type ? "remote" : "local");
5673 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5674 /* Update the remote cached instance and return */
5675 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5676 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5677 &hw->remote_dcbx_config);
5678 goto exit;
5679 }
5680
5681 /* Store the old configuration */
5682 tmp_dcbx_cfg = hw->local_dcbx_config;
5683
5684 /* Reset the old DCBx configuration data */
5685 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5686 /* Get updated DCBX data from firmware */
5687 ret = i40e_get_dcb_config(&pf->hw);
5688 if (ret) {
5689 dev_info(&pf->pdev->dev,
5690 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5691 i40e_stat_str(&pf->hw, ret),
5692 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5693 goto exit;
5694 }
5695
5696 /* No change detected in DCBX configs */
5697 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5698 sizeof(tmp_dcbx_cfg))) {
5699 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5700 goto exit;
5701 }
5702
5703 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5704 &hw->local_dcbx_config);
5705
5706 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5707
5708 if (!need_reconfig)
5709 goto exit;
5710
5711 /* Enable DCB tagging only when more than one TC */
5712 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5713 pf->flags |= I40E_FLAG_DCB_ENABLED;
5714 else
5715 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5716
5717 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5718 /* Reconfiguration needed quiesce all VSIs */
5719 i40e_pf_quiesce_all_vsi(pf);
5720
5721 /* Changes in configuration update VEB/VSI */
5722 i40e_dcb_reconfigure(pf);
5723
5724 ret = i40e_resume_port_tx(pf);
5725
5726 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5727 /* In case of error no point in resuming VSIs */
5728 if (ret)
5729 goto exit;
5730
5731 /* Wait for the PF's queues to be disabled */
5732 ret = i40e_pf_wait_queues_disabled(pf);
5733 if (ret) {
5734 /* Schedule PF reset to recover */
5735 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5736 i40e_service_event_schedule(pf);
5737 } else {
5738 i40e_pf_unquiesce_all_vsi(pf);
5739 /* Notify the client for the DCB changes */
5740 i40e_notify_client_of_l2_param_changes(pf->vsi[pf->lan_vsi]);
5741 }
5742
5743 exit:
5744 return ret;
5745 }
5746 #endif /* CONFIG_I40E_DCB */
5747
5748 /**
5749 * i40e_do_reset_safe - Protected reset path for userland calls.
5750 * @pf: board private structure
5751 * @reset_flags: which reset is requested
5752 *
5753 **/
5754 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5755 {
5756 rtnl_lock();
5757 i40e_do_reset(pf, reset_flags);
5758 rtnl_unlock();
5759 }
5760
5761 /**
5762 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5763 * @pf: board private structure
5764 * @e: event info posted on ARQ
5765 *
5766 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5767 * and VF queues
5768 **/
5769 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5770 struct i40e_arq_event_info *e)
5771 {
5772 struct i40e_aqc_lan_overflow *data =
5773 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5774 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5775 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5776 struct i40e_hw *hw = &pf->hw;
5777 struct i40e_vf *vf;
5778 u16 vf_id;
5779
5780 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5781 queue, qtx_ctl);
5782
5783 /* Queue belongs to VF, find the VF and issue VF reset */
5784 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5785 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5786 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5787 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5788 vf_id -= hw->func_caps.vf_base_id;
5789 vf = &pf->vf[vf_id];
5790 i40e_vc_notify_vf_reset(vf);
5791 /* Allow VF to process pending reset notification */
5792 msleep(20);
5793 i40e_reset_vf(vf, false);
5794 }
5795 }
5796
5797 /**
5798 * i40e_service_event_complete - Finish up the service event
5799 * @pf: board private structure
5800 **/
5801 static void i40e_service_event_complete(struct i40e_pf *pf)
5802 {
5803 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5804
5805 /* flush memory to make sure state is correct before next watchog */
5806 smp_mb__before_atomic();
5807 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5808 }
5809
5810 /**
5811 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5812 * @pf: board private structure
5813 **/
5814 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5815 {
5816 u32 val, fcnt_prog;
5817
5818 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5819 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5820 return fcnt_prog;
5821 }
5822
5823 /**
5824 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5825 * @pf: board private structure
5826 **/
5827 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5828 {
5829 u32 val, fcnt_prog;
5830
5831 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5832 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5833 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5834 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5835 return fcnt_prog;
5836 }
5837
5838 /**
5839 * i40e_get_global_fd_count - Get total FD filters programmed on device
5840 * @pf: board private structure
5841 **/
5842 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5843 {
5844 u32 val, fcnt_prog;
5845
5846 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5847 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5848 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5849 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5850 return fcnt_prog;
5851 }
5852
5853 /**
5854 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5855 * @pf: board private structure
5856 **/
5857 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5858 {
5859 struct i40e_fdir_filter *filter;
5860 u32 fcnt_prog, fcnt_avail;
5861 struct hlist_node *node;
5862
5863 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5864 return;
5865
5866 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5867 * to re-enable
5868 */
5869 fcnt_prog = i40e_get_global_fd_count(pf);
5870 fcnt_avail = pf->fdir_pf_filter_count;
5871 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5872 (pf->fd_add_err == 0) ||
5873 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5874 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5875 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5876 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5877 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5878 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5879 }
5880 }
5881 /* Wait for some more space to be available to turn on ATR */
5882 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5883 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5884 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5885 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5886 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5887 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5888 }
5889 }
5890
5891 /* if hw had a problem adding a filter, delete it */
5892 if (pf->fd_inv > 0) {
5893 hlist_for_each_entry_safe(filter, node,
5894 &pf->fdir_filter_list, fdir_node) {
5895 if (filter->fd_id == pf->fd_inv) {
5896 hlist_del(&filter->fdir_node);
5897 kfree(filter);
5898 pf->fdir_pf_active_filters--;
5899 }
5900 }
5901 }
5902 }
5903
5904 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5905 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5906 /**
5907 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5908 * @pf: board private structure
5909 **/
5910 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5911 {
5912 unsigned long min_flush_time;
5913 int flush_wait_retry = 50;
5914 bool disable_atr = false;
5915 int fd_room;
5916 int reg;
5917
5918 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5919 return;
5920
5921 if (!time_after(jiffies, pf->fd_flush_timestamp +
5922 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5923 return;
5924
5925 /* If the flush is happening too quick and we have mostly SB rules we
5926 * should not re-enable ATR for some time.
5927 */
5928 min_flush_time = pf->fd_flush_timestamp +
5929 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5930 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5931
5932 if (!(time_after(jiffies, min_flush_time)) &&
5933 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5934 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5935 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5936 disable_atr = true;
5937 }
5938
5939 pf->fd_flush_timestamp = jiffies;
5940 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5941 /* flush all filters */
5942 wr32(&pf->hw, I40E_PFQF_CTL_1,
5943 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5944 i40e_flush(&pf->hw);
5945 pf->fd_flush_cnt++;
5946 pf->fd_add_err = 0;
5947 do {
5948 /* Check FD flush status every 5-6msec */
5949 usleep_range(5000, 6000);
5950 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5951 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5952 break;
5953 } while (flush_wait_retry--);
5954 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5955 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5956 } else {
5957 /* replay sideband filters */
5958 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5959 if (!disable_atr)
5960 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5961 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5962 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5963 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5964 }
5965 }
5966
5967 /**
5968 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5969 * @pf: board private structure
5970 **/
5971 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5972 {
5973 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5974 }
5975
5976 /* We can see up to 256 filter programming desc in transit if the filters are
5977 * being applied really fast; before we see the first
5978 * filter miss error on Rx queue 0. Accumulating enough error messages before
5979 * reacting will make sure we don't cause flush too often.
5980 */
5981 #define I40E_MAX_FD_PROGRAM_ERROR 256
5982
5983 /**
5984 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5985 * @pf: board private structure
5986 **/
5987 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5988 {
5989
5990 /* if interface is down do nothing */
5991 if (test_bit(__I40E_DOWN, &pf->state))
5992 return;
5993
5994 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5995 return;
5996
5997 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5998 i40e_fdir_flush_and_replay(pf);
5999
6000 i40e_fdir_check_and_reenable(pf);
6001
6002 }
6003
6004 /**
6005 * i40e_vsi_link_event - notify VSI of a link event
6006 * @vsi: vsi to be notified
6007 * @link_up: link up or down
6008 **/
6009 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6010 {
6011 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6012 return;
6013
6014 switch (vsi->type) {
6015 case I40E_VSI_MAIN:
6016 #ifdef I40E_FCOE
6017 case I40E_VSI_FCOE:
6018 #endif
6019 if (!vsi->netdev || !vsi->netdev_registered)
6020 break;
6021
6022 if (link_up) {
6023 netif_carrier_on(vsi->netdev);
6024 netif_tx_wake_all_queues(vsi->netdev);
6025 } else {
6026 netif_carrier_off(vsi->netdev);
6027 netif_tx_stop_all_queues(vsi->netdev);
6028 }
6029 break;
6030
6031 case I40E_VSI_SRIOV:
6032 case I40E_VSI_VMDQ2:
6033 case I40E_VSI_CTRL:
6034 case I40E_VSI_IWARP:
6035 case I40E_VSI_MIRROR:
6036 default:
6037 /* there is no notification for other VSIs */
6038 break;
6039 }
6040 }
6041
6042 /**
6043 * i40e_veb_link_event - notify elements on the veb of a link event
6044 * @veb: veb to be notified
6045 * @link_up: link up or down
6046 **/
6047 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6048 {
6049 struct i40e_pf *pf;
6050 int i;
6051
6052 if (!veb || !veb->pf)
6053 return;
6054 pf = veb->pf;
6055
6056 /* depth first... */
6057 for (i = 0; i < I40E_MAX_VEB; i++)
6058 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6059 i40e_veb_link_event(pf->veb[i], link_up);
6060
6061 /* ... now the local VSIs */
6062 for (i = 0; i < pf->num_alloc_vsi; i++)
6063 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6064 i40e_vsi_link_event(pf->vsi[i], link_up);
6065 }
6066
6067 /**
6068 * i40e_link_event - Update netif_carrier status
6069 * @pf: board private structure
6070 **/
6071 static void i40e_link_event(struct i40e_pf *pf)
6072 {
6073 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6074 u8 new_link_speed, old_link_speed;
6075 i40e_status status;
6076 bool new_link, old_link;
6077
6078 /* save off old link status information */
6079 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6080
6081 /* set this to force the get_link_status call to refresh state */
6082 pf->hw.phy.get_link_info = true;
6083
6084 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6085
6086 status = i40e_get_link_status(&pf->hw, &new_link);
6087 if (status) {
6088 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6089 status);
6090 return;
6091 }
6092
6093 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6094 new_link_speed = pf->hw.phy.link_info.link_speed;
6095
6096 if (new_link == old_link &&
6097 new_link_speed == old_link_speed &&
6098 (test_bit(__I40E_DOWN, &vsi->state) ||
6099 new_link == netif_carrier_ok(vsi->netdev)))
6100 return;
6101
6102 if (!test_bit(__I40E_DOWN, &vsi->state))
6103 i40e_print_link_message(vsi, new_link);
6104
6105 /* Notify the base of the switch tree connected to
6106 * the link. Floating VEBs are not notified.
6107 */
6108 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6109 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6110 else
6111 i40e_vsi_link_event(vsi, new_link);
6112
6113 if (pf->vf)
6114 i40e_vc_notify_link_state(pf);
6115
6116 if (pf->flags & I40E_FLAG_PTP)
6117 i40e_ptp_set_increment(pf);
6118 }
6119
6120 /**
6121 * i40e_watchdog_subtask - periodic checks not using event driven response
6122 * @pf: board private structure
6123 **/
6124 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6125 {
6126 int i;
6127
6128 /* if interface is down do nothing */
6129 if (test_bit(__I40E_DOWN, &pf->state) ||
6130 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6131 return;
6132
6133 /* make sure we don't do these things too often */
6134 if (time_before(jiffies, (pf->service_timer_previous +
6135 pf->service_timer_period)))
6136 return;
6137 pf->service_timer_previous = jiffies;
6138
6139 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6140 i40e_link_event(pf);
6141
6142 /* Update the stats for active netdevs so the network stack
6143 * can look at updated numbers whenever it cares to
6144 */
6145 for (i = 0; i < pf->num_alloc_vsi; i++)
6146 if (pf->vsi[i] && pf->vsi[i]->netdev)
6147 i40e_update_stats(pf->vsi[i]);
6148
6149 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6150 /* Update the stats for the active switching components */
6151 for (i = 0; i < I40E_MAX_VEB; i++)
6152 if (pf->veb[i])
6153 i40e_update_veb_stats(pf->veb[i]);
6154 }
6155
6156 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6157 }
6158
6159 /**
6160 * i40e_reset_subtask - Set up for resetting the device and driver
6161 * @pf: board private structure
6162 **/
6163 static void i40e_reset_subtask(struct i40e_pf *pf)
6164 {
6165 u32 reset_flags = 0;
6166
6167 rtnl_lock();
6168 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6169 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6170 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6171 }
6172 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6173 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6174 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6175 }
6176 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6177 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6178 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6179 }
6180 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6181 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6182 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6183 }
6184 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6185 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6186 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6187 }
6188
6189 /* If there's a recovery already waiting, it takes
6190 * precedence before starting a new reset sequence.
6191 */
6192 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6193 i40e_handle_reset_warning(pf);
6194 goto unlock;
6195 }
6196
6197 /* If we're already down or resetting, just bail */
6198 if (reset_flags &&
6199 !test_bit(__I40E_DOWN, &pf->state) &&
6200 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6201 i40e_do_reset(pf, reset_flags);
6202
6203 unlock:
6204 rtnl_unlock();
6205 }
6206
6207 /**
6208 * i40e_handle_link_event - Handle link event
6209 * @pf: board private structure
6210 * @e: event info posted on ARQ
6211 **/
6212 static void i40e_handle_link_event(struct i40e_pf *pf,
6213 struct i40e_arq_event_info *e)
6214 {
6215 struct i40e_aqc_get_link_status *status =
6216 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6217
6218 /* Do a new status request to re-enable LSE reporting
6219 * and load new status information into the hw struct
6220 * This completely ignores any state information
6221 * in the ARQ event info, instead choosing to always
6222 * issue the AQ update link status command.
6223 */
6224 i40e_link_event(pf);
6225
6226 /* check for unqualified module, if link is down */
6227 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6228 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6229 (!(status->link_info & I40E_AQ_LINK_UP)))
6230 dev_err(&pf->pdev->dev,
6231 "The driver failed to link because an unqualified module was detected.\n");
6232 }
6233
6234 /**
6235 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6236 * @pf: board private structure
6237 **/
6238 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6239 {
6240 struct i40e_arq_event_info event;
6241 struct i40e_hw *hw = &pf->hw;
6242 u16 pending, i = 0;
6243 i40e_status ret;
6244 u16 opcode;
6245 u32 oldval;
6246 u32 val;
6247
6248 /* Do not run clean AQ when PF reset fails */
6249 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6250 return;
6251
6252 /* check for error indications */
6253 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6254 oldval = val;
6255 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6256 if (hw->debug_mask & I40E_DEBUG_AQ)
6257 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6258 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6259 }
6260 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6261 if (hw->debug_mask & I40E_DEBUG_AQ)
6262 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6263 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6264 pf->arq_overflows++;
6265 }
6266 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6267 if (hw->debug_mask & I40E_DEBUG_AQ)
6268 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6269 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6270 }
6271 if (oldval != val)
6272 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6273
6274 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6275 oldval = val;
6276 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6277 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6278 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6279 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6280 }
6281 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6282 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6283 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6284 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6285 }
6286 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6287 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6288 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6289 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6290 }
6291 if (oldval != val)
6292 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6293
6294 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6295 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6296 if (!event.msg_buf)
6297 return;
6298
6299 do {
6300 ret = i40e_clean_arq_element(hw, &event, &pending);
6301 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6302 break;
6303 else if (ret) {
6304 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6305 break;
6306 }
6307
6308 opcode = le16_to_cpu(event.desc.opcode);
6309 switch (opcode) {
6310
6311 case i40e_aqc_opc_get_link_status:
6312 i40e_handle_link_event(pf, &event);
6313 break;
6314 case i40e_aqc_opc_send_msg_to_pf:
6315 ret = i40e_vc_process_vf_msg(pf,
6316 le16_to_cpu(event.desc.retval),
6317 le32_to_cpu(event.desc.cookie_high),
6318 le32_to_cpu(event.desc.cookie_low),
6319 event.msg_buf,
6320 event.msg_len);
6321 break;
6322 case i40e_aqc_opc_lldp_update_mib:
6323 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6324 #ifdef CONFIG_I40E_DCB
6325 rtnl_lock();
6326 ret = i40e_handle_lldp_event(pf, &event);
6327 rtnl_unlock();
6328 #endif /* CONFIG_I40E_DCB */
6329 break;
6330 case i40e_aqc_opc_event_lan_overflow:
6331 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6332 i40e_handle_lan_overflow_event(pf, &event);
6333 break;
6334 case i40e_aqc_opc_send_msg_to_peer:
6335 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6336 break;
6337 case i40e_aqc_opc_nvm_erase:
6338 case i40e_aqc_opc_nvm_update:
6339 case i40e_aqc_opc_oem_post_update:
6340 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6341 "ARQ NVM operation 0x%04x completed\n",
6342 opcode);
6343 break;
6344 default:
6345 dev_info(&pf->pdev->dev,
6346 "ARQ: Unknown event 0x%04x ignored\n",
6347 opcode);
6348 break;
6349 }
6350 } while (pending && (i++ < pf->adminq_work_limit));
6351
6352 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6353 /* re-enable Admin queue interrupt cause */
6354 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6355 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6356 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6357 i40e_flush(hw);
6358
6359 kfree(event.msg_buf);
6360 }
6361
6362 /**
6363 * i40e_verify_eeprom - make sure eeprom is good to use
6364 * @pf: board private structure
6365 **/
6366 static void i40e_verify_eeprom(struct i40e_pf *pf)
6367 {
6368 int err;
6369
6370 err = i40e_diag_eeprom_test(&pf->hw);
6371 if (err) {
6372 /* retry in case of garbage read */
6373 err = i40e_diag_eeprom_test(&pf->hw);
6374 if (err) {
6375 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6376 err);
6377 set_bit(__I40E_BAD_EEPROM, &pf->state);
6378 }
6379 }
6380
6381 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6382 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6383 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6384 }
6385 }
6386
6387 /**
6388 * i40e_enable_pf_switch_lb
6389 * @pf: pointer to the PF structure
6390 *
6391 * enable switch loop back or die - no point in a return value
6392 **/
6393 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6394 {
6395 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6396 struct i40e_vsi_context ctxt;
6397 int ret;
6398
6399 ctxt.seid = pf->main_vsi_seid;
6400 ctxt.pf_num = pf->hw.pf_id;
6401 ctxt.vf_num = 0;
6402 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6403 if (ret) {
6404 dev_info(&pf->pdev->dev,
6405 "couldn't get PF vsi config, err %s aq_err %s\n",
6406 i40e_stat_str(&pf->hw, ret),
6407 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6408 return;
6409 }
6410 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6411 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6412 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6413
6414 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6415 if (ret) {
6416 dev_info(&pf->pdev->dev,
6417 "update vsi switch failed, err %s aq_err %s\n",
6418 i40e_stat_str(&pf->hw, ret),
6419 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6420 }
6421 }
6422
6423 /**
6424 * i40e_disable_pf_switch_lb
6425 * @pf: pointer to the PF structure
6426 *
6427 * disable switch loop back or die - no point in a return value
6428 **/
6429 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6430 {
6431 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6432 struct i40e_vsi_context ctxt;
6433 int ret;
6434
6435 ctxt.seid = pf->main_vsi_seid;
6436 ctxt.pf_num = pf->hw.pf_id;
6437 ctxt.vf_num = 0;
6438 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6439 if (ret) {
6440 dev_info(&pf->pdev->dev,
6441 "couldn't get PF vsi config, err %s aq_err %s\n",
6442 i40e_stat_str(&pf->hw, ret),
6443 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6444 return;
6445 }
6446 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6447 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6448 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6449
6450 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6451 if (ret) {
6452 dev_info(&pf->pdev->dev,
6453 "update vsi switch failed, err %s aq_err %s\n",
6454 i40e_stat_str(&pf->hw, ret),
6455 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6456 }
6457 }
6458
6459 /**
6460 * i40e_config_bridge_mode - Configure the HW bridge mode
6461 * @veb: pointer to the bridge instance
6462 *
6463 * Configure the loop back mode for the LAN VSI that is downlink to the
6464 * specified HW bridge instance. It is expected this function is called
6465 * when a new HW bridge is instantiated.
6466 **/
6467 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6468 {
6469 struct i40e_pf *pf = veb->pf;
6470
6471 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6472 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6473 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6474 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6475 i40e_disable_pf_switch_lb(pf);
6476 else
6477 i40e_enable_pf_switch_lb(pf);
6478 }
6479
6480 /**
6481 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6482 * @veb: pointer to the VEB instance
6483 *
6484 * This is a recursive function that first builds the attached VSIs then
6485 * recurses in to build the next layer of VEB. We track the connections
6486 * through our own index numbers because the seid's from the HW could
6487 * change across the reset.
6488 **/
6489 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6490 {
6491 struct i40e_vsi *ctl_vsi = NULL;
6492 struct i40e_pf *pf = veb->pf;
6493 int v, veb_idx;
6494 int ret;
6495
6496 /* build VSI that owns this VEB, temporarily attached to base VEB */
6497 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6498 if (pf->vsi[v] &&
6499 pf->vsi[v]->veb_idx == veb->idx &&
6500 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6501 ctl_vsi = pf->vsi[v];
6502 break;
6503 }
6504 }
6505 if (!ctl_vsi) {
6506 dev_info(&pf->pdev->dev,
6507 "missing owner VSI for veb_idx %d\n", veb->idx);
6508 ret = -ENOENT;
6509 goto end_reconstitute;
6510 }
6511 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6512 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6513 ret = i40e_add_vsi(ctl_vsi);
6514 if (ret) {
6515 dev_info(&pf->pdev->dev,
6516 "rebuild of veb_idx %d owner VSI failed: %d\n",
6517 veb->idx, ret);
6518 goto end_reconstitute;
6519 }
6520 i40e_vsi_reset_stats(ctl_vsi);
6521
6522 /* create the VEB in the switch and move the VSI onto the VEB */
6523 ret = i40e_add_veb(veb, ctl_vsi);
6524 if (ret)
6525 goto end_reconstitute;
6526
6527 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6528 veb->bridge_mode = BRIDGE_MODE_VEB;
6529 else
6530 veb->bridge_mode = BRIDGE_MODE_VEPA;
6531 i40e_config_bridge_mode(veb);
6532
6533 /* create the remaining VSIs attached to this VEB */
6534 for (v = 0; v < pf->num_alloc_vsi; v++) {
6535 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6536 continue;
6537
6538 if (pf->vsi[v]->veb_idx == veb->idx) {
6539 struct i40e_vsi *vsi = pf->vsi[v];
6540
6541 vsi->uplink_seid = veb->seid;
6542 ret = i40e_add_vsi(vsi);
6543 if (ret) {
6544 dev_info(&pf->pdev->dev,
6545 "rebuild of vsi_idx %d failed: %d\n",
6546 v, ret);
6547 goto end_reconstitute;
6548 }
6549 i40e_vsi_reset_stats(vsi);
6550 }
6551 }
6552
6553 /* create any VEBs attached to this VEB - RECURSION */
6554 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6555 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6556 pf->veb[veb_idx]->uplink_seid = veb->seid;
6557 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6558 if (ret)
6559 break;
6560 }
6561 }
6562
6563 end_reconstitute:
6564 return ret;
6565 }
6566
6567 /**
6568 * i40e_get_capabilities - get info about the HW
6569 * @pf: the PF struct
6570 **/
6571 static int i40e_get_capabilities(struct i40e_pf *pf)
6572 {
6573 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6574 u16 data_size;
6575 int buf_len;
6576 int err;
6577
6578 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6579 do {
6580 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6581 if (!cap_buf)
6582 return -ENOMEM;
6583
6584 /* this loads the data into the hw struct for us */
6585 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6586 &data_size,
6587 i40e_aqc_opc_list_func_capabilities,
6588 NULL);
6589 /* data loaded, buffer no longer needed */
6590 kfree(cap_buf);
6591
6592 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6593 /* retry with a larger buffer */
6594 buf_len = data_size;
6595 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6596 dev_info(&pf->pdev->dev,
6597 "capability discovery failed, err %s aq_err %s\n",
6598 i40e_stat_str(&pf->hw, err),
6599 i40e_aq_str(&pf->hw,
6600 pf->hw.aq.asq_last_status));
6601 return -ENODEV;
6602 }
6603 } while (err);
6604
6605 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6606 dev_info(&pf->pdev->dev,
6607 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6608 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6609 pf->hw.func_caps.num_msix_vectors,
6610 pf->hw.func_caps.num_msix_vectors_vf,
6611 pf->hw.func_caps.fd_filters_guaranteed,
6612 pf->hw.func_caps.fd_filters_best_effort,
6613 pf->hw.func_caps.num_tx_qp,
6614 pf->hw.func_caps.num_vsis);
6615
6616 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6617 + pf->hw.func_caps.num_vfs)
6618 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6619 dev_info(&pf->pdev->dev,
6620 "got num_vsis %d, setting num_vsis to %d\n",
6621 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6622 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6623 }
6624
6625 return 0;
6626 }
6627
6628 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6629
6630 /**
6631 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6632 * @pf: board private structure
6633 **/
6634 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6635 {
6636 struct i40e_vsi *vsi;
6637 int i;
6638
6639 /* quick workaround for an NVM issue that leaves a critical register
6640 * uninitialized
6641 */
6642 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6643 static const u32 hkey[] = {
6644 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6645 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6646 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6647 0x95b3a76d};
6648
6649 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6650 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6651 }
6652
6653 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6654 return;
6655
6656 /* find existing VSI and see if it needs configuring */
6657 vsi = NULL;
6658 for (i = 0; i < pf->num_alloc_vsi; i++) {
6659 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6660 vsi = pf->vsi[i];
6661 break;
6662 }
6663 }
6664
6665 /* create a new VSI if none exists */
6666 if (!vsi) {
6667 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6668 pf->vsi[pf->lan_vsi]->seid, 0);
6669 if (!vsi) {
6670 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6671 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6672 return;
6673 }
6674 }
6675
6676 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6677 }
6678
6679 /**
6680 * i40e_fdir_teardown - release the Flow Director resources
6681 * @pf: board private structure
6682 **/
6683 static void i40e_fdir_teardown(struct i40e_pf *pf)
6684 {
6685 int i;
6686
6687 i40e_fdir_filter_exit(pf);
6688 for (i = 0; i < pf->num_alloc_vsi; i++) {
6689 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6690 i40e_vsi_release(pf->vsi[i]);
6691 break;
6692 }
6693 }
6694 }
6695
6696 /**
6697 * i40e_prep_for_reset - prep for the core to reset
6698 * @pf: board private structure
6699 *
6700 * Close up the VFs and other things in prep for PF Reset.
6701 **/
6702 static void i40e_prep_for_reset(struct i40e_pf *pf)
6703 {
6704 struct i40e_hw *hw = &pf->hw;
6705 i40e_status ret = 0;
6706 u32 v;
6707
6708 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6709 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6710 return;
6711 if (i40e_check_asq_alive(&pf->hw))
6712 i40e_vc_notify_reset(pf);
6713
6714 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6715
6716 /* quiesce the VSIs and their queues that are not already DOWN */
6717 i40e_pf_quiesce_all_vsi(pf);
6718
6719 for (v = 0; v < pf->num_alloc_vsi; v++) {
6720 if (pf->vsi[v])
6721 pf->vsi[v]->seid = 0;
6722 }
6723
6724 i40e_shutdown_adminq(&pf->hw);
6725
6726 /* call shutdown HMC */
6727 if (hw->hmc.hmc_obj) {
6728 ret = i40e_shutdown_lan_hmc(hw);
6729 if (ret)
6730 dev_warn(&pf->pdev->dev,
6731 "shutdown_lan_hmc failed: %d\n", ret);
6732 }
6733 }
6734
6735 /**
6736 * i40e_send_version - update firmware with driver version
6737 * @pf: PF struct
6738 */
6739 static void i40e_send_version(struct i40e_pf *pf)
6740 {
6741 struct i40e_driver_version dv;
6742
6743 dv.major_version = DRV_VERSION_MAJOR;
6744 dv.minor_version = DRV_VERSION_MINOR;
6745 dv.build_version = DRV_VERSION_BUILD;
6746 dv.subbuild_version = 0;
6747 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6748 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6749 }
6750
6751 /**
6752 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6753 * @pf: board private structure
6754 * @reinit: if the Main VSI needs to re-initialized.
6755 **/
6756 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6757 {
6758 struct i40e_hw *hw = &pf->hw;
6759 u8 set_fc_aq_fail = 0;
6760 i40e_status ret;
6761 u32 val;
6762 u32 v;
6763
6764 /* Now we wait for GRST to settle out.
6765 * We don't have to delete the VEBs or VSIs from the hw switch
6766 * because the reset will make them disappear.
6767 */
6768 ret = i40e_pf_reset(hw);
6769 if (ret) {
6770 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6771 set_bit(__I40E_RESET_FAILED, &pf->state);
6772 goto clear_recovery;
6773 }
6774 pf->pfr_count++;
6775
6776 if (test_bit(__I40E_DOWN, &pf->state))
6777 goto clear_recovery;
6778 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6779
6780 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6781 ret = i40e_init_adminq(&pf->hw);
6782 if (ret) {
6783 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6784 i40e_stat_str(&pf->hw, ret),
6785 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6786 goto clear_recovery;
6787 }
6788
6789 /* re-verify the eeprom if we just had an EMP reset */
6790 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6791 i40e_verify_eeprom(pf);
6792
6793 i40e_clear_pxe_mode(hw);
6794 ret = i40e_get_capabilities(pf);
6795 if (ret)
6796 goto end_core_reset;
6797
6798 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6799 hw->func_caps.num_rx_qp,
6800 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6801 if (ret) {
6802 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6803 goto end_core_reset;
6804 }
6805 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6806 if (ret) {
6807 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6808 goto end_core_reset;
6809 }
6810
6811 #ifdef CONFIG_I40E_DCB
6812 ret = i40e_init_pf_dcb(pf);
6813 if (ret) {
6814 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6815 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6816 /* Continue without DCB enabled */
6817 }
6818 #endif /* CONFIG_I40E_DCB */
6819 #ifdef I40E_FCOE
6820 i40e_init_pf_fcoe(pf);
6821
6822 #endif
6823 /* do basic switch setup */
6824 ret = i40e_setup_pf_switch(pf, reinit);
6825 if (ret)
6826 goto end_core_reset;
6827
6828 /* The driver only wants link up/down and module qualification
6829 * reports from firmware. Note the negative logic.
6830 */
6831 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6832 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6833 I40E_AQ_EVENT_MEDIA_NA |
6834 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6835 if (ret)
6836 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6837 i40e_stat_str(&pf->hw, ret),
6838 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6839
6840 /* make sure our flow control settings are restored */
6841 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6842 if (ret)
6843 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6844 i40e_stat_str(&pf->hw, ret),
6845 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6846
6847 /* Rebuild the VSIs and VEBs that existed before reset.
6848 * They are still in our local switch element arrays, so only
6849 * need to rebuild the switch model in the HW.
6850 *
6851 * If there were VEBs but the reconstitution failed, we'll try
6852 * try to recover minimal use by getting the basic PF VSI working.
6853 */
6854 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6855 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6856 /* find the one VEB connected to the MAC, and find orphans */
6857 for (v = 0; v < I40E_MAX_VEB; v++) {
6858 if (!pf->veb[v])
6859 continue;
6860
6861 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6862 pf->veb[v]->uplink_seid == 0) {
6863 ret = i40e_reconstitute_veb(pf->veb[v]);
6864
6865 if (!ret)
6866 continue;
6867
6868 /* If Main VEB failed, we're in deep doodoo,
6869 * so give up rebuilding the switch and set up
6870 * for minimal rebuild of PF VSI.
6871 * If orphan failed, we'll report the error
6872 * but try to keep going.
6873 */
6874 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6875 dev_info(&pf->pdev->dev,
6876 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6877 ret);
6878 pf->vsi[pf->lan_vsi]->uplink_seid
6879 = pf->mac_seid;
6880 break;
6881 } else if (pf->veb[v]->uplink_seid == 0) {
6882 dev_info(&pf->pdev->dev,
6883 "rebuild of orphan VEB failed: %d\n",
6884 ret);
6885 }
6886 }
6887 }
6888 }
6889
6890 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6891 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6892 /* no VEB, so rebuild only the Main VSI */
6893 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6894 if (ret) {
6895 dev_info(&pf->pdev->dev,
6896 "rebuild of Main VSI failed: %d\n", ret);
6897 goto end_core_reset;
6898 }
6899 }
6900
6901 /* Reconfigure hardware for allowing smaller MSS in the case
6902 * of TSO, so that we avoid the MDD being fired and causing
6903 * a reset in the case of small MSS+TSO.
6904 */
6905 #define I40E_REG_MSS 0x000E64DC
6906 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6907 #define I40E_64BYTE_MSS 0x400000
6908 val = rd32(hw, I40E_REG_MSS);
6909 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6910 val &= ~I40E_REG_MSS_MIN_MASK;
6911 val |= I40E_64BYTE_MSS;
6912 wr32(hw, I40E_REG_MSS, val);
6913 }
6914
6915 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6916 msleep(75);
6917 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6918 if (ret)
6919 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6920 i40e_stat_str(&pf->hw, ret),
6921 i40e_aq_str(&pf->hw,
6922 pf->hw.aq.asq_last_status));
6923 }
6924 /* reinit the misc interrupt */
6925 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6926 ret = i40e_setup_misc_vector(pf);
6927
6928 /* Add a filter to drop all Flow control frames from any VSI from being
6929 * transmitted. By doing so we stop a malicious VF from sending out
6930 * PAUSE or PFC frames and potentially controlling traffic for other
6931 * PF/VF VSIs.
6932 * The FW can still send Flow control frames if enabled.
6933 */
6934 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6935 pf->main_vsi_seid);
6936
6937 /* restart the VSIs that were rebuilt and running before the reset */
6938 i40e_pf_unquiesce_all_vsi(pf);
6939
6940 if (pf->num_alloc_vfs) {
6941 for (v = 0; v < pf->num_alloc_vfs; v++)
6942 i40e_reset_vf(&pf->vf[v], true);
6943 }
6944
6945 /* tell the firmware that we're starting */
6946 i40e_send_version(pf);
6947
6948 end_core_reset:
6949 clear_bit(__I40E_RESET_FAILED, &pf->state);
6950 clear_recovery:
6951 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6952 }
6953
6954 /**
6955 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6956 * @pf: board private structure
6957 *
6958 * Close up the VFs and other things in prep for a Core Reset,
6959 * then get ready to rebuild the world.
6960 **/
6961 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6962 {
6963 i40e_prep_for_reset(pf);
6964 i40e_reset_and_rebuild(pf, false);
6965 }
6966
6967 /**
6968 * i40e_handle_mdd_event
6969 * @pf: pointer to the PF structure
6970 *
6971 * Called from the MDD irq handler to identify possibly malicious vfs
6972 **/
6973 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6974 {
6975 struct i40e_hw *hw = &pf->hw;
6976 bool mdd_detected = false;
6977 bool pf_mdd_detected = false;
6978 struct i40e_vf *vf;
6979 u32 reg;
6980 int i;
6981
6982 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6983 return;
6984
6985 /* find what triggered the MDD event */
6986 reg = rd32(hw, I40E_GL_MDET_TX);
6987 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6988 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6989 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6990 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6991 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6992 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6993 I40E_GL_MDET_TX_EVENT_SHIFT;
6994 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6995 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6996 pf->hw.func_caps.base_queue;
6997 if (netif_msg_tx_err(pf))
6998 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6999 event, queue, pf_num, vf_num);
7000 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7001 mdd_detected = true;
7002 }
7003 reg = rd32(hw, I40E_GL_MDET_RX);
7004 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7005 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7006 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7007 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7008 I40E_GL_MDET_RX_EVENT_SHIFT;
7009 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7010 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7011 pf->hw.func_caps.base_queue;
7012 if (netif_msg_rx_err(pf))
7013 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7014 event, queue, func);
7015 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7016 mdd_detected = true;
7017 }
7018
7019 if (mdd_detected) {
7020 reg = rd32(hw, I40E_PF_MDET_TX);
7021 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7022 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7023 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7024 pf_mdd_detected = true;
7025 }
7026 reg = rd32(hw, I40E_PF_MDET_RX);
7027 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7028 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7029 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7030 pf_mdd_detected = true;
7031 }
7032 /* Queue belongs to the PF, initiate a reset */
7033 if (pf_mdd_detected) {
7034 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7035 i40e_service_event_schedule(pf);
7036 }
7037 }
7038
7039 /* see if one of the VFs needs its hand slapped */
7040 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7041 vf = &(pf->vf[i]);
7042 reg = rd32(hw, I40E_VP_MDET_TX(i));
7043 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7044 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7045 vf->num_mdd_events++;
7046 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7047 i);
7048 }
7049
7050 reg = rd32(hw, I40E_VP_MDET_RX(i));
7051 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7052 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7053 vf->num_mdd_events++;
7054 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7055 i);
7056 }
7057
7058 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7059 dev_info(&pf->pdev->dev,
7060 "Too many MDD events on VF %d, disabled\n", i);
7061 dev_info(&pf->pdev->dev,
7062 "Use PF Control I/F to re-enable the VF\n");
7063 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7064 }
7065 }
7066
7067 /* re-enable mdd interrupt cause */
7068 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7069 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7070 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7071 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7072 i40e_flush(hw);
7073 }
7074
7075 /**
7076 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7077 * @pf: board private structure
7078 **/
7079 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7080 {
7081 struct i40e_hw *hw = &pf->hw;
7082 i40e_status ret;
7083 __be16 port;
7084 int i;
7085
7086 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7087 return;
7088
7089 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7090
7091 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7092 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7093 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7094 port = pf->udp_ports[i].index;
7095 if (port)
7096 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7097 pf->udp_ports[i].type,
7098 NULL, NULL);
7099 else
7100 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7101
7102 if (ret) {
7103 dev_dbg(&pf->pdev->dev,
7104 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7105 pf->udp_ports[i].type ? "vxlan" : "geneve",
7106 port ? "add" : "delete",
7107 ntohs(port), i,
7108 i40e_stat_str(&pf->hw, ret),
7109 i40e_aq_str(&pf->hw,
7110 pf->hw.aq.asq_last_status));
7111 pf->udp_ports[i].index = 0;
7112 }
7113 }
7114 }
7115 }
7116
7117 /**
7118 * i40e_service_task - Run the driver's async subtasks
7119 * @work: pointer to work_struct containing our data
7120 **/
7121 static void i40e_service_task(struct work_struct *work)
7122 {
7123 struct i40e_pf *pf = container_of(work,
7124 struct i40e_pf,
7125 service_task);
7126 unsigned long start_time = jiffies;
7127
7128 /* don't bother with service tasks if a reset is in progress */
7129 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7130 i40e_service_event_complete(pf);
7131 return;
7132 }
7133
7134 i40e_detect_recover_hung(pf);
7135 i40e_sync_filters_subtask(pf);
7136 i40e_reset_subtask(pf);
7137 i40e_handle_mdd_event(pf);
7138 i40e_vc_process_vflr_event(pf);
7139 i40e_watchdog_subtask(pf);
7140 i40e_fdir_reinit_subtask(pf);
7141 i40e_client_subtask(pf);
7142 i40e_sync_filters_subtask(pf);
7143 i40e_sync_udp_filters_subtask(pf);
7144 i40e_clean_adminq_subtask(pf);
7145
7146 i40e_service_event_complete(pf);
7147
7148 /* If the tasks have taken longer than one timer cycle or there
7149 * is more work to be done, reschedule the service task now
7150 * rather than wait for the timer to tick again.
7151 */
7152 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7153 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7154 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7155 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7156 i40e_service_event_schedule(pf);
7157 }
7158
7159 /**
7160 * i40e_service_timer - timer callback
7161 * @data: pointer to PF struct
7162 **/
7163 static void i40e_service_timer(unsigned long data)
7164 {
7165 struct i40e_pf *pf = (struct i40e_pf *)data;
7166
7167 mod_timer(&pf->service_timer,
7168 round_jiffies(jiffies + pf->service_timer_period));
7169 i40e_service_event_schedule(pf);
7170 }
7171
7172 /**
7173 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7174 * @vsi: the VSI being configured
7175 **/
7176 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7177 {
7178 struct i40e_pf *pf = vsi->back;
7179
7180 switch (vsi->type) {
7181 case I40E_VSI_MAIN:
7182 vsi->alloc_queue_pairs = pf->num_lan_qps;
7183 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7184 I40E_REQ_DESCRIPTOR_MULTIPLE);
7185 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7186 vsi->num_q_vectors = pf->num_lan_msix;
7187 else
7188 vsi->num_q_vectors = 1;
7189
7190 break;
7191
7192 case I40E_VSI_FDIR:
7193 vsi->alloc_queue_pairs = 1;
7194 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7195 I40E_REQ_DESCRIPTOR_MULTIPLE);
7196 vsi->num_q_vectors = pf->num_fdsb_msix;
7197 break;
7198
7199 case I40E_VSI_VMDQ2:
7200 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7201 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7202 I40E_REQ_DESCRIPTOR_MULTIPLE);
7203 vsi->num_q_vectors = pf->num_vmdq_msix;
7204 break;
7205
7206 case I40E_VSI_SRIOV:
7207 vsi->alloc_queue_pairs = pf->num_vf_qps;
7208 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7209 I40E_REQ_DESCRIPTOR_MULTIPLE);
7210 break;
7211
7212 #ifdef I40E_FCOE
7213 case I40E_VSI_FCOE:
7214 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7215 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7216 I40E_REQ_DESCRIPTOR_MULTIPLE);
7217 vsi->num_q_vectors = pf->num_fcoe_msix;
7218 break;
7219
7220 #endif /* I40E_FCOE */
7221 default:
7222 WARN_ON(1);
7223 return -ENODATA;
7224 }
7225
7226 return 0;
7227 }
7228
7229 /**
7230 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7231 * @type: VSI pointer
7232 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7233 *
7234 * On error: returns error code (negative)
7235 * On success: returns 0
7236 **/
7237 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7238 {
7239 int size;
7240 int ret = 0;
7241
7242 /* allocate memory for both Tx and Rx ring pointers */
7243 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7244 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7245 if (!vsi->tx_rings)
7246 return -ENOMEM;
7247 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7248
7249 if (alloc_qvectors) {
7250 /* allocate memory for q_vector pointers */
7251 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7252 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7253 if (!vsi->q_vectors) {
7254 ret = -ENOMEM;
7255 goto err_vectors;
7256 }
7257 }
7258 return ret;
7259
7260 err_vectors:
7261 kfree(vsi->tx_rings);
7262 return ret;
7263 }
7264
7265 /**
7266 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7267 * @pf: board private structure
7268 * @type: type of VSI
7269 *
7270 * On error: returns error code (negative)
7271 * On success: returns vsi index in PF (positive)
7272 **/
7273 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7274 {
7275 int ret = -ENODEV;
7276 struct i40e_vsi *vsi;
7277 int vsi_idx;
7278 int i;
7279
7280 /* Need to protect the allocation of the VSIs at the PF level */
7281 mutex_lock(&pf->switch_mutex);
7282
7283 /* VSI list may be fragmented if VSI creation/destruction has
7284 * been happening. We can afford to do a quick scan to look
7285 * for any free VSIs in the list.
7286 *
7287 * find next empty vsi slot, looping back around if necessary
7288 */
7289 i = pf->next_vsi;
7290 while (i < pf->num_alloc_vsi && pf->vsi[i])
7291 i++;
7292 if (i >= pf->num_alloc_vsi) {
7293 i = 0;
7294 while (i < pf->next_vsi && pf->vsi[i])
7295 i++;
7296 }
7297
7298 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7299 vsi_idx = i; /* Found one! */
7300 } else {
7301 ret = -ENODEV;
7302 goto unlock_pf; /* out of VSI slots! */
7303 }
7304 pf->next_vsi = ++i;
7305
7306 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7307 if (!vsi) {
7308 ret = -ENOMEM;
7309 goto unlock_pf;
7310 }
7311 vsi->type = type;
7312 vsi->back = pf;
7313 set_bit(__I40E_DOWN, &vsi->state);
7314 vsi->flags = 0;
7315 vsi->idx = vsi_idx;
7316 vsi->int_rate_limit = 0;
7317 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7318 pf->rss_table_size : 64;
7319 vsi->netdev_registered = false;
7320 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7321 INIT_LIST_HEAD(&vsi->mac_filter_list);
7322 vsi->irqs_ready = false;
7323
7324 ret = i40e_set_num_rings_in_vsi(vsi);
7325 if (ret)
7326 goto err_rings;
7327
7328 ret = i40e_vsi_alloc_arrays(vsi, true);
7329 if (ret)
7330 goto err_rings;
7331
7332 /* Setup default MSIX irq handler for VSI */
7333 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7334
7335 /* Initialize VSI lock */
7336 spin_lock_init(&vsi->mac_filter_list_lock);
7337 pf->vsi[vsi_idx] = vsi;
7338 ret = vsi_idx;
7339 goto unlock_pf;
7340
7341 err_rings:
7342 pf->next_vsi = i - 1;
7343 kfree(vsi);
7344 unlock_pf:
7345 mutex_unlock(&pf->switch_mutex);
7346 return ret;
7347 }
7348
7349 /**
7350 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7351 * @type: VSI pointer
7352 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7353 *
7354 * On error: returns error code (negative)
7355 * On success: returns 0
7356 **/
7357 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7358 {
7359 /* free the ring and vector containers */
7360 if (free_qvectors) {
7361 kfree(vsi->q_vectors);
7362 vsi->q_vectors = NULL;
7363 }
7364 kfree(vsi->tx_rings);
7365 vsi->tx_rings = NULL;
7366 vsi->rx_rings = NULL;
7367 }
7368
7369 /**
7370 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7371 * and lookup table
7372 * @vsi: Pointer to VSI structure
7373 */
7374 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7375 {
7376 if (!vsi)
7377 return;
7378
7379 kfree(vsi->rss_hkey_user);
7380 vsi->rss_hkey_user = NULL;
7381
7382 kfree(vsi->rss_lut_user);
7383 vsi->rss_lut_user = NULL;
7384 }
7385
7386 /**
7387 * i40e_vsi_clear - Deallocate the VSI provided
7388 * @vsi: the VSI being un-configured
7389 **/
7390 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7391 {
7392 struct i40e_pf *pf;
7393
7394 if (!vsi)
7395 return 0;
7396
7397 if (!vsi->back)
7398 goto free_vsi;
7399 pf = vsi->back;
7400
7401 mutex_lock(&pf->switch_mutex);
7402 if (!pf->vsi[vsi->idx]) {
7403 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7404 vsi->idx, vsi->idx, vsi, vsi->type);
7405 goto unlock_vsi;
7406 }
7407
7408 if (pf->vsi[vsi->idx] != vsi) {
7409 dev_err(&pf->pdev->dev,
7410 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7411 pf->vsi[vsi->idx]->idx,
7412 pf->vsi[vsi->idx],
7413 pf->vsi[vsi->idx]->type,
7414 vsi->idx, vsi, vsi->type);
7415 goto unlock_vsi;
7416 }
7417
7418 /* updates the PF for this cleared vsi */
7419 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7420 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7421
7422 i40e_vsi_free_arrays(vsi, true);
7423 i40e_clear_rss_config_user(vsi);
7424
7425 pf->vsi[vsi->idx] = NULL;
7426 if (vsi->idx < pf->next_vsi)
7427 pf->next_vsi = vsi->idx;
7428
7429 unlock_vsi:
7430 mutex_unlock(&pf->switch_mutex);
7431 free_vsi:
7432 kfree(vsi);
7433
7434 return 0;
7435 }
7436
7437 /**
7438 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7439 * @vsi: the VSI being cleaned
7440 **/
7441 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7442 {
7443 int i;
7444
7445 if (vsi->tx_rings && vsi->tx_rings[0]) {
7446 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7447 kfree_rcu(vsi->tx_rings[i], rcu);
7448 vsi->tx_rings[i] = NULL;
7449 vsi->rx_rings[i] = NULL;
7450 }
7451 }
7452 }
7453
7454 /**
7455 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7456 * @vsi: the VSI being configured
7457 **/
7458 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7459 {
7460 struct i40e_ring *tx_ring, *rx_ring;
7461 struct i40e_pf *pf = vsi->back;
7462 int i;
7463
7464 /* Set basic values in the rings to be used later during open() */
7465 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7466 /* allocate space for both Tx and Rx in one shot */
7467 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7468 if (!tx_ring)
7469 goto err_out;
7470
7471 tx_ring->queue_index = i;
7472 tx_ring->reg_idx = vsi->base_queue + i;
7473 tx_ring->ring_active = false;
7474 tx_ring->vsi = vsi;
7475 tx_ring->netdev = vsi->netdev;
7476 tx_ring->dev = &pf->pdev->dev;
7477 tx_ring->count = vsi->num_desc;
7478 tx_ring->size = 0;
7479 tx_ring->dcb_tc = 0;
7480 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7481 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7482 tx_ring->tx_itr_setting = pf->tx_itr_default;
7483 vsi->tx_rings[i] = tx_ring;
7484
7485 rx_ring = &tx_ring[1];
7486 rx_ring->queue_index = i;
7487 rx_ring->reg_idx = vsi->base_queue + i;
7488 rx_ring->ring_active = false;
7489 rx_ring->vsi = vsi;
7490 rx_ring->netdev = vsi->netdev;
7491 rx_ring->dev = &pf->pdev->dev;
7492 rx_ring->count = vsi->num_desc;
7493 rx_ring->size = 0;
7494 rx_ring->dcb_tc = 0;
7495 rx_ring->rx_itr_setting = pf->rx_itr_default;
7496 vsi->rx_rings[i] = rx_ring;
7497 }
7498
7499 return 0;
7500
7501 err_out:
7502 i40e_vsi_clear_rings(vsi);
7503 return -ENOMEM;
7504 }
7505
7506 /**
7507 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7508 * @pf: board private structure
7509 * @vectors: the number of MSI-X vectors to request
7510 *
7511 * Returns the number of vectors reserved, or error
7512 **/
7513 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7514 {
7515 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7516 I40E_MIN_MSIX, vectors);
7517 if (vectors < 0) {
7518 dev_info(&pf->pdev->dev,
7519 "MSI-X vector reservation failed: %d\n", vectors);
7520 vectors = 0;
7521 }
7522
7523 return vectors;
7524 }
7525
7526 /**
7527 * i40e_init_msix - Setup the MSIX capability
7528 * @pf: board private structure
7529 *
7530 * Work with the OS to set up the MSIX vectors needed.
7531 *
7532 * Returns the number of vectors reserved or negative on failure
7533 **/
7534 static int i40e_init_msix(struct i40e_pf *pf)
7535 {
7536 struct i40e_hw *hw = &pf->hw;
7537 int vectors_left;
7538 int v_budget, i;
7539 int v_actual;
7540 int iwarp_requested = 0;
7541
7542 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7543 return -ENODEV;
7544
7545 /* The number of vectors we'll request will be comprised of:
7546 * - Add 1 for "other" cause for Admin Queue events, etc.
7547 * - The number of LAN queue pairs
7548 * - Queues being used for RSS.
7549 * We don't need as many as max_rss_size vectors.
7550 * use rss_size instead in the calculation since that
7551 * is governed by number of cpus in the system.
7552 * - assumes symmetric Tx/Rx pairing
7553 * - The number of VMDq pairs
7554 * - The CPU count within the NUMA node if iWARP is enabled
7555 #ifdef I40E_FCOE
7556 * - The number of FCOE qps.
7557 #endif
7558 * Once we count this up, try the request.
7559 *
7560 * If we can't get what we want, we'll simplify to nearly nothing
7561 * and try again. If that still fails, we punt.
7562 */
7563 vectors_left = hw->func_caps.num_msix_vectors;
7564 v_budget = 0;
7565
7566 /* reserve one vector for miscellaneous handler */
7567 if (vectors_left) {
7568 v_budget++;
7569 vectors_left--;
7570 }
7571
7572 /* reserve vectors for the main PF traffic queues */
7573 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7574 vectors_left -= pf->num_lan_msix;
7575 v_budget += pf->num_lan_msix;
7576
7577 /* reserve one vector for sideband flow director */
7578 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7579 if (vectors_left) {
7580 pf->num_fdsb_msix = 1;
7581 v_budget++;
7582 vectors_left--;
7583 } else {
7584 pf->num_fdsb_msix = 0;
7585 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7586 }
7587 }
7588
7589 #ifdef I40E_FCOE
7590 /* can we reserve enough for FCoE? */
7591 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7592 if (!vectors_left)
7593 pf->num_fcoe_msix = 0;
7594 else if (vectors_left >= pf->num_fcoe_qps)
7595 pf->num_fcoe_msix = pf->num_fcoe_qps;
7596 else
7597 pf->num_fcoe_msix = 1;
7598 v_budget += pf->num_fcoe_msix;
7599 vectors_left -= pf->num_fcoe_msix;
7600 }
7601
7602 #endif
7603 /* can we reserve enough for iWARP? */
7604 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7605 if (!vectors_left)
7606 pf->num_iwarp_msix = 0;
7607 else if (vectors_left < pf->num_iwarp_msix)
7608 pf->num_iwarp_msix = 1;
7609 v_budget += pf->num_iwarp_msix;
7610 vectors_left -= pf->num_iwarp_msix;
7611 }
7612
7613 /* any vectors left over go for VMDq support */
7614 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7615 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7616 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7617
7618 /* if we're short on vectors for what's desired, we limit
7619 * the queues per vmdq. If this is still more than are
7620 * available, the user will need to change the number of
7621 * queues/vectors used by the PF later with the ethtool
7622 * channels command
7623 */
7624 if (vmdq_vecs < vmdq_vecs_wanted)
7625 pf->num_vmdq_qps = 1;
7626 pf->num_vmdq_msix = pf->num_vmdq_qps;
7627
7628 v_budget += vmdq_vecs;
7629 vectors_left -= vmdq_vecs;
7630 }
7631
7632 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7633 GFP_KERNEL);
7634 if (!pf->msix_entries)
7635 return -ENOMEM;
7636
7637 for (i = 0; i < v_budget; i++)
7638 pf->msix_entries[i].entry = i;
7639 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7640
7641 if (v_actual != v_budget) {
7642 /* If we have limited resources, we will start with no vectors
7643 * for the special features and then allocate vectors to some
7644 * of these features based on the policy and at the end disable
7645 * the features that did not get any vectors.
7646 */
7647 iwarp_requested = pf->num_iwarp_msix;
7648 pf->num_iwarp_msix = 0;
7649 #ifdef I40E_FCOE
7650 pf->num_fcoe_qps = 0;
7651 pf->num_fcoe_msix = 0;
7652 #endif
7653 pf->num_vmdq_msix = 0;
7654 }
7655
7656 if (v_actual < I40E_MIN_MSIX) {
7657 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7658 kfree(pf->msix_entries);
7659 pf->msix_entries = NULL;
7660 return -ENODEV;
7661
7662 } else if (v_actual == I40E_MIN_MSIX) {
7663 /* Adjust for minimal MSIX use */
7664 pf->num_vmdq_vsis = 0;
7665 pf->num_vmdq_qps = 0;
7666 pf->num_lan_qps = 1;
7667 pf->num_lan_msix = 1;
7668
7669 } else if (v_actual != v_budget) {
7670 int vec;
7671
7672 /* reserve the misc vector */
7673 vec = v_actual - 1;
7674
7675 /* Scale vector usage down */
7676 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7677 pf->num_vmdq_vsis = 1;
7678 pf->num_vmdq_qps = 1;
7679 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7680
7681 /* partition out the remaining vectors */
7682 switch (vec) {
7683 case 2:
7684 pf->num_lan_msix = 1;
7685 break;
7686 case 3:
7687 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7688 pf->num_lan_msix = 1;
7689 pf->num_iwarp_msix = 1;
7690 } else {
7691 pf->num_lan_msix = 2;
7692 }
7693 #ifdef I40E_FCOE
7694 /* give one vector to FCoE */
7695 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7696 pf->num_lan_msix = 1;
7697 pf->num_fcoe_msix = 1;
7698 }
7699 #endif
7700 break;
7701 default:
7702 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7703 pf->num_iwarp_msix = min_t(int, (vec / 3),
7704 iwarp_requested);
7705 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7706 I40E_DEFAULT_NUM_VMDQ_VSI);
7707 } else {
7708 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7709 I40E_DEFAULT_NUM_VMDQ_VSI);
7710 }
7711 pf->num_lan_msix = min_t(int,
7712 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7713 pf->num_lan_msix);
7714 #ifdef I40E_FCOE
7715 /* give one vector to FCoE */
7716 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7717 pf->num_fcoe_msix = 1;
7718 vec--;
7719 }
7720 #endif
7721 break;
7722 }
7723 }
7724
7725 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7726 (pf->num_vmdq_msix == 0)) {
7727 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7728 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7729 }
7730
7731 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7732 (pf->num_iwarp_msix == 0)) {
7733 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7734 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7735 }
7736 #ifdef I40E_FCOE
7737
7738 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7739 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7740 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7741 }
7742 #endif
7743 return v_actual;
7744 }
7745
7746 /**
7747 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7748 * @vsi: the VSI being configured
7749 * @v_idx: index of the vector in the vsi struct
7750 * @cpu: cpu to be used on affinity_mask
7751 *
7752 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7753 **/
7754 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
7755 {
7756 struct i40e_q_vector *q_vector;
7757
7758 /* allocate q_vector */
7759 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7760 if (!q_vector)
7761 return -ENOMEM;
7762
7763 q_vector->vsi = vsi;
7764 q_vector->v_idx = v_idx;
7765 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
7766
7767 if (vsi->netdev)
7768 netif_napi_add(vsi->netdev, &q_vector->napi,
7769 i40e_napi_poll, NAPI_POLL_WEIGHT);
7770
7771 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7772 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7773
7774 /* tie q_vector and vsi together */
7775 vsi->q_vectors[v_idx] = q_vector;
7776
7777 return 0;
7778 }
7779
7780 /**
7781 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7782 * @vsi: the VSI being configured
7783 *
7784 * We allocate one q_vector per queue interrupt. If allocation fails we
7785 * return -ENOMEM.
7786 **/
7787 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7788 {
7789 struct i40e_pf *pf = vsi->back;
7790 int err, v_idx, num_q_vectors, current_cpu;
7791
7792 /* if not MSIX, give the one vector only to the LAN VSI */
7793 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7794 num_q_vectors = vsi->num_q_vectors;
7795 else if (vsi == pf->vsi[pf->lan_vsi])
7796 num_q_vectors = 1;
7797 else
7798 return -EINVAL;
7799
7800 current_cpu = cpumask_first(cpu_online_mask);
7801
7802 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7803 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
7804 if (err)
7805 goto err_out;
7806 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
7807 if (unlikely(current_cpu >= nr_cpu_ids))
7808 current_cpu = cpumask_first(cpu_online_mask);
7809 }
7810
7811 return 0;
7812
7813 err_out:
7814 while (v_idx--)
7815 i40e_free_q_vector(vsi, v_idx);
7816
7817 return err;
7818 }
7819
7820 /**
7821 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7822 * @pf: board private structure to initialize
7823 **/
7824 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7825 {
7826 int vectors = 0;
7827 ssize_t size;
7828
7829 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7830 vectors = i40e_init_msix(pf);
7831 if (vectors < 0) {
7832 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7833 I40E_FLAG_IWARP_ENABLED |
7834 #ifdef I40E_FCOE
7835 I40E_FLAG_FCOE_ENABLED |
7836 #endif
7837 I40E_FLAG_RSS_ENABLED |
7838 I40E_FLAG_DCB_CAPABLE |
7839 I40E_FLAG_SRIOV_ENABLED |
7840 I40E_FLAG_FD_SB_ENABLED |
7841 I40E_FLAG_FD_ATR_ENABLED |
7842 I40E_FLAG_VMDQ_ENABLED);
7843
7844 /* rework the queue expectations without MSIX */
7845 i40e_determine_queue_usage(pf);
7846 }
7847 }
7848
7849 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7850 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7851 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7852 vectors = pci_enable_msi(pf->pdev);
7853 if (vectors < 0) {
7854 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7855 vectors);
7856 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7857 }
7858 vectors = 1; /* one MSI or Legacy vector */
7859 }
7860
7861 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7862 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7863
7864 /* set up vector assignment tracking */
7865 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7866 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7867 if (!pf->irq_pile) {
7868 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7869 return -ENOMEM;
7870 }
7871 pf->irq_pile->num_entries = vectors;
7872 pf->irq_pile->search_hint = 0;
7873
7874 /* track first vector for misc interrupts, ignore return */
7875 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7876
7877 return 0;
7878 }
7879
7880 /**
7881 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7882 * @pf: board private structure
7883 *
7884 * This sets up the handler for MSIX 0, which is used to manage the
7885 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7886 * when in MSI or Legacy interrupt mode.
7887 **/
7888 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7889 {
7890 struct i40e_hw *hw = &pf->hw;
7891 int err = 0;
7892
7893 /* Only request the irq if this is the first time through, and
7894 * not when we're rebuilding after a Reset
7895 */
7896 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7897 err = request_irq(pf->msix_entries[0].vector,
7898 i40e_intr, 0, pf->int_name, pf);
7899 if (err) {
7900 dev_info(&pf->pdev->dev,
7901 "request_irq for %s failed: %d\n",
7902 pf->int_name, err);
7903 return -EFAULT;
7904 }
7905 }
7906
7907 i40e_enable_misc_int_causes(pf);
7908
7909 /* associate no queues to the misc vector */
7910 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7911 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7912
7913 i40e_flush(hw);
7914
7915 i40e_irq_dynamic_enable_icr0(pf, true);
7916
7917 return err;
7918 }
7919
7920 /**
7921 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7922 * @vsi: vsi structure
7923 * @seed: RSS hash seed
7924 **/
7925 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7926 u8 *lut, u16 lut_size)
7927 {
7928 struct i40e_aqc_get_set_rss_key_data rss_key;
7929 struct i40e_pf *pf = vsi->back;
7930 struct i40e_hw *hw = &pf->hw;
7931 bool pf_lut = false;
7932 u8 *rss_lut;
7933 int ret, i;
7934
7935 memset(&rss_key, 0, sizeof(rss_key));
7936 memcpy(&rss_key, seed, sizeof(rss_key));
7937
7938 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7939 if (!rss_lut)
7940 return -ENOMEM;
7941
7942 /* Populate the LUT with max no. of queues in round robin fashion */
7943 for (i = 0; i < vsi->rss_table_size; i++)
7944 rss_lut[i] = i % vsi->rss_size;
7945
7946 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7947 if (ret) {
7948 dev_info(&pf->pdev->dev,
7949 "Cannot set RSS key, err %s aq_err %s\n",
7950 i40e_stat_str(&pf->hw, ret),
7951 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7952 goto config_rss_aq_out;
7953 }
7954
7955 if (vsi->type == I40E_VSI_MAIN)
7956 pf_lut = true;
7957
7958 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7959 vsi->rss_table_size);
7960 if (ret)
7961 dev_info(&pf->pdev->dev,
7962 "Cannot set RSS lut, err %s aq_err %s\n",
7963 i40e_stat_str(&pf->hw, ret),
7964 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7965
7966 config_rss_aq_out:
7967 kfree(rss_lut);
7968 return ret;
7969 }
7970
7971 /**
7972 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7973 * @vsi: VSI structure
7974 **/
7975 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7976 {
7977 u8 seed[I40E_HKEY_ARRAY_SIZE];
7978 struct i40e_pf *pf = vsi->back;
7979 u8 *lut;
7980 int ret;
7981
7982 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7983 return 0;
7984
7985 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7986 if (!lut)
7987 return -ENOMEM;
7988
7989 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7990 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7991 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7992 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7993 kfree(lut);
7994
7995 return ret;
7996 }
7997
7998 /**
7999 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8000 * @vsi: Pointer to vsi structure
8001 * @seed: Buffter to store the hash keys
8002 * @lut: Buffer to store the lookup table entries
8003 * @lut_size: Size of buffer to store the lookup table entries
8004 *
8005 * Return 0 on success, negative on failure
8006 */
8007 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8008 u8 *lut, u16 lut_size)
8009 {
8010 struct i40e_pf *pf = vsi->back;
8011 struct i40e_hw *hw = &pf->hw;
8012 int ret = 0;
8013
8014 if (seed) {
8015 ret = i40e_aq_get_rss_key(hw, vsi->id,
8016 (struct i40e_aqc_get_set_rss_key_data *)seed);
8017 if (ret) {
8018 dev_info(&pf->pdev->dev,
8019 "Cannot get RSS key, err %s aq_err %s\n",
8020 i40e_stat_str(&pf->hw, ret),
8021 i40e_aq_str(&pf->hw,
8022 pf->hw.aq.asq_last_status));
8023 return ret;
8024 }
8025 }
8026
8027 if (lut) {
8028 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8029
8030 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8031 if (ret) {
8032 dev_info(&pf->pdev->dev,
8033 "Cannot get RSS lut, err %s aq_err %s\n",
8034 i40e_stat_str(&pf->hw, ret),
8035 i40e_aq_str(&pf->hw,
8036 pf->hw.aq.asq_last_status));
8037 return ret;
8038 }
8039 }
8040
8041 return ret;
8042 }
8043
8044 /**
8045 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8046 * @vsi: Pointer to vsi structure
8047 * @seed: RSS hash seed
8048 * @lut: Lookup table
8049 * @lut_size: Lookup table size
8050 *
8051 * Returns 0 on success, negative on failure
8052 **/
8053 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8054 const u8 *lut, u16 lut_size)
8055 {
8056 struct i40e_pf *pf = vsi->back;
8057 struct i40e_hw *hw = &pf->hw;
8058 u16 vf_id = vsi->vf_id;
8059 u8 i;
8060
8061 /* Fill out hash function seed */
8062 if (seed) {
8063 u32 *seed_dw = (u32 *)seed;
8064
8065 if (vsi->type == I40E_VSI_MAIN) {
8066 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8067 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8068 seed_dw[i]);
8069 } else if (vsi->type == I40E_VSI_SRIOV) {
8070 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8071 i40e_write_rx_ctl(hw,
8072 I40E_VFQF_HKEY1(i, vf_id),
8073 seed_dw[i]);
8074 } else {
8075 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8076 }
8077 }
8078
8079 if (lut) {
8080 u32 *lut_dw = (u32 *)lut;
8081
8082 if (vsi->type == I40E_VSI_MAIN) {
8083 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8084 return -EINVAL;
8085 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8086 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8087 } else if (vsi->type == I40E_VSI_SRIOV) {
8088 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8089 return -EINVAL;
8090 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8091 i40e_write_rx_ctl(hw,
8092 I40E_VFQF_HLUT1(i, vf_id),
8093 lut_dw[i]);
8094 } else {
8095 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8096 }
8097 }
8098 i40e_flush(hw);
8099
8100 return 0;
8101 }
8102
8103 /**
8104 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8105 * @vsi: Pointer to VSI structure
8106 * @seed: Buffer to store the keys
8107 * @lut: Buffer to store the lookup table entries
8108 * @lut_size: Size of buffer to store the lookup table entries
8109 *
8110 * Returns 0 on success, negative on failure
8111 */
8112 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8113 u8 *lut, u16 lut_size)
8114 {
8115 struct i40e_pf *pf = vsi->back;
8116 struct i40e_hw *hw = &pf->hw;
8117 u16 i;
8118
8119 if (seed) {
8120 u32 *seed_dw = (u32 *)seed;
8121
8122 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8123 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8124 }
8125 if (lut) {
8126 u32 *lut_dw = (u32 *)lut;
8127
8128 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8129 return -EINVAL;
8130 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8131 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8132 }
8133
8134 return 0;
8135 }
8136
8137 /**
8138 * i40e_config_rss - Configure RSS keys and lut
8139 * @vsi: Pointer to VSI structure
8140 * @seed: RSS hash seed
8141 * @lut: Lookup table
8142 * @lut_size: Lookup table size
8143 *
8144 * Returns 0 on success, negative on failure
8145 */
8146 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8147 {
8148 struct i40e_pf *pf = vsi->back;
8149
8150 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8151 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8152 else
8153 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8154 }
8155
8156 /**
8157 * i40e_get_rss - Get RSS keys and lut
8158 * @vsi: Pointer to VSI structure
8159 * @seed: Buffer to store the keys
8160 * @lut: Buffer to store the lookup table entries
8161 * lut_size: Size of buffer to store the lookup table entries
8162 *
8163 * Returns 0 on success, negative on failure
8164 */
8165 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8166 {
8167 struct i40e_pf *pf = vsi->back;
8168
8169 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8170 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8171 else
8172 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8173 }
8174
8175 /**
8176 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8177 * @pf: Pointer to board private structure
8178 * @lut: Lookup table
8179 * @rss_table_size: Lookup table size
8180 * @rss_size: Range of queue number for hashing
8181 */
8182 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8183 u16 rss_table_size, u16 rss_size)
8184 {
8185 u16 i;
8186
8187 for (i = 0; i < rss_table_size; i++)
8188 lut[i] = i % rss_size;
8189 }
8190
8191 /**
8192 * i40e_pf_config_rss - Prepare for RSS if used
8193 * @pf: board private structure
8194 **/
8195 static int i40e_pf_config_rss(struct i40e_pf *pf)
8196 {
8197 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8198 u8 seed[I40E_HKEY_ARRAY_SIZE];
8199 u8 *lut;
8200 struct i40e_hw *hw = &pf->hw;
8201 u32 reg_val;
8202 u64 hena;
8203 int ret;
8204
8205 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8206 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8207 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8208 hena |= i40e_pf_get_default_rss_hena(pf);
8209
8210 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8211 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8212
8213 /* Determine the RSS table size based on the hardware capabilities */
8214 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8215 reg_val = (pf->rss_table_size == 512) ?
8216 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8217 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8218 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8219
8220 /* Determine the RSS size of the VSI */
8221 if (!vsi->rss_size)
8222 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8223 vsi->num_queue_pairs);
8224
8225 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8226 if (!lut)
8227 return -ENOMEM;
8228
8229 /* Use user configured lut if there is one, otherwise use default */
8230 if (vsi->rss_lut_user)
8231 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8232 else
8233 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8234
8235 /* Use user configured hash key if there is one, otherwise
8236 * use default.
8237 */
8238 if (vsi->rss_hkey_user)
8239 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8240 else
8241 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8242 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8243 kfree(lut);
8244
8245 return ret;
8246 }
8247
8248 /**
8249 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8250 * @pf: board private structure
8251 * @queue_count: the requested queue count for rss.
8252 *
8253 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8254 * count which may be different from the requested queue count.
8255 **/
8256 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8257 {
8258 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8259 int new_rss_size;
8260
8261 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8262 return 0;
8263
8264 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8265
8266 if (queue_count != vsi->num_queue_pairs) {
8267 vsi->req_queue_pairs = queue_count;
8268 i40e_prep_for_reset(pf);
8269
8270 pf->alloc_rss_size = new_rss_size;
8271
8272 i40e_reset_and_rebuild(pf, true);
8273
8274 /* Discard the user configured hash keys and lut, if less
8275 * queues are enabled.
8276 */
8277 if (queue_count < vsi->rss_size) {
8278 i40e_clear_rss_config_user(vsi);
8279 dev_dbg(&pf->pdev->dev,
8280 "discard user configured hash keys and lut\n");
8281 }
8282
8283 /* Reset vsi->rss_size, as number of enabled queues changed */
8284 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8285 vsi->num_queue_pairs);
8286
8287 i40e_pf_config_rss(pf);
8288 }
8289 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8290 pf->alloc_rss_size, pf->rss_size_max);
8291 return pf->alloc_rss_size;
8292 }
8293
8294 /**
8295 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8296 * @pf: board private structure
8297 **/
8298 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8299 {
8300 i40e_status status;
8301 bool min_valid, max_valid;
8302 u32 max_bw, min_bw;
8303
8304 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8305 &min_valid, &max_valid);
8306
8307 if (!status) {
8308 if (min_valid)
8309 pf->npar_min_bw = min_bw;
8310 if (max_valid)
8311 pf->npar_max_bw = max_bw;
8312 }
8313
8314 return status;
8315 }
8316
8317 /**
8318 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8319 * @pf: board private structure
8320 **/
8321 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8322 {
8323 struct i40e_aqc_configure_partition_bw_data bw_data;
8324 i40e_status status;
8325
8326 /* Set the valid bit for this PF */
8327 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8328 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8329 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8330
8331 /* Set the new bandwidths */
8332 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8333
8334 return status;
8335 }
8336
8337 /**
8338 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8339 * @pf: board private structure
8340 **/
8341 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8342 {
8343 /* Commit temporary BW setting to permanent NVM image */
8344 enum i40e_admin_queue_err last_aq_status;
8345 i40e_status ret;
8346 u16 nvm_word;
8347
8348 if (pf->hw.partition_id != 1) {
8349 dev_info(&pf->pdev->dev,
8350 "Commit BW only works on partition 1! This is partition %d",
8351 pf->hw.partition_id);
8352 ret = I40E_NOT_SUPPORTED;
8353 goto bw_commit_out;
8354 }
8355
8356 /* Acquire NVM for read access */
8357 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8358 last_aq_status = pf->hw.aq.asq_last_status;
8359 if (ret) {
8360 dev_info(&pf->pdev->dev,
8361 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8362 i40e_stat_str(&pf->hw, ret),
8363 i40e_aq_str(&pf->hw, last_aq_status));
8364 goto bw_commit_out;
8365 }
8366
8367 /* Read word 0x10 of NVM - SW compatibility word 1 */
8368 ret = i40e_aq_read_nvm(&pf->hw,
8369 I40E_SR_NVM_CONTROL_WORD,
8370 0x10, sizeof(nvm_word), &nvm_word,
8371 false, NULL);
8372 /* Save off last admin queue command status before releasing
8373 * the NVM
8374 */
8375 last_aq_status = pf->hw.aq.asq_last_status;
8376 i40e_release_nvm(&pf->hw);
8377 if (ret) {
8378 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8379 i40e_stat_str(&pf->hw, ret),
8380 i40e_aq_str(&pf->hw, last_aq_status));
8381 goto bw_commit_out;
8382 }
8383
8384 /* Wait a bit for NVM release to complete */
8385 msleep(50);
8386
8387 /* Acquire NVM for write access */
8388 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8389 last_aq_status = pf->hw.aq.asq_last_status;
8390 if (ret) {
8391 dev_info(&pf->pdev->dev,
8392 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8393 i40e_stat_str(&pf->hw, ret),
8394 i40e_aq_str(&pf->hw, last_aq_status));
8395 goto bw_commit_out;
8396 }
8397 /* Write it back out unchanged to initiate update NVM,
8398 * which will force a write of the shadow (alt) RAM to
8399 * the NVM - thus storing the bandwidth values permanently.
8400 */
8401 ret = i40e_aq_update_nvm(&pf->hw,
8402 I40E_SR_NVM_CONTROL_WORD,
8403 0x10, sizeof(nvm_word),
8404 &nvm_word, true, NULL);
8405 /* Save off last admin queue command status before releasing
8406 * the NVM
8407 */
8408 last_aq_status = pf->hw.aq.asq_last_status;
8409 i40e_release_nvm(&pf->hw);
8410 if (ret)
8411 dev_info(&pf->pdev->dev,
8412 "BW settings NOT SAVED, err %s aq_err %s\n",
8413 i40e_stat_str(&pf->hw, ret),
8414 i40e_aq_str(&pf->hw, last_aq_status));
8415 bw_commit_out:
8416
8417 return ret;
8418 }
8419
8420 /**
8421 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8422 * @pf: board private structure to initialize
8423 *
8424 * i40e_sw_init initializes the Adapter private data structure.
8425 * Fields are initialized based on PCI device information and
8426 * OS network device settings (MTU size).
8427 **/
8428 static int i40e_sw_init(struct i40e_pf *pf)
8429 {
8430 int err = 0;
8431 int size;
8432
8433 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8434 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8435 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8436 if (I40E_DEBUG_USER & debug)
8437 pf->hw.debug_mask = debug;
8438 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8439 I40E_DEFAULT_MSG_ENABLE);
8440 }
8441
8442 /* Set default capability flags */
8443 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8444 I40E_FLAG_MSI_ENABLED |
8445 I40E_FLAG_MSIX_ENABLED;
8446
8447 /* Set default ITR */
8448 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8449 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8450
8451 /* Depending on PF configurations, it is possible that the RSS
8452 * maximum might end up larger than the available queues
8453 */
8454 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8455 pf->alloc_rss_size = 1;
8456 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8457 pf->rss_size_max = min_t(int, pf->rss_size_max,
8458 pf->hw.func_caps.num_tx_qp);
8459 if (pf->hw.func_caps.rss) {
8460 pf->flags |= I40E_FLAG_RSS_ENABLED;
8461 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8462 num_online_cpus());
8463 }
8464
8465 /* MFP mode enabled */
8466 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8467 pf->flags |= I40E_FLAG_MFP_ENABLED;
8468 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8469 if (i40e_get_npar_bw_setting(pf))
8470 dev_warn(&pf->pdev->dev,
8471 "Could not get NPAR bw settings\n");
8472 else
8473 dev_info(&pf->pdev->dev,
8474 "Min BW = %8.8x, Max BW = %8.8x\n",
8475 pf->npar_min_bw, pf->npar_max_bw);
8476 }
8477
8478 /* FW/NVM is not yet fixed in this regard */
8479 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8480 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8481 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8482 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8483 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8484 pf->hw.num_partitions > 1)
8485 dev_info(&pf->pdev->dev,
8486 "Flow Director Sideband mode Disabled in MFP mode\n");
8487 else
8488 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8489 pf->fdir_pf_filter_count =
8490 pf->hw.func_caps.fd_filters_guaranteed;
8491 pf->hw.fdir_shared_filter_count =
8492 pf->hw.func_caps.fd_filters_best_effort;
8493 }
8494
8495 if (i40e_is_mac_710(&pf->hw) &&
8496 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8497 (pf->hw.aq.fw_maj_ver < 4))) {
8498 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8499 /* No DCB support for FW < v4.33 */
8500 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8501 }
8502
8503 /* Disable FW LLDP if FW < v4.3 */
8504 if (i40e_is_mac_710(&pf->hw) &&
8505 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8506 (pf->hw.aq.fw_maj_ver < 4)))
8507 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8508
8509 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8510 if (i40e_is_mac_710(&pf->hw) &&
8511 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8512 (pf->hw.aq.fw_maj_ver >= 5)))
8513 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8514
8515 if (pf->hw.func_caps.vmdq) {
8516 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8517 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8518 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8519 }
8520
8521 if (pf->hw.func_caps.iwarp) {
8522 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8523 /* IWARP needs one extra vector for CQP just like MISC.*/
8524 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8525 }
8526
8527 #ifdef I40E_FCOE
8528 i40e_init_pf_fcoe(pf);
8529
8530 #endif /* I40E_FCOE */
8531 #ifdef CONFIG_PCI_IOV
8532 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8533 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8534 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8535 pf->num_req_vfs = min_t(int,
8536 pf->hw.func_caps.num_vfs,
8537 I40E_MAX_VF_COUNT);
8538 }
8539 #endif /* CONFIG_PCI_IOV */
8540 if (pf->hw.mac.type == I40E_MAC_X722) {
8541 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8542 I40E_FLAG_128_QP_RSS_CAPABLE |
8543 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8544 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8545 I40E_FLAG_WB_ON_ITR_CAPABLE |
8546 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8547 I40E_FLAG_NO_PCI_LINK_CHECK |
8548 I40E_FLAG_100M_SGMII_CAPABLE |
8549 I40E_FLAG_USE_SET_LLDP_MIB |
8550 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8551 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8552 ((pf->hw.aq.api_maj_ver == 1) &&
8553 (pf->hw.aq.api_min_ver > 4))) {
8554 /* Supported in FW API version higher than 1.4 */
8555 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8556 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8557 } else {
8558 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8559 }
8560
8561 pf->eeprom_version = 0xDEAD;
8562 pf->lan_veb = I40E_NO_VEB;
8563 pf->lan_vsi = I40E_NO_VSI;
8564
8565 /* By default FW has this off for performance reasons */
8566 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8567
8568 /* set up queue assignment tracking */
8569 size = sizeof(struct i40e_lump_tracking)
8570 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8571 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8572 if (!pf->qp_pile) {
8573 err = -ENOMEM;
8574 goto sw_init_done;
8575 }
8576 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8577 pf->qp_pile->search_hint = 0;
8578
8579 pf->tx_timeout_recovery_level = 1;
8580
8581 mutex_init(&pf->switch_mutex);
8582
8583 /* If NPAR is enabled nudge the Tx scheduler */
8584 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8585 i40e_set_npar_bw_setting(pf);
8586
8587 sw_init_done:
8588 return err;
8589 }
8590
8591 /**
8592 * i40e_set_ntuple - set the ntuple feature flag and take action
8593 * @pf: board private structure to initialize
8594 * @features: the feature set that the stack is suggesting
8595 *
8596 * returns a bool to indicate if reset needs to happen
8597 **/
8598 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8599 {
8600 bool need_reset = false;
8601
8602 /* Check if Flow Director n-tuple support was enabled or disabled. If
8603 * the state changed, we need to reset.
8604 */
8605 if (features & NETIF_F_NTUPLE) {
8606 /* Enable filters and mark for reset */
8607 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8608 need_reset = true;
8609 /* enable FD_SB only if there is MSI-X vector */
8610 if (pf->num_fdsb_msix > 0)
8611 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8612 } else {
8613 /* turn off filters, mark for reset and clear SW filter list */
8614 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8615 need_reset = true;
8616 i40e_fdir_filter_exit(pf);
8617 }
8618 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8619 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8620 /* reset fd counters */
8621 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8622 pf->fdir_pf_active_filters = 0;
8623 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8624 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8625 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8626 /* if ATR was auto disabled it can be re-enabled. */
8627 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8628 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8629 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8630 }
8631 return need_reset;
8632 }
8633
8634 /**
8635 * i40e_set_features - set the netdev feature flags
8636 * @netdev: ptr to the netdev being adjusted
8637 * @features: the feature set that the stack is suggesting
8638 **/
8639 static int i40e_set_features(struct net_device *netdev,
8640 netdev_features_t features)
8641 {
8642 struct i40e_netdev_priv *np = netdev_priv(netdev);
8643 struct i40e_vsi *vsi = np->vsi;
8644 struct i40e_pf *pf = vsi->back;
8645 bool need_reset;
8646
8647 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8648 i40e_vlan_stripping_enable(vsi);
8649 else
8650 i40e_vlan_stripping_disable(vsi);
8651
8652 need_reset = i40e_set_ntuple(pf, features);
8653
8654 if (need_reset)
8655 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8656
8657 return 0;
8658 }
8659
8660 /**
8661 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8662 * @pf: board private structure
8663 * @port: The UDP port to look up
8664 *
8665 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8666 **/
8667 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8668 {
8669 u8 i;
8670
8671 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8672 if (pf->udp_ports[i].index == port)
8673 return i;
8674 }
8675
8676 return i;
8677 }
8678
8679 /**
8680 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8681 * @netdev: This physical port's netdev
8682 * @ti: Tunnel endpoint information
8683 **/
8684 static void i40e_udp_tunnel_add(struct net_device *netdev,
8685 struct udp_tunnel_info *ti)
8686 {
8687 struct i40e_netdev_priv *np = netdev_priv(netdev);
8688 struct i40e_vsi *vsi = np->vsi;
8689 struct i40e_pf *pf = vsi->back;
8690 __be16 port = ti->port;
8691 u8 next_idx;
8692 u8 idx;
8693
8694 idx = i40e_get_udp_port_idx(pf, port);
8695
8696 /* Check if port already exists */
8697 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8698 netdev_info(netdev, "port %d already offloaded\n",
8699 ntohs(port));
8700 return;
8701 }
8702
8703 /* Now check if there is space to add the new port */
8704 next_idx = i40e_get_udp_port_idx(pf, 0);
8705
8706 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8707 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8708 ntohs(port));
8709 return;
8710 }
8711
8712 switch (ti->type) {
8713 case UDP_TUNNEL_TYPE_VXLAN:
8714 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8715 break;
8716 case UDP_TUNNEL_TYPE_GENEVE:
8717 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8718 return;
8719 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8720 break;
8721 default:
8722 return;
8723 }
8724
8725 /* New port: add it and mark its index in the bitmap */
8726 pf->udp_ports[next_idx].index = port;
8727 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8728 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8729 }
8730
8731 /**
8732 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
8733 * @netdev: This physical port's netdev
8734 * @ti: Tunnel endpoint information
8735 **/
8736 static void i40e_udp_tunnel_del(struct net_device *netdev,
8737 struct udp_tunnel_info *ti)
8738 {
8739 struct i40e_netdev_priv *np = netdev_priv(netdev);
8740 struct i40e_vsi *vsi = np->vsi;
8741 struct i40e_pf *pf = vsi->back;
8742 __be16 port = ti->port;
8743 u8 idx;
8744
8745 idx = i40e_get_udp_port_idx(pf, port);
8746
8747 /* Check if port already exists */
8748 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
8749 goto not_found;
8750
8751 switch (ti->type) {
8752 case UDP_TUNNEL_TYPE_VXLAN:
8753 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
8754 goto not_found;
8755 break;
8756 case UDP_TUNNEL_TYPE_GENEVE:
8757 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
8758 goto not_found;
8759 break;
8760 default:
8761 goto not_found;
8762 }
8763
8764 /* if port exists, set it to 0 (mark for deletion)
8765 * and make it pending
8766 */
8767 pf->udp_ports[idx].index = 0;
8768 pf->pending_udp_bitmap |= BIT_ULL(idx);
8769 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8770
8771 return;
8772 not_found:
8773 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
8774 ntohs(port));
8775 }
8776
8777 static int i40e_get_phys_port_id(struct net_device *netdev,
8778 struct netdev_phys_item_id *ppid)
8779 {
8780 struct i40e_netdev_priv *np = netdev_priv(netdev);
8781 struct i40e_pf *pf = np->vsi->back;
8782 struct i40e_hw *hw = &pf->hw;
8783
8784 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8785 return -EOPNOTSUPP;
8786
8787 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8788 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8789
8790 return 0;
8791 }
8792
8793 /**
8794 * i40e_ndo_fdb_add - add an entry to the hardware database
8795 * @ndm: the input from the stack
8796 * @tb: pointer to array of nladdr (unused)
8797 * @dev: the net device pointer
8798 * @addr: the MAC address entry being added
8799 * @flags: instructions from stack about fdb operation
8800 */
8801 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8802 struct net_device *dev,
8803 const unsigned char *addr, u16 vid,
8804 u16 flags)
8805 {
8806 struct i40e_netdev_priv *np = netdev_priv(dev);
8807 struct i40e_pf *pf = np->vsi->back;
8808 int err = 0;
8809
8810 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8811 return -EOPNOTSUPP;
8812
8813 if (vid) {
8814 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8815 return -EINVAL;
8816 }
8817
8818 /* Hardware does not support aging addresses so if a
8819 * ndm_state is given only allow permanent addresses
8820 */
8821 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8822 netdev_info(dev, "FDB only supports static addresses\n");
8823 return -EINVAL;
8824 }
8825
8826 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8827 err = dev_uc_add_excl(dev, addr);
8828 else if (is_multicast_ether_addr(addr))
8829 err = dev_mc_add_excl(dev, addr);
8830 else
8831 err = -EINVAL;
8832
8833 /* Only return duplicate errors if NLM_F_EXCL is set */
8834 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8835 err = 0;
8836
8837 return err;
8838 }
8839
8840 /**
8841 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8842 * @dev: the netdev being configured
8843 * @nlh: RTNL message
8844 *
8845 * Inserts a new hardware bridge if not already created and
8846 * enables the bridging mode requested (VEB or VEPA). If the
8847 * hardware bridge has already been inserted and the request
8848 * is to change the mode then that requires a PF reset to
8849 * allow rebuild of the components with required hardware
8850 * bridge mode enabled.
8851 **/
8852 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8853 struct nlmsghdr *nlh,
8854 u16 flags)
8855 {
8856 struct i40e_netdev_priv *np = netdev_priv(dev);
8857 struct i40e_vsi *vsi = np->vsi;
8858 struct i40e_pf *pf = vsi->back;
8859 struct i40e_veb *veb = NULL;
8860 struct nlattr *attr, *br_spec;
8861 int i, rem;
8862
8863 /* Only for PF VSI for now */
8864 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8865 return -EOPNOTSUPP;
8866
8867 /* Find the HW bridge for PF VSI */
8868 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8869 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8870 veb = pf->veb[i];
8871 }
8872
8873 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8874
8875 nla_for_each_nested(attr, br_spec, rem) {
8876 __u16 mode;
8877
8878 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8879 continue;
8880
8881 mode = nla_get_u16(attr);
8882 if ((mode != BRIDGE_MODE_VEPA) &&
8883 (mode != BRIDGE_MODE_VEB))
8884 return -EINVAL;
8885
8886 /* Insert a new HW bridge */
8887 if (!veb) {
8888 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8889 vsi->tc_config.enabled_tc);
8890 if (veb) {
8891 veb->bridge_mode = mode;
8892 i40e_config_bridge_mode(veb);
8893 } else {
8894 /* No Bridge HW offload available */
8895 return -ENOENT;
8896 }
8897 break;
8898 } else if (mode != veb->bridge_mode) {
8899 /* Existing HW bridge but different mode needs reset */
8900 veb->bridge_mode = mode;
8901 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8902 if (mode == BRIDGE_MODE_VEB)
8903 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8904 else
8905 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8906 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8907 break;
8908 }
8909 }
8910
8911 return 0;
8912 }
8913
8914 /**
8915 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8916 * @skb: skb buff
8917 * @pid: process id
8918 * @seq: RTNL message seq #
8919 * @dev: the netdev being configured
8920 * @filter_mask: unused
8921 * @nlflags: netlink flags passed in
8922 *
8923 * Return the mode in which the hardware bridge is operating in
8924 * i.e VEB or VEPA.
8925 **/
8926 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8927 struct net_device *dev,
8928 u32 __always_unused filter_mask,
8929 int nlflags)
8930 {
8931 struct i40e_netdev_priv *np = netdev_priv(dev);
8932 struct i40e_vsi *vsi = np->vsi;
8933 struct i40e_pf *pf = vsi->back;
8934 struct i40e_veb *veb = NULL;
8935 int i;
8936
8937 /* Only for PF VSI for now */
8938 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8939 return -EOPNOTSUPP;
8940
8941 /* Find the HW bridge for the PF VSI */
8942 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8943 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8944 veb = pf->veb[i];
8945 }
8946
8947 if (!veb)
8948 return 0;
8949
8950 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8951 nlflags, 0, 0, filter_mask, NULL);
8952 }
8953
8954 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
8955 * inner mac plus all inner ethertypes.
8956 */
8957 #define I40E_MAX_TUNNEL_HDR_LEN 128
8958 /**
8959 * i40e_features_check - Validate encapsulated packet conforms to limits
8960 * @skb: skb buff
8961 * @dev: This physical port's netdev
8962 * @features: Offload features that the stack believes apply
8963 **/
8964 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8965 struct net_device *dev,
8966 netdev_features_t features)
8967 {
8968 if (skb->encapsulation &&
8969 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
8970 I40E_MAX_TUNNEL_HDR_LEN))
8971 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8972
8973 return features;
8974 }
8975
8976 static const struct net_device_ops i40e_netdev_ops = {
8977 .ndo_open = i40e_open,
8978 .ndo_stop = i40e_close,
8979 .ndo_start_xmit = i40e_lan_xmit_frame,
8980 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8981 .ndo_set_rx_mode = i40e_set_rx_mode,
8982 .ndo_validate_addr = eth_validate_addr,
8983 .ndo_set_mac_address = i40e_set_mac,
8984 .ndo_change_mtu = i40e_change_mtu,
8985 .ndo_do_ioctl = i40e_ioctl,
8986 .ndo_tx_timeout = i40e_tx_timeout,
8987 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8988 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8989 #ifdef CONFIG_NET_POLL_CONTROLLER
8990 .ndo_poll_controller = i40e_netpoll,
8991 #endif
8992 .ndo_setup_tc = __i40e_setup_tc,
8993 #ifdef I40E_FCOE
8994 .ndo_fcoe_enable = i40e_fcoe_enable,
8995 .ndo_fcoe_disable = i40e_fcoe_disable,
8996 #endif
8997 .ndo_set_features = i40e_set_features,
8998 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8999 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9000 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9001 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9002 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9003 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9004 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9005 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9006 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9007 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9008 .ndo_fdb_add = i40e_ndo_fdb_add,
9009 .ndo_features_check = i40e_features_check,
9010 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9011 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9012 };
9013
9014 /**
9015 * i40e_config_netdev - Setup the netdev flags
9016 * @vsi: the VSI being configured
9017 *
9018 * Returns 0 on success, negative value on failure
9019 **/
9020 static int i40e_config_netdev(struct i40e_vsi *vsi)
9021 {
9022 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
9023 struct i40e_pf *pf = vsi->back;
9024 struct i40e_hw *hw = &pf->hw;
9025 struct i40e_netdev_priv *np;
9026 struct net_device *netdev;
9027 u8 mac_addr[ETH_ALEN];
9028 int etherdev_size;
9029
9030 etherdev_size = sizeof(struct i40e_netdev_priv);
9031 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9032 if (!netdev)
9033 return -ENOMEM;
9034
9035 vsi->netdev = netdev;
9036 np = netdev_priv(netdev);
9037 np->vsi = vsi;
9038
9039 netdev->hw_enc_features |= NETIF_F_SG |
9040 NETIF_F_IP_CSUM |
9041 NETIF_F_IPV6_CSUM |
9042 NETIF_F_HIGHDMA |
9043 NETIF_F_SOFT_FEATURES |
9044 NETIF_F_TSO |
9045 NETIF_F_TSO_ECN |
9046 NETIF_F_TSO6 |
9047 NETIF_F_GSO_GRE |
9048 NETIF_F_GSO_GRE_CSUM |
9049 NETIF_F_GSO_IPXIP4 |
9050 NETIF_F_GSO_IPXIP6 |
9051 NETIF_F_GSO_UDP_TUNNEL |
9052 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9053 NETIF_F_GSO_PARTIAL |
9054 NETIF_F_SCTP_CRC |
9055 NETIF_F_RXHASH |
9056 NETIF_F_RXCSUM |
9057 0;
9058
9059 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9060 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9061
9062 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9063
9064 /* record features VLANs can make use of */
9065 netdev->vlan_features |= netdev->hw_enc_features |
9066 NETIF_F_TSO_MANGLEID;
9067
9068 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9069 netdev->hw_features |= NETIF_F_NTUPLE;
9070
9071 netdev->hw_features |= netdev->hw_enc_features |
9072 NETIF_F_HW_VLAN_CTAG_TX |
9073 NETIF_F_HW_VLAN_CTAG_RX;
9074
9075 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9076 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9077
9078 if (vsi->type == I40E_VSI_MAIN) {
9079 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9080 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9081 /* The following steps are necessary to prevent reception
9082 * of tagged packets - some older NVM configurations load a
9083 * default a MAC-VLAN filter that accepts any tagged packet
9084 * which must be replaced by a normal filter.
9085 */
9086 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
9087 spin_lock_bh(&vsi->mac_filter_list_lock);
9088 i40e_add_filter(vsi, mac_addr,
9089 I40E_VLAN_ANY, false, true);
9090 spin_unlock_bh(&vsi->mac_filter_list_lock);
9091 }
9092 } else if ((pf->hw.aq.api_maj_ver > 1) ||
9093 ((pf->hw.aq.api_maj_ver == 1) &&
9094 (pf->hw.aq.api_min_ver > 4))) {
9095 /* Supported in FW API version higher than 1.4 */
9096 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
9097 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
9098 } else {
9099 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9100 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9101 pf->vsi[pf->lan_vsi]->netdev->name);
9102 random_ether_addr(mac_addr);
9103
9104 spin_lock_bh(&vsi->mac_filter_list_lock);
9105 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9106 spin_unlock_bh(&vsi->mac_filter_list_lock);
9107 }
9108
9109 spin_lock_bh(&vsi->mac_filter_list_lock);
9110 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
9111 spin_unlock_bh(&vsi->mac_filter_list_lock);
9112
9113 ether_addr_copy(netdev->dev_addr, mac_addr);
9114 ether_addr_copy(netdev->perm_addr, mac_addr);
9115
9116 netdev->priv_flags |= IFF_UNICAST_FLT;
9117 netdev->priv_flags |= IFF_SUPP_NOFCS;
9118 /* Setup netdev TC information */
9119 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9120
9121 netdev->netdev_ops = &i40e_netdev_ops;
9122 netdev->watchdog_timeo = 5 * HZ;
9123 i40e_set_ethtool_ops(netdev);
9124 #ifdef I40E_FCOE
9125 i40e_fcoe_config_netdev(netdev, vsi);
9126 #endif
9127
9128 return 0;
9129 }
9130
9131 /**
9132 * i40e_vsi_delete - Delete a VSI from the switch
9133 * @vsi: the VSI being removed
9134 *
9135 * Returns 0 on success, negative value on failure
9136 **/
9137 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9138 {
9139 /* remove default VSI is not allowed */
9140 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9141 return;
9142
9143 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9144 }
9145
9146 /**
9147 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9148 * @vsi: the VSI being queried
9149 *
9150 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9151 **/
9152 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9153 {
9154 struct i40e_veb *veb;
9155 struct i40e_pf *pf = vsi->back;
9156
9157 /* Uplink is not a bridge so default to VEB */
9158 if (vsi->veb_idx == I40E_NO_VEB)
9159 return 1;
9160
9161 veb = pf->veb[vsi->veb_idx];
9162 if (!veb) {
9163 dev_info(&pf->pdev->dev,
9164 "There is no veb associated with the bridge\n");
9165 return -ENOENT;
9166 }
9167
9168 /* Uplink is a bridge in VEPA mode */
9169 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9170 return 0;
9171 } else {
9172 /* Uplink is a bridge in VEB mode */
9173 return 1;
9174 }
9175
9176 /* VEPA is now default bridge, so return 0 */
9177 return 0;
9178 }
9179
9180 /**
9181 * i40e_add_vsi - Add a VSI to the switch
9182 * @vsi: the VSI being configured
9183 *
9184 * This initializes a VSI context depending on the VSI type to be added and
9185 * passes it down to the add_vsi aq command.
9186 **/
9187 static int i40e_add_vsi(struct i40e_vsi *vsi)
9188 {
9189 int ret = -ENODEV;
9190 i40e_status aq_ret = 0;
9191 u8 laa_macaddr[ETH_ALEN];
9192 bool found_laa_mac_filter = false;
9193 struct i40e_pf *pf = vsi->back;
9194 struct i40e_hw *hw = &pf->hw;
9195 struct i40e_vsi_context ctxt;
9196 struct i40e_mac_filter *f, *ftmp;
9197
9198 u8 enabled_tc = 0x1; /* TC0 enabled */
9199 int f_count = 0;
9200
9201 memset(&ctxt, 0, sizeof(ctxt));
9202 switch (vsi->type) {
9203 case I40E_VSI_MAIN:
9204 /* The PF's main VSI is already setup as part of the
9205 * device initialization, so we'll not bother with
9206 * the add_vsi call, but we will retrieve the current
9207 * VSI context.
9208 */
9209 ctxt.seid = pf->main_vsi_seid;
9210 ctxt.pf_num = pf->hw.pf_id;
9211 ctxt.vf_num = 0;
9212 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9213 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9214 if (ret) {
9215 dev_info(&pf->pdev->dev,
9216 "couldn't get PF vsi config, err %s aq_err %s\n",
9217 i40e_stat_str(&pf->hw, ret),
9218 i40e_aq_str(&pf->hw,
9219 pf->hw.aq.asq_last_status));
9220 return -ENOENT;
9221 }
9222 vsi->info = ctxt.info;
9223 vsi->info.valid_sections = 0;
9224
9225 vsi->seid = ctxt.seid;
9226 vsi->id = ctxt.vsi_number;
9227
9228 enabled_tc = i40e_pf_get_tc_map(pf);
9229
9230 /* MFP mode setup queue map and update VSI */
9231 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9232 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9233 memset(&ctxt, 0, sizeof(ctxt));
9234 ctxt.seid = pf->main_vsi_seid;
9235 ctxt.pf_num = pf->hw.pf_id;
9236 ctxt.vf_num = 0;
9237 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9238 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9239 if (ret) {
9240 dev_info(&pf->pdev->dev,
9241 "update vsi failed, err %s aq_err %s\n",
9242 i40e_stat_str(&pf->hw, ret),
9243 i40e_aq_str(&pf->hw,
9244 pf->hw.aq.asq_last_status));
9245 ret = -ENOENT;
9246 goto err;
9247 }
9248 /* update the local VSI info queue map */
9249 i40e_vsi_update_queue_map(vsi, &ctxt);
9250 vsi->info.valid_sections = 0;
9251 } else {
9252 /* Default/Main VSI is only enabled for TC0
9253 * reconfigure it to enable all TCs that are
9254 * available on the port in SFP mode.
9255 * For MFP case the iSCSI PF would use this
9256 * flow to enable LAN+iSCSI TC.
9257 */
9258 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9259 if (ret) {
9260 dev_info(&pf->pdev->dev,
9261 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9262 enabled_tc,
9263 i40e_stat_str(&pf->hw, ret),
9264 i40e_aq_str(&pf->hw,
9265 pf->hw.aq.asq_last_status));
9266 ret = -ENOENT;
9267 }
9268 }
9269 break;
9270
9271 case I40E_VSI_FDIR:
9272 ctxt.pf_num = hw->pf_id;
9273 ctxt.vf_num = 0;
9274 ctxt.uplink_seid = vsi->uplink_seid;
9275 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9276 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9277 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9278 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9279 ctxt.info.valid_sections |=
9280 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9281 ctxt.info.switch_id =
9282 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9283 }
9284 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9285 break;
9286
9287 case I40E_VSI_VMDQ2:
9288 ctxt.pf_num = hw->pf_id;
9289 ctxt.vf_num = 0;
9290 ctxt.uplink_seid = vsi->uplink_seid;
9291 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9292 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9293
9294 /* This VSI is connected to VEB so the switch_id
9295 * should be set to zero by default.
9296 */
9297 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9298 ctxt.info.valid_sections |=
9299 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9300 ctxt.info.switch_id =
9301 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9302 }
9303
9304 /* Setup the VSI tx/rx queue map for TC0 only for now */
9305 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9306 break;
9307
9308 case I40E_VSI_SRIOV:
9309 ctxt.pf_num = hw->pf_id;
9310 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9311 ctxt.uplink_seid = vsi->uplink_seid;
9312 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9313 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9314
9315 /* This VSI is connected to VEB so the switch_id
9316 * should be set to zero by default.
9317 */
9318 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9319 ctxt.info.valid_sections |=
9320 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9321 ctxt.info.switch_id =
9322 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9323 }
9324
9325 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9326 ctxt.info.valid_sections |=
9327 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9328 ctxt.info.queueing_opt_flags |=
9329 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9330 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9331 }
9332
9333 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9334 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9335 if (pf->vf[vsi->vf_id].spoofchk) {
9336 ctxt.info.valid_sections |=
9337 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9338 ctxt.info.sec_flags |=
9339 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9340 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9341 }
9342 /* Setup the VSI tx/rx queue map for TC0 only for now */
9343 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9344 break;
9345
9346 #ifdef I40E_FCOE
9347 case I40E_VSI_FCOE:
9348 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9349 if (ret) {
9350 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9351 return ret;
9352 }
9353 break;
9354
9355 #endif /* I40E_FCOE */
9356 case I40E_VSI_IWARP:
9357 /* send down message to iWARP */
9358 break;
9359
9360 default:
9361 return -ENODEV;
9362 }
9363
9364 if (vsi->type != I40E_VSI_MAIN) {
9365 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9366 if (ret) {
9367 dev_info(&vsi->back->pdev->dev,
9368 "add vsi failed, err %s aq_err %s\n",
9369 i40e_stat_str(&pf->hw, ret),
9370 i40e_aq_str(&pf->hw,
9371 pf->hw.aq.asq_last_status));
9372 ret = -ENOENT;
9373 goto err;
9374 }
9375 vsi->info = ctxt.info;
9376 vsi->info.valid_sections = 0;
9377 vsi->seid = ctxt.seid;
9378 vsi->id = ctxt.vsi_number;
9379 }
9380 /* Except FDIR VSI, for all othet VSI set the broadcast filter */
9381 if (vsi->type != I40E_VSI_FDIR) {
9382 aq_ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL);
9383 if (aq_ret) {
9384 ret = i40e_aq_rc_to_posix(aq_ret,
9385 hw->aq.asq_last_status);
9386 dev_info(&pf->pdev->dev,
9387 "set brdcast promisc failed, err %s, aq_err %s\n",
9388 i40e_stat_str(hw, aq_ret),
9389 i40e_aq_str(hw, hw->aq.asq_last_status));
9390 }
9391 }
9392
9393 spin_lock_bh(&vsi->mac_filter_list_lock);
9394 /* If macvlan filters already exist, force them to get loaded */
9395 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9396 f->changed = true;
9397 f_count++;
9398
9399 /* Expected to have only one MAC filter entry for LAA in list */
9400 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9401 ether_addr_copy(laa_macaddr, f->macaddr);
9402 found_laa_mac_filter = true;
9403 }
9404 }
9405 spin_unlock_bh(&vsi->mac_filter_list_lock);
9406
9407 if (found_laa_mac_filter) {
9408 struct i40e_aqc_remove_macvlan_element_data element;
9409
9410 memset(&element, 0, sizeof(element));
9411 ether_addr_copy(element.mac_addr, laa_macaddr);
9412 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9413 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9414 &element, 1, NULL);
9415 if (ret) {
9416 /* some older FW has a different default */
9417 element.flags |=
9418 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9419 i40e_aq_remove_macvlan(hw, vsi->seid,
9420 &element, 1, NULL);
9421 }
9422
9423 i40e_aq_mac_address_write(hw,
9424 I40E_AQC_WRITE_TYPE_LAA_WOL,
9425 laa_macaddr, NULL);
9426 }
9427
9428 if (f_count) {
9429 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9430 pf->flags |= I40E_FLAG_FILTER_SYNC;
9431 }
9432
9433 /* Update VSI BW information */
9434 ret = i40e_vsi_get_bw_info(vsi);
9435 if (ret) {
9436 dev_info(&pf->pdev->dev,
9437 "couldn't get vsi bw info, err %s aq_err %s\n",
9438 i40e_stat_str(&pf->hw, ret),
9439 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9440 /* VSI is already added so not tearing that up */
9441 ret = 0;
9442 }
9443
9444 err:
9445 return ret;
9446 }
9447
9448 /**
9449 * i40e_vsi_release - Delete a VSI and free its resources
9450 * @vsi: the VSI being removed
9451 *
9452 * Returns 0 on success or < 0 on error
9453 **/
9454 int i40e_vsi_release(struct i40e_vsi *vsi)
9455 {
9456 struct i40e_mac_filter *f, *ftmp;
9457 struct i40e_veb *veb = NULL;
9458 struct i40e_pf *pf;
9459 u16 uplink_seid;
9460 int i, n;
9461
9462 pf = vsi->back;
9463
9464 /* release of a VEB-owner or last VSI is not allowed */
9465 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9466 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9467 vsi->seid, vsi->uplink_seid);
9468 return -ENODEV;
9469 }
9470 if (vsi == pf->vsi[pf->lan_vsi] &&
9471 !test_bit(__I40E_DOWN, &pf->state)) {
9472 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9473 return -ENODEV;
9474 }
9475
9476 uplink_seid = vsi->uplink_seid;
9477 if (vsi->type != I40E_VSI_SRIOV) {
9478 if (vsi->netdev_registered) {
9479 vsi->netdev_registered = false;
9480 if (vsi->netdev) {
9481 /* results in a call to i40e_close() */
9482 unregister_netdev(vsi->netdev);
9483 }
9484 } else {
9485 i40e_vsi_close(vsi);
9486 }
9487 i40e_vsi_disable_irq(vsi);
9488 }
9489
9490 spin_lock_bh(&vsi->mac_filter_list_lock);
9491 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9492 i40e_del_filter(vsi, f->macaddr, f->vlan,
9493 f->is_vf, f->is_netdev);
9494 spin_unlock_bh(&vsi->mac_filter_list_lock);
9495
9496 i40e_sync_vsi_filters(vsi);
9497
9498 i40e_vsi_delete(vsi);
9499 i40e_vsi_free_q_vectors(vsi);
9500 if (vsi->netdev) {
9501 free_netdev(vsi->netdev);
9502 vsi->netdev = NULL;
9503 }
9504 i40e_vsi_clear_rings(vsi);
9505 i40e_vsi_clear(vsi);
9506
9507 /* If this was the last thing on the VEB, except for the
9508 * controlling VSI, remove the VEB, which puts the controlling
9509 * VSI onto the next level down in the switch.
9510 *
9511 * Well, okay, there's one more exception here: don't remove
9512 * the orphan VEBs yet. We'll wait for an explicit remove request
9513 * from up the network stack.
9514 */
9515 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9516 if (pf->vsi[i] &&
9517 pf->vsi[i]->uplink_seid == uplink_seid &&
9518 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9519 n++; /* count the VSIs */
9520 }
9521 }
9522 for (i = 0; i < I40E_MAX_VEB; i++) {
9523 if (!pf->veb[i])
9524 continue;
9525 if (pf->veb[i]->uplink_seid == uplink_seid)
9526 n++; /* count the VEBs */
9527 if (pf->veb[i]->seid == uplink_seid)
9528 veb = pf->veb[i];
9529 }
9530 if (n == 0 && veb && veb->uplink_seid != 0)
9531 i40e_veb_release(veb);
9532
9533 return 0;
9534 }
9535
9536 /**
9537 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9538 * @vsi: ptr to the VSI
9539 *
9540 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9541 * corresponding SW VSI structure and initializes num_queue_pairs for the
9542 * newly allocated VSI.
9543 *
9544 * Returns 0 on success or negative on failure
9545 **/
9546 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9547 {
9548 int ret = -ENOENT;
9549 struct i40e_pf *pf = vsi->back;
9550
9551 if (vsi->q_vectors[0]) {
9552 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9553 vsi->seid);
9554 return -EEXIST;
9555 }
9556
9557 if (vsi->base_vector) {
9558 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9559 vsi->seid, vsi->base_vector);
9560 return -EEXIST;
9561 }
9562
9563 ret = i40e_vsi_alloc_q_vectors(vsi);
9564 if (ret) {
9565 dev_info(&pf->pdev->dev,
9566 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9567 vsi->num_q_vectors, vsi->seid, ret);
9568 vsi->num_q_vectors = 0;
9569 goto vector_setup_out;
9570 }
9571
9572 /* In Legacy mode, we do not have to get any other vector since we
9573 * piggyback on the misc/ICR0 for queue interrupts.
9574 */
9575 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9576 return ret;
9577 if (vsi->num_q_vectors)
9578 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9579 vsi->num_q_vectors, vsi->idx);
9580 if (vsi->base_vector < 0) {
9581 dev_info(&pf->pdev->dev,
9582 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9583 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9584 i40e_vsi_free_q_vectors(vsi);
9585 ret = -ENOENT;
9586 goto vector_setup_out;
9587 }
9588
9589 vector_setup_out:
9590 return ret;
9591 }
9592
9593 /**
9594 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9595 * @vsi: pointer to the vsi.
9596 *
9597 * This re-allocates a vsi's queue resources.
9598 *
9599 * Returns pointer to the successfully allocated and configured VSI sw struct
9600 * on success, otherwise returns NULL on failure.
9601 **/
9602 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9603 {
9604 struct i40e_pf *pf;
9605 u8 enabled_tc;
9606 int ret;
9607
9608 if (!vsi)
9609 return NULL;
9610
9611 pf = vsi->back;
9612
9613 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9614 i40e_vsi_clear_rings(vsi);
9615
9616 i40e_vsi_free_arrays(vsi, false);
9617 i40e_set_num_rings_in_vsi(vsi);
9618 ret = i40e_vsi_alloc_arrays(vsi, false);
9619 if (ret)
9620 goto err_vsi;
9621
9622 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9623 if (ret < 0) {
9624 dev_info(&pf->pdev->dev,
9625 "failed to get tracking for %d queues for VSI %d err %d\n",
9626 vsi->alloc_queue_pairs, vsi->seid, ret);
9627 goto err_vsi;
9628 }
9629 vsi->base_queue = ret;
9630
9631 /* Update the FW view of the VSI. Force a reset of TC and queue
9632 * layout configurations.
9633 */
9634 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9635 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9636 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9637 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9638
9639 /* assign it some queues */
9640 ret = i40e_alloc_rings(vsi);
9641 if (ret)
9642 goto err_rings;
9643
9644 /* map all of the rings to the q_vectors */
9645 i40e_vsi_map_rings_to_vectors(vsi);
9646 return vsi;
9647
9648 err_rings:
9649 i40e_vsi_free_q_vectors(vsi);
9650 if (vsi->netdev_registered) {
9651 vsi->netdev_registered = false;
9652 unregister_netdev(vsi->netdev);
9653 free_netdev(vsi->netdev);
9654 vsi->netdev = NULL;
9655 }
9656 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9657 err_vsi:
9658 i40e_vsi_clear(vsi);
9659 return NULL;
9660 }
9661
9662 /**
9663 * i40e_macaddr_init - explicitly write the mac address filters.
9664 *
9665 * @vsi: pointer to the vsi.
9666 * @macaddr: the MAC address
9667 *
9668 * This is needed when the macaddr has been obtained by other
9669 * means than the default, e.g., from Open Firmware or IDPROM.
9670 * Returns 0 on success, negative on failure
9671 **/
9672 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
9673 {
9674 int ret;
9675 struct i40e_aqc_add_macvlan_element_data element;
9676
9677 ret = i40e_aq_mac_address_write(&vsi->back->hw,
9678 I40E_AQC_WRITE_TYPE_LAA_WOL,
9679 macaddr, NULL);
9680 if (ret) {
9681 dev_info(&vsi->back->pdev->dev,
9682 "Addr change for VSI failed: %d\n", ret);
9683 return -EADDRNOTAVAIL;
9684 }
9685
9686 memset(&element, 0, sizeof(element));
9687 ether_addr_copy(element.mac_addr, macaddr);
9688 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
9689 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
9690 if (ret) {
9691 dev_info(&vsi->back->pdev->dev,
9692 "add filter failed err %s aq_err %s\n",
9693 i40e_stat_str(&vsi->back->hw, ret),
9694 i40e_aq_str(&vsi->back->hw,
9695 vsi->back->hw.aq.asq_last_status));
9696 }
9697 return ret;
9698 }
9699
9700 /**
9701 * i40e_vsi_setup - Set up a VSI by a given type
9702 * @pf: board private structure
9703 * @type: VSI type
9704 * @uplink_seid: the switch element to link to
9705 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9706 *
9707 * This allocates the sw VSI structure and its queue resources, then add a VSI
9708 * to the identified VEB.
9709 *
9710 * Returns pointer to the successfully allocated and configure VSI sw struct on
9711 * success, otherwise returns NULL on failure.
9712 **/
9713 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9714 u16 uplink_seid, u32 param1)
9715 {
9716 struct i40e_vsi *vsi = NULL;
9717 struct i40e_veb *veb = NULL;
9718 int ret, i;
9719 int v_idx;
9720
9721 /* The requested uplink_seid must be either
9722 * - the PF's port seid
9723 * no VEB is needed because this is the PF
9724 * or this is a Flow Director special case VSI
9725 * - seid of an existing VEB
9726 * - seid of a VSI that owns an existing VEB
9727 * - seid of a VSI that doesn't own a VEB
9728 * a new VEB is created and the VSI becomes the owner
9729 * - seid of the PF VSI, which is what creates the first VEB
9730 * this is a special case of the previous
9731 *
9732 * Find which uplink_seid we were given and create a new VEB if needed
9733 */
9734 for (i = 0; i < I40E_MAX_VEB; i++) {
9735 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9736 veb = pf->veb[i];
9737 break;
9738 }
9739 }
9740
9741 if (!veb && uplink_seid != pf->mac_seid) {
9742
9743 for (i = 0; i < pf->num_alloc_vsi; i++) {
9744 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9745 vsi = pf->vsi[i];
9746 break;
9747 }
9748 }
9749 if (!vsi) {
9750 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9751 uplink_seid);
9752 return NULL;
9753 }
9754
9755 if (vsi->uplink_seid == pf->mac_seid)
9756 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9757 vsi->tc_config.enabled_tc);
9758 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9759 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9760 vsi->tc_config.enabled_tc);
9761 if (veb) {
9762 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9763 dev_info(&vsi->back->pdev->dev,
9764 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9765 return NULL;
9766 }
9767 /* We come up by default in VEPA mode if SRIOV is not
9768 * already enabled, in which case we can't force VEPA
9769 * mode.
9770 */
9771 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9772 veb->bridge_mode = BRIDGE_MODE_VEPA;
9773 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9774 }
9775 i40e_config_bridge_mode(veb);
9776 }
9777 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9778 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9779 veb = pf->veb[i];
9780 }
9781 if (!veb) {
9782 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9783 return NULL;
9784 }
9785
9786 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9787 uplink_seid = veb->seid;
9788 }
9789
9790 /* get vsi sw struct */
9791 v_idx = i40e_vsi_mem_alloc(pf, type);
9792 if (v_idx < 0)
9793 goto err_alloc;
9794 vsi = pf->vsi[v_idx];
9795 if (!vsi)
9796 goto err_alloc;
9797 vsi->type = type;
9798 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9799
9800 if (type == I40E_VSI_MAIN)
9801 pf->lan_vsi = v_idx;
9802 else if (type == I40E_VSI_SRIOV)
9803 vsi->vf_id = param1;
9804 /* assign it some queues */
9805 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9806 vsi->idx);
9807 if (ret < 0) {
9808 dev_info(&pf->pdev->dev,
9809 "failed to get tracking for %d queues for VSI %d err=%d\n",
9810 vsi->alloc_queue_pairs, vsi->seid, ret);
9811 goto err_vsi;
9812 }
9813 vsi->base_queue = ret;
9814
9815 /* get a VSI from the hardware */
9816 vsi->uplink_seid = uplink_seid;
9817 ret = i40e_add_vsi(vsi);
9818 if (ret)
9819 goto err_vsi;
9820
9821 switch (vsi->type) {
9822 /* setup the netdev if needed */
9823 case I40E_VSI_MAIN:
9824 /* Apply relevant filters if a platform-specific mac
9825 * address was selected.
9826 */
9827 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9828 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9829 if (ret) {
9830 dev_warn(&pf->pdev->dev,
9831 "could not set up macaddr; err %d\n",
9832 ret);
9833 }
9834 }
9835 case I40E_VSI_VMDQ2:
9836 case I40E_VSI_FCOE:
9837 ret = i40e_config_netdev(vsi);
9838 if (ret)
9839 goto err_netdev;
9840 ret = register_netdev(vsi->netdev);
9841 if (ret)
9842 goto err_netdev;
9843 vsi->netdev_registered = true;
9844 netif_carrier_off(vsi->netdev);
9845 #ifdef CONFIG_I40E_DCB
9846 /* Setup DCB netlink interface */
9847 i40e_dcbnl_setup(vsi);
9848 #endif /* CONFIG_I40E_DCB */
9849 /* fall through */
9850
9851 case I40E_VSI_FDIR:
9852 /* set up vectors and rings if needed */
9853 ret = i40e_vsi_setup_vectors(vsi);
9854 if (ret)
9855 goto err_msix;
9856
9857 ret = i40e_alloc_rings(vsi);
9858 if (ret)
9859 goto err_rings;
9860
9861 /* map all of the rings to the q_vectors */
9862 i40e_vsi_map_rings_to_vectors(vsi);
9863
9864 i40e_vsi_reset_stats(vsi);
9865 break;
9866
9867 default:
9868 /* no netdev or rings for the other VSI types */
9869 break;
9870 }
9871
9872 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9873 (vsi->type == I40E_VSI_VMDQ2)) {
9874 ret = i40e_vsi_config_rss(vsi);
9875 }
9876 return vsi;
9877
9878 err_rings:
9879 i40e_vsi_free_q_vectors(vsi);
9880 err_msix:
9881 if (vsi->netdev_registered) {
9882 vsi->netdev_registered = false;
9883 unregister_netdev(vsi->netdev);
9884 free_netdev(vsi->netdev);
9885 vsi->netdev = NULL;
9886 }
9887 err_netdev:
9888 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9889 err_vsi:
9890 i40e_vsi_clear(vsi);
9891 err_alloc:
9892 return NULL;
9893 }
9894
9895 /**
9896 * i40e_veb_get_bw_info - Query VEB BW information
9897 * @veb: the veb to query
9898 *
9899 * Query the Tx scheduler BW configuration data for given VEB
9900 **/
9901 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9902 {
9903 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9904 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9905 struct i40e_pf *pf = veb->pf;
9906 struct i40e_hw *hw = &pf->hw;
9907 u32 tc_bw_max;
9908 int ret = 0;
9909 int i;
9910
9911 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9912 &bw_data, NULL);
9913 if (ret) {
9914 dev_info(&pf->pdev->dev,
9915 "query veb bw config failed, err %s aq_err %s\n",
9916 i40e_stat_str(&pf->hw, ret),
9917 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9918 goto out;
9919 }
9920
9921 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9922 &ets_data, NULL);
9923 if (ret) {
9924 dev_info(&pf->pdev->dev,
9925 "query veb bw ets config failed, err %s aq_err %s\n",
9926 i40e_stat_str(&pf->hw, ret),
9927 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9928 goto out;
9929 }
9930
9931 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9932 veb->bw_max_quanta = ets_data.tc_bw_max;
9933 veb->is_abs_credits = bw_data.absolute_credits_enable;
9934 veb->enabled_tc = ets_data.tc_valid_bits;
9935 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9936 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9937 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9938 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9939 veb->bw_tc_limit_credits[i] =
9940 le16_to_cpu(bw_data.tc_bw_limits[i]);
9941 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9942 }
9943
9944 out:
9945 return ret;
9946 }
9947
9948 /**
9949 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9950 * @pf: board private structure
9951 *
9952 * On error: returns error code (negative)
9953 * On success: returns vsi index in PF (positive)
9954 **/
9955 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9956 {
9957 int ret = -ENOENT;
9958 struct i40e_veb *veb;
9959 int i;
9960
9961 /* Need to protect the allocation of switch elements at the PF level */
9962 mutex_lock(&pf->switch_mutex);
9963
9964 /* VEB list may be fragmented if VEB creation/destruction has
9965 * been happening. We can afford to do a quick scan to look
9966 * for any free slots in the list.
9967 *
9968 * find next empty veb slot, looping back around if necessary
9969 */
9970 i = 0;
9971 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9972 i++;
9973 if (i >= I40E_MAX_VEB) {
9974 ret = -ENOMEM;
9975 goto err_alloc_veb; /* out of VEB slots! */
9976 }
9977
9978 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9979 if (!veb) {
9980 ret = -ENOMEM;
9981 goto err_alloc_veb;
9982 }
9983 veb->pf = pf;
9984 veb->idx = i;
9985 veb->enabled_tc = 1;
9986
9987 pf->veb[i] = veb;
9988 ret = i;
9989 err_alloc_veb:
9990 mutex_unlock(&pf->switch_mutex);
9991 return ret;
9992 }
9993
9994 /**
9995 * i40e_switch_branch_release - Delete a branch of the switch tree
9996 * @branch: where to start deleting
9997 *
9998 * This uses recursion to find the tips of the branch to be
9999 * removed, deleting until we get back to and can delete this VEB.
10000 **/
10001 static void i40e_switch_branch_release(struct i40e_veb *branch)
10002 {
10003 struct i40e_pf *pf = branch->pf;
10004 u16 branch_seid = branch->seid;
10005 u16 veb_idx = branch->idx;
10006 int i;
10007
10008 /* release any VEBs on this VEB - RECURSION */
10009 for (i = 0; i < I40E_MAX_VEB; i++) {
10010 if (!pf->veb[i])
10011 continue;
10012 if (pf->veb[i]->uplink_seid == branch->seid)
10013 i40e_switch_branch_release(pf->veb[i]);
10014 }
10015
10016 /* Release the VSIs on this VEB, but not the owner VSI.
10017 *
10018 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10019 * the VEB itself, so don't use (*branch) after this loop.
10020 */
10021 for (i = 0; i < pf->num_alloc_vsi; i++) {
10022 if (!pf->vsi[i])
10023 continue;
10024 if (pf->vsi[i]->uplink_seid == branch_seid &&
10025 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10026 i40e_vsi_release(pf->vsi[i]);
10027 }
10028 }
10029
10030 /* There's one corner case where the VEB might not have been
10031 * removed, so double check it here and remove it if needed.
10032 * This case happens if the veb was created from the debugfs
10033 * commands and no VSIs were added to it.
10034 */
10035 if (pf->veb[veb_idx])
10036 i40e_veb_release(pf->veb[veb_idx]);
10037 }
10038
10039 /**
10040 * i40e_veb_clear - remove veb struct
10041 * @veb: the veb to remove
10042 **/
10043 static void i40e_veb_clear(struct i40e_veb *veb)
10044 {
10045 if (!veb)
10046 return;
10047
10048 if (veb->pf) {
10049 struct i40e_pf *pf = veb->pf;
10050
10051 mutex_lock(&pf->switch_mutex);
10052 if (pf->veb[veb->idx] == veb)
10053 pf->veb[veb->idx] = NULL;
10054 mutex_unlock(&pf->switch_mutex);
10055 }
10056
10057 kfree(veb);
10058 }
10059
10060 /**
10061 * i40e_veb_release - Delete a VEB and free its resources
10062 * @veb: the VEB being removed
10063 **/
10064 void i40e_veb_release(struct i40e_veb *veb)
10065 {
10066 struct i40e_vsi *vsi = NULL;
10067 struct i40e_pf *pf;
10068 int i, n = 0;
10069
10070 pf = veb->pf;
10071
10072 /* find the remaining VSI and check for extras */
10073 for (i = 0; i < pf->num_alloc_vsi; i++) {
10074 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10075 n++;
10076 vsi = pf->vsi[i];
10077 }
10078 }
10079 if (n != 1) {
10080 dev_info(&pf->pdev->dev,
10081 "can't remove VEB %d with %d VSIs left\n",
10082 veb->seid, n);
10083 return;
10084 }
10085
10086 /* move the remaining VSI to uplink veb */
10087 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10088 if (veb->uplink_seid) {
10089 vsi->uplink_seid = veb->uplink_seid;
10090 if (veb->uplink_seid == pf->mac_seid)
10091 vsi->veb_idx = I40E_NO_VEB;
10092 else
10093 vsi->veb_idx = veb->veb_idx;
10094 } else {
10095 /* floating VEB */
10096 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10097 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10098 }
10099
10100 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10101 i40e_veb_clear(veb);
10102 }
10103
10104 /**
10105 * i40e_add_veb - create the VEB in the switch
10106 * @veb: the VEB to be instantiated
10107 * @vsi: the controlling VSI
10108 **/
10109 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10110 {
10111 struct i40e_pf *pf = veb->pf;
10112 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10113 int ret;
10114
10115 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10116 veb->enabled_tc, false,
10117 &veb->seid, enable_stats, NULL);
10118
10119 /* get a VEB from the hardware */
10120 if (ret) {
10121 dev_info(&pf->pdev->dev,
10122 "couldn't add VEB, err %s aq_err %s\n",
10123 i40e_stat_str(&pf->hw, ret),
10124 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10125 return -EPERM;
10126 }
10127
10128 /* get statistics counter */
10129 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10130 &veb->stats_idx, NULL, NULL, NULL);
10131 if (ret) {
10132 dev_info(&pf->pdev->dev,
10133 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10134 i40e_stat_str(&pf->hw, ret),
10135 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10136 return -EPERM;
10137 }
10138 ret = i40e_veb_get_bw_info(veb);
10139 if (ret) {
10140 dev_info(&pf->pdev->dev,
10141 "couldn't get VEB bw info, err %s aq_err %s\n",
10142 i40e_stat_str(&pf->hw, ret),
10143 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10144 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10145 return -ENOENT;
10146 }
10147
10148 vsi->uplink_seid = veb->seid;
10149 vsi->veb_idx = veb->idx;
10150 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10151
10152 return 0;
10153 }
10154
10155 /**
10156 * i40e_veb_setup - Set up a VEB
10157 * @pf: board private structure
10158 * @flags: VEB setup flags
10159 * @uplink_seid: the switch element to link to
10160 * @vsi_seid: the initial VSI seid
10161 * @enabled_tc: Enabled TC bit-map
10162 *
10163 * This allocates the sw VEB structure and links it into the switch
10164 * It is possible and legal for this to be a duplicate of an already
10165 * existing VEB. It is also possible for both uplink and vsi seids
10166 * to be zero, in order to create a floating VEB.
10167 *
10168 * Returns pointer to the successfully allocated VEB sw struct on
10169 * success, otherwise returns NULL on failure.
10170 **/
10171 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10172 u16 uplink_seid, u16 vsi_seid,
10173 u8 enabled_tc)
10174 {
10175 struct i40e_veb *veb, *uplink_veb = NULL;
10176 int vsi_idx, veb_idx;
10177 int ret;
10178
10179 /* if one seid is 0, the other must be 0 to create a floating relay */
10180 if ((uplink_seid == 0 || vsi_seid == 0) &&
10181 (uplink_seid + vsi_seid != 0)) {
10182 dev_info(&pf->pdev->dev,
10183 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10184 uplink_seid, vsi_seid);
10185 return NULL;
10186 }
10187
10188 /* make sure there is such a vsi and uplink */
10189 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10190 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10191 break;
10192 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10193 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10194 vsi_seid);
10195 return NULL;
10196 }
10197
10198 if (uplink_seid && uplink_seid != pf->mac_seid) {
10199 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10200 if (pf->veb[veb_idx] &&
10201 pf->veb[veb_idx]->seid == uplink_seid) {
10202 uplink_veb = pf->veb[veb_idx];
10203 break;
10204 }
10205 }
10206 if (!uplink_veb) {
10207 dev_info(&pf->pdev->dev,
10208 "uplink seid %d not found\n", uplink_seid);
10209 return NULL;
10210 }
10211 }
10212
10213 /* get veb sw struct */
10214 veb_idx = i40e_veb_mem_alloc(pf);
10215 if (veb_idx < 0)
10216 goto err_alloc;
10217 veb = pf->veb[veb_idx];
10218 veb->flags = flags;
10219 veb->uplink_seid = uplink_seid;
10220 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10221 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10222
10223 /* create the VEB in the switch */
10224 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10225 if (ret)
10226 goto err_veb;
10227 if (vsi_idx == pf->lan_vsi)
10228 pf->lan_veb = veb->idx;
10229
10230 return veb;
10231
10232 err_veb:
10233 i40e_veb_clear(veb);
10234 err_alloc:
10235 return NULL;
10236 }
10237
10238 /**
10239 * i40e_setup_pf_switch_element - set PF vars based on switch type
10240 * @pf: board private structure
10241 * @ele: element we are building info from
10242 * @num_reported: total number of elements
10243 * @printconfig: should we print the contents
10244 *
10245 * helper function to assist in extracting a few useful SEID values.
10246 **/
10247 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10248 struct i40e_aqc_switch_config_element_resp *ele,
10249 u16 num_reported, bool printconfig)
10250 {
10251 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10252 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10253 u8 element_type = ele->element_type;
10254 u16 seid = le16_to_cpu(ele->seid);
10255
10256 if (printconfig)
10257 dev_info(&pf->pdev->dev,
10258 "type=%d seid=%d uplink=%d downlink=%d\n",
10259 element_type, seid, uplink_seid, downlink_seid);
10260
10261 switch (element_type) {
10262 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10263 pf->mac_seid = seid;
10264 break;
10265 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10266 /* Main VEB? */
10267 if (uplink_seid != pf->mac_seid)
10268 break;
10269 if (pf->lan_veb == I40E_NO_VEB) {
10270 int v;
10271
10272 /* find existing or else empty VEB */
10273 for (v = 0; v < I40E_MAX_VEB; v++) {
10274 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10275 pf->lan_veb = v;
10276 break;
10277 }
10278 }
10279 if (pf->lan_veb == I40E_NO_VEB) {
10280 v = i40e_veb_mem_alloc(pf);
10281 if (v < 0)
10282 break;
10283 pf->lan_veb = v;
10284 }
10285 }
10286
10287 pf->veb[pf->lan_veb]->seid = seid;
10288 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10289 pf->veb[pf->lan_veb]->pf = pf;
10290 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10291 break;
10292 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10293 if (num_reported != 1)
10294 break;
10295 /* This is immediately after a reset so we can assume this is
10296 * the PF's VSI
10297 */
10298 pf->mac_seid = uplink_seid;
10299 pf->pf_seid = downlink_seid;
10300 pf->main_vsi_seid = seid;
10301 if (printconfig)
10302 dev_info(&pf->pdev->dev,
10303 "pf_seid=%d main_vsi_seid=%d\n",
10304 pf->pf_seid, pf->main_vsi_seid);
10305 break;
10306 case I40E_SWITCH_ELEMENT_TYPE_PF:
10307 case I40E_SWITCH_ELEMENT_TYPE_VF:
10308 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10309 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10310 case I40E_SWITCH_ELEMENT_TYPE_PE:
10311 case I40E_SWITCH_ELEMENT_TYPE_PA:
10312 /* ignore these for now */
10313 break;
10314 default:
10315 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10316 element_type, seid);
10317 break;
10318 }
10319 }
10320
10321 /**
10322 * i40e_fetch_switch_configuration - Get switch config from firmware
10323 * @pf: board private structure
10324 * @printconfig: should we print the contents
10325 *
10326 * Get the current switch configuration from the device and
10327 * extract a few useful SEID values.
10328 **/
10329 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10330 {
10331 struct i40e_aqc_get_switch_config_resp *sw_config;
10332 u16 next_seid = 0;
10333 int ret = 0;
10334 u8 *aq_buf;
10335 int i;
10336
10337 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10338 if (!aq_buf)
10339 return -ENOMEM;
10340
10341 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10342 do {
10343 u16 num_reported, num_total;
10344
10345 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10346 I40E_AQ_LARGE_BUF,
10347 &next_seid, NULL);
10348 if (ret) {
10349 dev_info(&pf->pdev->dev,
10350 "get switch config failed err %s aq_err %s\n",
10351 i40e_stat_str(&pf->hw, ret),
10352 i40e_aq_str(&pf->hw,
10353 pf->hw.aq.asq_last_status));
10354 kfree(aq_buf);
10355 return -ENOENT;
10356 }
10357
10358 num_reported = le16_to_cpu(sw_config->header.num_reported);
10359 num_total = le16_to_cpu(sw_config->header.num_total);
10360
10361 if (printconfig)
10362 dev_info(&pf->pdev->dev,
10363 "header: %d reported %d total\n",
10364 num_reported, num_total);
10365
10366 for (i = 0; i < num_reported; i++) {
10367 struct i40e_aqc_switch_config_element_resp *ele =
10368 &sw_config->element[i];
10369
10370 i40e_setup_pf_switch_element(pf, ele, num_reported,
10371 printconfig);
10372 }
10373 } while (next_seid != 0);
10374
10375 kfree(aq_buf);
10376 return ret;
10377 }
10378
10379 /**
10380 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10381 * @pf: board private structure
10382 * @reinit: if the Main VSI needs to re-initialized.
10383 *
10384 * Returns 0 on success, negative value on failure
10385 **/
10386 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10387 {
10388 u16 flags = 0;
10389 int ret;
10390
10391 /* find out what's out there already */
10392 ret = i40e_fetch_switch_configuration(pf, false);
10393 if (ret) {
10394 dev_info(&pf->pdev->dev,
10395 "couldn't fetch switch config, err %s aq_err %s\n",
10396 i40e_stat_str(&pf->hw, ret),
10397 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10398 return ret;
10399 }
10400 i40e_pf_reset_stats(pf);
10401
10402 /* set the switch config bit for the whole device to
10403 * support limited promisc or true promisc
10404 * when user requests promisc. The default is limited
10405 * promisc.
10406 */
10407
10408 if ((pf->hw.pf_id == 0) &&
10409 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10410 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10411
10412 if (pf->hw.pf_id == 0) {
10413 u16 valid_flags;
10414
10415 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10416 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10417 NULL);
10418 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10419 dev_info(&pf->pdev->dev,
10420 "couldn't set switch config bits, err %s aq_err %s\n",
10421 i40e_stat_str(&pf->hw, ret),
10422 i40e_aq_str(&pf->hw,
10423 pf->hw.aq.asq_last_status));
10424 /* not a fatal problem, just keep going */
10425 }
10426 }
10427
10428 /* first time setup */
10429 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10430 struct i40e_vsi *vsi = NULL;
10431 u16 uplink_seid;
10432
10433 /* Set up the PF VSI associated with the PF's main VSI
10434 * that is already in the HW switch
10435 */
10436 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10437 uplink_seid = pf->veb[pf->lan_veb]->seid;
10438 else
10439 uplink_seid = pf->mac_seid;
10440 if (pf->lan_vsi == I40E_NO_VSI)
10441 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10442 else if (reinit)
10443 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10444 if (!vsi) {
10445 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10446 i40e_fdir_teardown(pf);
10447 return -EAGAIN;
10448 }
10449 } else {
10450 /* force a reset of TC and queue layout configurations */
10451 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10452
10453 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10454 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10455 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10456 }
10457 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10458
10459 i40e_fdir_sb_setup(pf);
10460
10461 /* Setup static PF queue filter control settings */
10462 ret = i40e_setup_pf_filter_control(pf);
10463 if (ret) {
10464 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10465 ret);
10466 /* Failure here should not stop continuing other steps */
10467 }
10468
10469 /* enable RSS in the HW, even for only one queue, as the stack can use
10470 * the hash
10471 */
10472 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10473 i40e_pf_config_rss(pf);
10474
10475 /* fill in link information and enable LSE reporting */
10476 i40e_update_link_info(&pf->hw);
10477 i40e_link_event(pf);
10478
10479 /* Initialize user-specific link properties */
10480 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10481 I40E_AQ_AN_COMPLETED) ? true : false);
10482
10483 i40e_ptp_init(pf);
10484
10485 return ret;
10486 }
10487
10488 /**
10489 * i40e_determine_queue_usage - Work out queue distribution
10490 * @pf: board private structure
10491 **/
10492 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10493 {
10494 int queues_left;
10495
10496 pf->num_lan_qps = 0;
10497 #ifdef I40E_FCOE
10498 pf->num_fcoe_qps = 0;
10499 #endif
10500
10501 /* Find the max queues to be put into basic use. We'll always be
10502 * using TC0, whether or not DCB is running, and TC0 will get the
10503 * big RSS set.
10504 */
10505 queues_left = pf->hw.func_caps.num_tx_qp;
10506
10507 if ((queues_left == 1) ||
10508 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10509 /* one qp for PF, no queues for anything else */
10510 queues_left = 0;
10511 pf->alloc_rss_size = pf->num_lan_qps = 1;
10512
10513 /* make sure all the fancies are disabled */
10514 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10515 I40E_FLAG_IWARP_ENABLED |
10516 #ifdef I40E_FCOE
10517 I40E_FLAG_FCOE_ENABLED |
10518 #endif
10519 I40E_FLAG_FD_SB_ENABLED |
10520 I40E_FLAG_FD_ATR_ENABLED |
10521 I40E_FLAG_DCB_CAPABLE |
10522 I40E_FLAG_SRIOV_ENABLED |
10523 I40E_FLAG_VMDQ_ENABLED);
10524 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10525 I40E_FLAG_FD_SB_ENABLED |
10526 I40E_FLAG_FD_ATR_ENABLED |
10527 I40E_FLAG_DCB_CAPABLE))) {
10528 /* one qp for PF */
10529 pf->alloc_rss_size = pf->num_lan_qps = 1;
10530 queues_left -= pf->num_lan_qps;
10531
10532 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10533 I40E_FLAG_IWARP_ENABLED |
10534 #ifdef I40E_FCOE
10535 I40E_FLAG_FCOE_ENABLED |
10536 #endif
10537 I40E_FLAG_FD_SB_ENABLED |
10538 I40E_FLAG_FD_ATR_ENABLED |
10539 I40E_FLAG_DCB_ENABLED |
10540 I40E_FLAG_VMDQ_ENABLED);
10541 } else {
10542 /* Not enough queues for all TCs */
10543 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10544 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10545 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10546 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10547 }
10548 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10549 num_online_cpus());
10550 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10551 pf->hw.func_caps.num_tx_qp);
10552
10553 queues_left -= pf->num_lan_qps;
10554 }
10555
10556 #ifdef I40E_FCOE
10557 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10558 if (I40E_DEFAULT_FCOE <= queues_left) {
10559 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10560 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10561 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10562 } else {
10563 pf->num_fcoe_qps = 0;
10564 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10565 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10566 }
10567
10568 queues_left -= pf->num_fcoe_qps;
10569 }
10570
10571 #endif
10572 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10573 if (queues_left > 1) {
10574 queues_left -= 1; /* save 1 queue for FD */
10575 } else {
10576 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10577 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10578 }
10579 }
10580
10581 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10582 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10583 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10584 (queues_left / pf->num_vf_qps));
10585 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10586 }
10587
10588 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10589 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10590 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10591 (queues_left / pf->num_vmdq_qps));
10592 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10593 }
10594
10595 pf->queues_left = queues_left;
10596 dev_dbg(&pf->pdev->dev,
10597 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10598 pf->hw.func_caps.num_tx_qp,
10599 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10600 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10601 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10602 queues_left);
10603 #ifdef I40E_FCOE
10604 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10605 #endif
10606 }
10607
10608 /**
10609 * i40e_setup_pf_filter_control - Setup PF static filter control
10610 * @pf: PF to be setup
10611 *
10612 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10613 * settings. If PE/FCoE are enabled then it will also set the per PF
10614 * based filter sizes required for them. It also enables Flow director,
10615 * ethertype and macvlan type filter settings for the pf.
10616 *
10617 * Returns 0 on success, negative on failure
10618 **/
10619 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10620 {
10621 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10622
10623 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10624
10625 /* Flow Director is enabled */
10626 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10627 settings->enable_fdir = true;
10628
10629 /* Ethtype and MACVLAN filters enabled for PF */
10630 settings->enable_ethtype = true;
10631 settings->enable_macvlan = true;
10632
10633 if (i40e_set_filter_control(&pf->hw, settings))
10634 return -ENOENT;
10635
10636 return 0;
10637 }
10638
10639 #define INFO_STRING_LEN 255
10640 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10641 static void i40e_print_features(struct i40e_pf *pf)
10642 {
10643 struct i40e_hw *hw = &pf->hw;
10644 char *buf;
10645 int i;
10646
10647 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10648 if (!buf)
10649 return;
10650
10651 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10652 #ifdef CONFIG_PCI_IOV
10653 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10654 #endif
10655 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10656 pf->hw.func_caps.num_vsis,
10657 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10658 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10659 i += snprintf(&buf[i], REMAIN(i), " RSS");
10660 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10661 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10662 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10663 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10664 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10665 }
10666 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10667 i += snprintf(&buf[i], REMAIN(i), " DCB");
10668 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10669 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10670 if (pf->flags & I40E_FLAG_PTP)
10671 i += snprintf(&buf[i], REMAIN(i), " PTP");
10672 #ifdef I40E_FCOE
10673 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10674 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10675 #endif
10676 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10677 i += snprintf(&buf[i], REMAIN(i), " VEB");
10678 else
10679 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10680
10681 dev_info(&pf->pdev->dev, "%s\n", buf);
10682 kfree(buf);
10683 WARN_ON(i > INFO_STRING_LEN);
10684 }
10685
10686 /**
10687 * i40e_get_platform_mac_addr - get platform-specific MAC address
10688 *
10689 * @pdev: PCI device information struct
10690 * @pf: board private structure
10691 *
10692 * Look up the MAC address in Open Firmware on systems that support it,
10693 * and use IDPROM on SPARC if no OF address is found. On return, the
10694 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10695 * has been selected.
10696 **/
10697 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10698 {
10699 pf->flags &= ~I40E_FLAG_PF_MAC;
10700 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10701 pf->flags |= I40E_FLAG_PF_MAC;
10702 }
10703
10704 /**
10705 * i40e_probe - Device initialization routine
10706 * @pdev: PCI device information struct
10707 * @ent: entry in i40e_pci_tbl
10708 *
10709 * i40e_probe initializes a PF identified by a pci_dev structure.
10710 * The OS initialization, configuring of the PF private structure,
10711 * and a hardware reset occur.
10712 *
10713 * Returns 0 on success, negative on failure
10714 **/
10715 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10716 {
10717 struct i40e_aq_get_phy_abilities_resp abilities;
10718 struct i40e_pf *pf;
10719 struct i40e_hw *hw;
10720 static u16 pfs_found;
10721 u16 wol_nvm_bits;
10722 u16 link_status;
10723 int err;
10724 u32 val;
10725 u32 i;
10726 u8 set_fc_aq_fail;
10727
10728 err = pci_enable_device_mem(pdev);
10729 if (err)
10730 return err;
10731
10732 /* set up for high or low dma */
10733 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10734 if (err) {
10735 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10736 if (err) {
10737 dev_err(&pdev->dev,
10738 "DMA configuration failed: 0x%x\n", err);
10739 goto err_dma;
10740 }
10741 }
10742
10743 /* set up pci connections */
10744 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10745 IORESOURCE_MEM), i40e_driver_name);
10746 if (err) {
10747 dev_info(&pdev->dev,
10748 "pci_request_selected_regions failed %d\n", err);
10749 goto err_pci_reg;
10750 }
10751
10752 pci_enable_pcie_error_reporting(pdev);
10753 pci_set_master(pdev);
10754
10755 /* Now that we have a PCI connection, we need to do the
10756 * low level device setup. This is primarily setting up
10757 * the Admin Queue structures and then querying for the
10758 * device's current profile information.
10759 */
10760 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10761 if (!pf) {
10762 err = -ENOMEM;
10763 goto err_pf_alloc;
10764 }
10765 pf->next_vsi = 0;
10766 pf->pdev = pdev;
10767 set_bit(__I40E_DOWN, &pf->state);
10768
10769 hw = &pf->hw;
10770 hw->back = pf;
10771
10772 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10773 I40E_MAX_CSR_SPACE);
10774
10775 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10776 if (!hw->hw_addr) {
10777 err = -EIO;
10778 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10779 (unsigned int)pci_resource_start(pdev, 0),
10780 pf->ioremap_len, err);
10781 goto err_ioremap;
10782 }
10783 hw->vendor_id = pdev->vendor;
10784 hw->device_id = pdev->device;
10785 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10786 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10787 hw->subsystem_device_id = pdev->subsystem_device;
10788 hw->bus.device = PCI_SLOT(pdev->devfn);
10789 hw->bus.func = PCI_FUNC(pdev->devfn);
10790 pf->instance = pfs_found;
10791
10792 /* set up the locks for the AQ, do this only once in probe
10793 * and destroy them only once in remove
10794 */
10795 mutex_init(&hw->aq.asq_mutex);
10796 mutex_init(&hw->aq.arq_mutex);
10797
10798 if (debug != -1) {
10799 pf->msg_enable = pf->hw.debug_mask;
10800 pf->msg_enable = debug;
10801 }
10802
10803 /* do a special CORER for clearing PXE mode once at init */
10804 if (hw->revision_id == 0 &&
10805 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10806 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10807 i40e_flush(hw);
10808 msleep(200);
10809 pf->corer_count++;
10810
10811 i40e_clear_pxe_mode(hw);
10812 }
10813
10814 /* Reset here to make sure all is clean and to define PF 'n' */
10815 i40e_clear_hw(hw);
10816 err = i40e_pf_reset(hw);
10817 if (err) {
10818 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10819 goto err_pf_reset;
10820 }
10821 pf->pfr_count++;
10822
10823 hw->aq.num_arq_entries = I40E_AQ_LEN;
10824 hw->aq.num_asq_entries = I40E_AQ_LEN;
10825 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10826 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10827 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10828
10829 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10830 "%s-%s:misc",
10831 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10832
10833 err = i40e_init_shared_code(hw);
10834 if (err) {
10835 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10836 err);
10837 goto err_pf_reset;
10838 }
10839
10840 /* set up a default setting for link flow control */
10841 pf->hw.fc.requested_mode = I40E_FC_NONE;
10842
10843 err = i40e_init_adminq(hw);
10844 if (err) {
10845 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10846 dev_info(&pdev->dev,
10847 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10848 else
10849 dev_info(&pdev->dev,
10850 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10851
10852 goto err_pf_reset;
10853 }
10854
10855 /* provide nvm, fw, api versions */
10856 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10857 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10858 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10859 i40e_nvm_version_str(hw));
10860
10861 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10862 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10863 dev_info(&pdev->dev,
10864 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10865 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10866 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10867 dev_info(&pdev->dev,
10868 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10869
10870 i40e_verify_eeprom(pf);
10871
10872 /* Rev 0 hardware was never productized */
10873 if (hw->revision_id < 1)
10874 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10875
10876 i40e_clear_pxe_mode(hw);
10877 err = i40e_get_capabilities(pf);
10878 if (err)
10879 goto err_adminq_setup;
10880
10881 err = i40e_sw_init(pf);
10882 if (err) {
10883 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10884 goto err_sw_init;
10885 }
10886
10887 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10888 hw->func_caps.num_rx_qp,
10889 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10890 if (err) {
10891 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10892 goto err_init_lan_hmc;
10893 }
10894
10895 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10896 if (err) {
10897 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10898 err = -ENOENT;
10899 goto err_configure_lan_hmc;
10900 }
10901
10902 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10903 * Ignore error return codes because if it was already disabled via
10904 * hardware settings this will fail
10905 */
10906 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10907 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10908 i40e_aq_stop_lldp(hw, true, NULL);
10909 }
10910
10911 i40e_get_mac_addr(hw, hw->mac.addr);
10912 /* allow a platform config to override the HW addr */
10913 i40e_get_platform_mac_addr(pdev, pf);
10914 if (!is_valid_ether_addr(hw->mac.addr)) {
10915 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10916 err = -EIO;
10917 goto err_mac_addr;
10918 }
10919 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10920 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10921 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10922 if (is_valid_ether_addr(hw->mac.port_addr))
10923 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10924 #ifdef I40E_FCOE
10925 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10926 if (err)
10927 dev_info(&pdev->dev,
10928 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10929 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10930 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10931 hw->mac.san_addr);
10932 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10933 }
10934 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10935 #endif /* I40E_FCOE */
10936
10937 pci_set_drvdata(pdev, pf);
10938 pci_save_state(pdev);
10939 #ifdef CONFIG_I40E_DCB
10940 err = i40e_init_pf_dcb(pf);
10941 if (err) {
10942 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10943 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10944 /* Continue without DCB enabled */
10945 }
10946 #endif /* CONFIG_I40E_DCB */
10947
10948 /* set up periodic task facility */
10949 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10950 pf->service_timer_period = HZ;
10951
10952 INIT_WORK(&pf->service_task, i40e_service_task);
10953 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10954 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10955
10956 /* NVM bit on means WoL disabled for the port */
10957 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10958 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10959 pf->wol_en = false;
10960 else
10961 pf->wol_en = true;
10962 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10963
10964 /* set up the main switch operations */
10965 i40e_determine_queue_usage(pf);
10966 err = i40e_init_interrupt_scheme(pf);
10967 if (err)
10968 goto err_switch_setup;
10969
10970 /* The number of VSIs reported by the FW is the minimum guaranteed
10971 * to us; HW supports far more and we share the remaining pool with
10972 * the other PFs. We allocate space for more than the guarantee with
10973 * the understanding that we might not get them all later.
10974 */
10975 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10976 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10977 else
10978 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10979
10980 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10981 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
10982 GFP_KERNEL);
10983 if (!pf->vsi) {
10984 err = -ENOMEM;
10985 goto err_switch_setup;
10986 }
10987
10988 #ifdef CONFIG_PCI_IOV
10989 /* prep for VF support */
10990 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10991 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10992 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10993 if (pci_num_vf(pdev))
10994 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10995 }
10996 #endif
10997 err = i40e_setup_pf_switch(pf, false);
10998 if (err) {
10999 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11000 goto err_vsis;
11001 }
11002
11003 /* Make sure flow control is set according to current settings */
11004 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11005 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11006 dev_dbg(&pf->pdev->dev,
11007 "Set fc with err %s aq_err %s on get_phy_cap\n",
11008 i40e_stat_str(hw, err),
11009 i40e_aq_str(hw, hw->aq.asq_last_status));
11010 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11011 dev_dbg(&pf->pdev->dev,
11012 "Set fc with err %s aq_err %s on set_phy_config\n",
11013 i40e_stat_str(hw, err),
11014 i40e_aq_str(hw, hw->aq.asq_last_status));
11015 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11016 dev_dbg(&pf->pdev->dev,
11017 "Set fc with err %s aq_err %s on get_link_info\n",
11018 i40e_stat_str(hw, err),
11019 i40e_aq_str(hw, hw->aq.asq_last_status));
11020
11021 /* if FDIR VSI was set up, start it now */
11022 for (i = 0; i < pf->num_alloc_vsi; i++) {
11023 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11024 i40e_vsi_open(pf->vsi[i]);
11025 break;
11026 }
11027 }
11028
11029 /* The driver only wants link up/down and module qualification
11030 * reports from firmware. Note the negative logic.
11031 */
11032 err = i40e_aq_set_phy_int_mask(&pf->hw,
11033 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11034 I40E_AQ_EVENT_MEDIA_NA |
11035 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11036 if (err)
11037 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11038 i40e_stat_str(&pf->hw, err),
11039 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11040
11041 /* Reconfigure hardware for allowing smaller MSS in the case
11042 * of TSO, so that we avoid the MDD being fired and causing
11043 * a reset in the case of small MSS+TSO.
11044 */
11045 val = rd32(hw, I40E_REG_MSS);
11046 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11047 val &= ~I40E_REG_MSS_MIN_MASK;
11048 val |= I40E_64BYTE_MSS;
11049 wr32(hw, I40E_REG_MSS, val);
11050 }
11051
11052 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11053 msleep(75);
11054 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11055 if (err)
11056 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11057 i40e_stat_str(&pf->hw, err),
11058 i40e_aq_str(&pf->hw,
11059 pf->hw.aq.asq_last_status));
11060 }
11061 /* The main driver is (mostly) up and happy. We need to set this state
11062 * before setting up the misc vector or we get a race and the vector
11063 * ends up disabled forever.
11064 */
11065 clear_bit(__I40E_DOWN, &pf->state);
11066
11067 /* In case of MSIX we are going to setup the misc vector right here
11068 * to handle admin queue events etc. In case of legacy and MSI
11069 * the misc functionality and queue processing is combined in
11070 * the same vector and that gets setup at open.
11071 */
11072 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11073 err = i40e_setup_misc_vector(pf);
11074 if (err) {
11075 dev_info(&pdev->dev,
11076 "setup of misc vector failed: %d\n", err);
11077 goto err_vsis;
11078 }
11079 }
11080
11081 #ifdef CONFIG_PCI_IOV
11082 /* prep for VF support */
11083 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11084 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11085 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11086 /* disable link interrupts for VFs */
11087 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11088 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11089 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11090 i40e_flush(hw);
11091
11092 if (pci_num_vf(pdev)) {
11093 dev_info(&pdev->dev,
11094 "Active VFs found, allocating resources.\n");
11095 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11096 if (err)
11097 dev_info(&pdev->dev,
11098 "Error %d allocating resources for existing VFs\n",
11099 err);
11100 }
11101 }
11102 #endif /* CONFIG_PCI_IOV */
11103
11104 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11105 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11106 pf->num_iwarp_msix,
11107 I40E_IWARP_IRQ_PILE_ID);
11108 if (pf->iwarp_base_vector < 0) {
11109 dev_info(&pdev->dev,
11110 "failed to get tracking for %d vectors for IWARP err=%d\n",
11111 pf->num_iwarp_msix, pf->iwarp_base_vector);
11112 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11113 }
11114 }
11115
11116 i40e_dbg_pf_init(pf);
11117
11118 /* tell the firmware that we're starting */
11119 i40e_send_version(pf);
11120
11121 /* since everything's happy, start the service_task timer */
11122 mod_timer(&pf->service_timer,
11123 round_jiffies(jiffies + pf->service_timer_period));
11124
11125 /* add this PF to client device list and launch a client service task */
11126 err = i40e_lan_add_device(pf);
11127 if (err)
11128 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11129 err);
11130
11131 #ifdef I40E_FCOE
11132 /* create FCoE interface */
11133 i40e_fcoe_vsi_setup(pf);
11134
11135 #endif
11136 #define PCI_SPEED_SIZE 8
11137 #define PCI_WIDTH_SIZE 8
11138 /* Devices on the IOSF bus do not have this information
11139 * and will report PCI Gen 1 x 1 by default so don't bother
11140 * checking them.
11141 */
11142 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11143 char speed[PCI_SPEED_SIZE] = "Unknown";
11144 char width[PCI_WIDTH_SIZE] = "Unknown";
11145
11146 /* Get the negotiated link width and speed from PCI config
11147 * space
11148 */
11149 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11150 &link_status);
11151
11152 i40e_set_pci_config_data(hw, link_status);
11153
11154 switch (hw->bus.speed) {
11155 case i40e_bus_speed_8000:
11156 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11157 case i40e_bus_speed_5000:
11158 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11159 case i40e_bus_speed_2500:
11160 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11161 default:
11162 break;
11163 }
11164 switch (hw->bus.width) {
11165 case i40e_bus_width_pcie_x8:
11166 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11167 case i40e_bus_width_pcie_x4:
11168 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11169 case i40e_bus_width_pcie_x2:
11170 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11171 case i40e_bus_width_pcie_x1:
11172 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11173 default:
11174 break;
11175 }
11176
11177 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11178 speed, width);
11179
11180 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11181 hw->bus.speed < i40e_bus_speed_8000) {
11182 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11183 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11184 }
11185 }
11186
11187 /* get the requested speeds from the fw */
11188 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11189 if (err)
11190 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11191 i40e_stat_str(&pf->hw, err),
11192 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11193 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11194
11195 /* get the supported phy types from the fw */
11196 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11197 if (err)
11198 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11199 i40e_stat_str(&pf->hw, err),
11200 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11201 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11202
11203 /* Add a filter to drop all Flow control frames from any VSI from being
11204 * transmitted. By doing so we stop a malicious VF from sending out
11205 * PAUSE or PFC frames and potentially controlling traffic for other
11206 * PF/VF VSIs.
11207 * The FW can still send Flow control frames if enabled.
11208 */
11209 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11210 pf->main_vsi_seid);
11211
11212 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11213 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11214 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY;
11215
11216 /* print a string summarizing features */
11217 i40e_print_features(pf);
11218
11219 return 0;
11220
11221 /* Unwind what we've done if something failed in the setup */
11222 err_vsis:
11223 set_bit(__I40E_DOWN, &pf->state);
11224 i40e_clear_interrupt_scheme(pf);
11225 kfree(pf->vsi);
11226 err_switch_setup:
11227 i40e_reset_interrupt_capability(pf);
11228 del_timer_sync(&pf->service_timer);
11229 err_mac_addr:
11230 err_configure_lan_hmc:
11231 (void)i40e_shutdown_lan_hmc(hw);
11232 err_init_lan_hmc:
11233 kfree(pf->qp_pile);
11234 err_sw_init:
11235 err_adminq_setup:
11236 err_pf_reset:
11237 iounmap(hw->hw_addr);
11238 err_ioremap:
11239 kfree(pf);
11240 err_pf_alloc:
11241 pci_disable_pcie_error_reporting(pdev);
11242 pci_release_selected_regions(pdev,
11243 pci_select_bars(pdev, IORESOURCE_MEM));
11244 err_pci_reg:
11245 err_dma:
11246 pci_disable_device(pdev);
11247 return err;
11248 }
11249
11250 /**
11251 * i40e_remove - Device removal routine
11252 * @pdev: PCI device information struct
11253 *
11254 * i40e_remove is called by the PCI subsystem to alert the driver
11255 * that is should release a PCI device. This could be caused by a
11256 * Hot-Plug event, or because the driver is going to be removed from
11257 * memory.
11258 **/
11259 static void i40e_remove(struct pci_dev *pdev)
11260 {
11261 struct i40e_pf *pf = pci_get_drvdata(pdev);
11262 struct i40e_hw *hw = &pf->hw;
11263 i40e_status ret_code;
11264 int i;
11265
11266 i40e_dbg_pf_exit(pf);
11267
11268 i40e_ptp_stop(pf);
11269
11270 /* Disable RSS in hw */
11271 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11272 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11273
11274 /* no more scheduling of any task */
11275 set_bit(__I40E_SUSPENDED, &pf->state);
11276 set_bit(__I40E_DOWN, &pf->state);
11277 if (pf->service_timer.data)
11278 del_timer_sync(&pf->service_timer);
11279 if (pf->service_task.func)
11280 cancel_work_sync(&pf->service_task);
11281
11282 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11283 i40e_free_vfs(pf);
11284 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11285 }
11286
11287 i40e_fdir_teardown(pf);
11288
11289 /* If there is a switch structure or any orphans, remove them.
11290 * This will leave only the PF's VSI remaining.
11291 */
11292 for (i = 0; i < I40E_MAX_VEB; i++) {
11293 if (!pf->veb[i])
11294 continue;
11295
11296 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11297 pf->veb[i]->uplink_seid == 0)
11298 i40e_switch_branch_release(pf->veb[i]);
11299 }
11300
11301 /* Now we can shutdown the PF's VSI, just before we kill
11302 * adminq and hmc.
11303 */
11304 if (pf->vsi[pf->lan_vsi])
11305 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11306
11307 /* remove attached clients */
11308 ret_code = i40e_lan_del_device(pf);
11309 if (ret_code) {
11310 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11311 ret_code);
11312 }
11313
11314 /* shutdown and destroy the HMC */
11315 if (hw->hmc.hmc_obj) {
11316 ret_code = i40e_shutdown_lan_hmc(hw);
11317 if (ret_code)
11318 dev_warn(&pdev->dev,
11319 "Failed to destroy the HMC resources: %d\n",
11320 ret_code);
11321 }
11322
11323 /* shutdown the adminq */
11324 ret_code = i40e_shutdown_adminq(hw);
11325 if (ret_code)
11326 dev_warn(&pdev->dev,
11327 "Failed to destroy the Admin Queue resources: %d\n",
11328 ret_code);
11329
11330 /* destroy the locks only once, here */
11331 mutex_destroy(&hw->aq.arq_mutex);
11332 mutex_destroy(&hw->aq.asq_mutex);
11333
11334 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11335 i40e_clear_interrupt_scheme(pf);
11336 for (i = 0; i < pf->num_alloc_vsi; i++) {
11337 if (pf->vsi[i]) {
11338 i40e_vsi_clear_rings(pf->vsi[i]);
11339 i40e_vsi_clear(pf->vsi[i]);
11340 pf->vsi[i] = NULL;
11341 }
11342 }
11343
11344 for (i = 0; i < I40E_MAX_VEB; i++) {
11345 kfree(pf->veb[i]);
11346 pf->veb[i] = NULL;
11347 }
11348
11349 kfree(pf->qp_pile);
11350 kfree(pf->vsi);
11351
11352 iounmap(hw->hw_addr);
11353 kfree(pf);
11354 pci_release_selected_regions(pdev,
11355 pci_select_bars(pdev, IORESOURCE_MEM));
11356
11357 pci_disable_pcie_error_reporting(pdev);
11358 pci_disable_device(pdev);
11359 }
11360
11361 /**
11362 * i40e_pci_error_detected - warning that something funky happened in PCI land
11363 * @pdev: PCI device information struct
11364 *
11365 * Called to warn that something happened and the error handling steps
11366 * are in progress. Allows the driver to quiesce things, be ready for
11367 * remediation.
11368 **/
11369 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11370 enum pci_channel_state error)
11371 {
11372 struct i40e_pf *pf = pci_get_drvdata(pdev);
11373
11374 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11375
11376 /* shutdown all operations */
11377 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11378 rtnl_lock();
11379 i40e_prep_for_reset(pf);
11380 rtnl_unlock();
11381 }
11382
11383 /* Request a slot reset */
11384 return PCI_ERS_RESULT_NEED_RESET;
11385 }
11386
11387 /**
11388 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11389 * @pdev: PCI device information struct
11390 *
11391 * Called to find if the driver can work with the device now that
11392 * the pci slot has been reset. If a basic connection seems good
11393 * (registers are readable and have sane content) then return a
11394 * happy little PCI_ERS_RESULT_xxx.
11395 **/
11396 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11397 {
11398 struct i40e_pf *pf = pci_get_drvdata(pdev);
11399 pci_ers_result_t result;
11400 int err;
11401 u32 reg;
11402
11403 dev_dbg(&pdev->dev, "%s\n", __func__);
11404 if (pci_enable_device_mem(pdev)) {
11405 dev_info(&pdev->dev,
11406 "Cannot re-enable PCI device after reset.\n");
11407 result = PCI_ERS_RESULT_DISCONNECT;
11408 } else {
11409 pci_set_master(pdev);
11410 pci_restore_state(pdev);
11411 pci_save_state(pdev);
11412 pci_wake_from_d3(pdev, false);
11413
11414 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11415 if (reg == 0)
11416 result = PCI_ERS_RESULT_RECOVERED;
11417 else
11418 result = PCI_ERS_RESULT_DISCONNECT;
11419 }
11420
11421 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11422 if (err) {
11423 dev_info(&pdev->dev,
11424 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11425 err);
11426 /* non-fatal, continue */
11427 }
11428
11429 return result;
11430 }
11431
11432 /**
11433 * i40e_pci_error_resume - restart operations after PCI error recovery
11434 * @pdev: PCI device information struct
11435 *
11436 * Called to allow the driver to bring things back up after PCI error
11437 * and/or reset recovery has finished.
11438 **/
11439 static void i40e_pci_error_resume(struct pci_dev *pdev)
11440 {
11441 struct i40e_pf *pf = pci_get_drvdata(pdev);
11442
11443 dev_dbg(&pdev->dev, "%s\n", __func__);
11444 if (test_bit(__I40E_SUSPENDED, &pf->state))
11445 return;
11446
11447 rtnl_lock();
11448 i40e_handle_reset_warning(pf);
11449 rtnl_unlock();
11450 }
11451
11452 /**
11453 * i40e_shutdown - PCI callback for shutting down
11454 * @pdev: PCI device information struct
11455 **/
11456 static void i40e_shutdown(struct pci_dev *pdev)
11457 {
11458 struct i40e_pf *pf = pci_get_drvdata(pdev);
11459 struct i40e_hw *hw = &pf->hw;
11460
11461 set_bit(__I40E_SUSPENDED, &pf->state);
11462 set_bit(__I40E_DOWN, &pf->state);
11463 rtnl_lock();
11464 i40e_prep_for_reset(pf);
11465 rtnl_unlock();
11466
11467 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11468 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11469
11470 del_timer_sync(&pf->service_timer);
11471 cancel_work_sync(&pf->service_task);
11472 i40e_fdir_teardown(pf);
11473
11474 rtnl_lock();
11475 i40e_prep_for_reset(pf);
11476 rtnl_unlock();
11477
11478 wr32(hw, I40E_PFPM_APM,
11479 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11480 wr32(hw, I40E_PFPM_WUFC,
11481 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11482
11483 i40e_clear_interrupt_scheme(pf);
11484
11485 if (system_state == SYSTEM_POWER_OFF) {
11486 pci_wake_from_d3(pdev, pf->wol_en);
11487 pci_set_power_state(pdev, PCI_D3hot);
11488 }
11489 }
11490
11491 #ifdef CONFIG_PM
11492 /**
11493 * i40e_suspend - PCI callback for moving to D3
11494 * @pdev: PCI device information struct
11495 **/
11496 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11497 {
11498 struct i40e_pf *pf = pci_get_drvdata(pdev);
11499 struct i40e_hw *hw = &pf->hw;
11500 int retval = 0;
11501
11502 set_bit(__I40E_SUSPENDED, &pf->state);
11503 set_bit(__I40E_DOWN, &pf->state);
11504
11505 rtnl_lock();
11506 i40e_prep_for_reset(pf);
11507 rtnl_unlock();
11508
11509 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11510 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11511
11512 i40e_stop_misc_vector(pf);
11513
11514 retval = pci_save_state(pdev);
11515 if (retval)
11516 return retval;
11517
11518 pci_wake_from_d3(pdev, pf->wol_en);
11519 pci_set_power_state(pdev, PCI_D3hot);
11520
11521 return retval;
11522 }
11523
11524 /**
11525 * i40e_resume - PCI callback for waking up from D3
11526 * @pdev: PCI device information struct
11527 **/
11528 static int i40e_resume(struct pci_dev *pdev)
11529 {
11530 struct i40e_pf *pf = pci_get_drvdata(pdev);
11531 u32 err;
11532
11533 pci_set_power_state(pdev, PCI_D0);
11534 pci_restore_state(pdev);
11535 /* pci_restore_state() clears dev->state_saves, so
11536 * call pci_save_state() again to restore it.
11537 */
11538 pci_save_state(pdev);
11539
11540 err = pci_enable_device_mem(pdev);
11541 if (err) {
11542 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11543 return err;
11544 }
11545 pci_set_master(pdev);
11546
11547 /* no wakeup events while running */
11548 pci_wake_from_d3(pdev, false);
11549
11550 /* handling the reset will rebuild the device state */
11551 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11552 clear_bit(__I40E_DOWN, &pf->state);
11553 rtnl_lock();
11554 i40e_reset_and_rebuild(pf, false);
11555 rtnl_unlock();
11556 }
11557
11558 return 0;
11559 }
11560
11561 #endif
11562 static const struct pci_error_handlers i40e_err_handler = {
11563 .error_detected = i40e_pci_error_detected,
11564 .slot_reset = i40e_pci_error_slot_reset,
11565 .resume = i40e_pci_error_resume,
11566 };
11567
11568 static struct pci_driver i40e_driver = {
11569 .name = i40e_driver_name,
11570 .id_table = i40e_pci_tbl,
11571 .probe = i40e_probe,
11572 .remove = i40e_remove,
11573 #ifdef CONFIG_PM
11574 .suspend = i40e_suspend,
11575 .resume = i40e_resume,
11576 #endif
11577 .shutdown = i40e_shutdown,
11578 .err_handler = &i40e_err_handler,
11579 .sriov_configure = i40e_pci_sriov_configure,
11580 };
11581
11582 /**
11583 * i40e_init_module - Driver registration routine
11584 *
11585 * i40e_init_module is the first routine called when the driver is
11586 * loaded. All it does is register with the PCI subsystem.
11587 **/
11588 static int __init i40e_init_module(void)
11589 {
11590 pr_info("%s: %s - version %s\n", i40e_driver_name,
11591 i40e_driver_string, i40e_driver_version_str);
11592 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11593
11594 /* we will see if single thread per module is enough for now,
11595 * it can't be any worse than using the system workqueue which
11596 * was already single threaded
11597 */
11598 i40e_wq = create_singlethread_workqueue(i40e_driver_name);
11599 if (!i40e_wq) {
11600 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11601 return -ENOMEM;
11602 }
11603
11604 i40e_dbg_init();
11605 return pci_register_driver(&i40e_driver);
11606 }
11607 module_init(i40e_init_module);
11608
11609 /**
11610 * i40e_exit_module - Driver exit cleanup routine
11611 *
11612 * i40e_exit_module is called just before the driver is removed
11613 * from memory.
11614 **/
11615 static void __exit i40e_exit_module(void)
11616 {
11617 pci_unregister_driver(&i40e_driver);
11618 destroy_workqueue(i40e_wq);
11619 i40e_dbg_exit();
11620 }
11621 module_exit(i40e_exit_module);
Linux with added FPC-III support