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Linux 2.6.21
[linux/fpc-iii.git] / arch / arm / mach-at91 / at91sam9260_devices.c
blob40586e22cd385cd28dda795292f5e78b15a6199e
1 /*
2 * arch/arm/mach-at91/at91sam9260_devices.c
3 *
4 * Copyright (C) 2006 Atmel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/platform_device.h>
16
17 #include <asm/arch/board.h>
18 #include <asm/arch/gpio.h>
19 #include <asm/arch/at91sam9260.h>
20 #include <asm/arch/at91sam926x_mc.h>
21 #include <asm/arch/at91sam9260_matrix.h>
22
23 #include "generic.h"
24
25 #define SZ_512 0x00000200
26 #define SZ_256 0x00000100
27 #define SZ_16 0x00000010
28
29 /* --------------------------------------------------------------------
30 * USB Host
31 * -------------------------------------------------------------------- */
32
33 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
34 static u64 ohci_dmamask = 0xffffffffUL;
35 static struct at91_usbh_data usbh_data;
36
37 static struct resource usbh_resources[] = {
38 [0] = {
39 .start = AT91SAM9260_UHP_BASE,
40 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
41 .flags = IORESOURCE_MEM,
42 },
43 [1] = {
44 .start = AT91SAM9260_ID_UHP,
45 .end = AT91SAM9260_ID_UHP,
46 .flags = IORESOURCE_IRQ,
47 },
48 };
49
50 static struct platform_device at91_usbh_device = {
51 .name = "at91_ohci",
52 .id = -1,
53 .dev = {
54 .dma_mask = &ohci_dmamask,
55 .coherent_dma_mask = 0xffffffff,
56 .platform_data = &usbh_data,
57 },
58 .resource = usbh_resources,
59 .num_resources = ARRAY_SIZE(usbh_resources),
60 };
61
62 void __init at91_add_device_usbh(struct at91_usbh_data *data)
63 {
64 if (!data)
65 return;
66
67 usbh_data = *data;
68 platform_device_register(&at91_usbh_device);
69 }
70 #else
71 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
72 #endif
73
74
75 /* --------------------------------------------------------------------
76 * USB Device (Gadget)
77 * -------------------------------------------------------------------- */
78
79 #ifdef CONFIG_USB_GADGET_AT91
80 static struct at91_udc_data udc_data;
81
82 static struct resource udc_resources[] = {
83 [0] = {
84 .start = AT91SAM9260_BASE_UDP,
85 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 .start = AT91SAM9260_ID_UDP,
90 .end = AT91SAM9260_ID_UDP,
91 .flags = IORESOURCE_IRQ,
92 },
93 };
94
95 static struct platform_device at91_udc_device = {
96 .name = "at91_udc",
97 .id = -1,
98 .dev = {
99 .platform_data = &udc_data,
100 },
101 .resource = udc_resources,
102 .num_resources = ARRAY_SIZE(udc_resources),
103 };
104
105 void __init at91_add_device_udc(struct at91_udc_data *data)
106 {
107 if (!data)
108 return;
109
110 if (data->vbus_pin) {
111 at91_set_gpio_input(data->vbus_pin, 0);
112 at91_set_deglitch(data->vbus_pin, 1);
113 }
114
115 /* Pullup pin is handled internally by USB device peripheral */
116
117 udc_data = *data;
118 platform_device_register(&at91_udc_device);
119 }
120 #else
121 void __init at91_add_device_udc(struct at91_udc_data *data) {}
122 #endif
123
124
125 /* --------------------------------------------------------------------
126 * Ethernet
127 * -------------------------------------------------------------------- */
128
129 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
130 static u64 eth_dmamask = 0xffffffffUL;
131 static struct at91_eth_data eth_data;
132
133 static struct resource eth_resources[] = {
134 [0] = {
135 .start = AT91SAM9260_BASE_EMAC,
136 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
137 .flags = IORESOURCE_MEM,
138 },
139 [1] = {
140 .start = AT91SAM9260_ID_EMAC,
141 .end = AT91SAM9260_ID_EMAC,
142 .flags = IORESOURCE_IRQ,
143 },
144 };
145
146 static struct platform_device at91sam9260_eth_device = {
147 .name = "macb",
148 .id = -1,
149 .dev = {
150 .dma_mask = &eth_dmamask,
151 .coherent_dma_mask = 0xffffffff,
152 .platform_data = &eth_data,
153 },
154 .resource = eth_resources,
155 .num_resources = ARRAY_SIZE(eth_resources),
156 };
157
158 void __init at91_add_device_eth(struct at91_eth_data *data)
159 {
160 if (!data)
161 return;
162
163 if (data->phy_irq_pin) {
164 at91_set_gpio_input(data->phy_irq_pin, 0);
165 at91_set_deglitch(data->phy_irq_pin, 1);
166 }
167
168 /* Pins used for MII and RMII */
169 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
170 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
171 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
172 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
173 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
174 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
175 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
176 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
177 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
178 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
179
180 if (!data->is_rmii) {
181 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
182 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
183 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
184 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
185 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
186 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
187 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
188 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
189 }
190
191 eth_data = *data;
192 platform_device_register(&at91sam9260_eth_device);
193 }
194 #else
195 void __init at91_add_device_eth(struct at91_eth_data *data) {}
196 #endif
197
198
199 /* --------------------------------------------------------------------
200 * MMC / SD
201 * -------------------------------------------------------------------- */
202
203 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
204 static u64 mmc_dmamask = 0xffffffffUL;
205 static struct at91_mmc_data mmc_data;
206
207 static struct resource mmc_resources[] = {
208 [0] = {
209 .start = AT91SAM9260_BASE_MCI,
210 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
211 .flags = IORESOURCE_MEM,
212 },
213 [1] = {
214 .start = AT91SAM9260_ID_MCI,
215 .end = AT91SAM9260_ID_MCI,
216 .flags = IORESOURCE_IRQ,
217 },
218 };
219
220 static struct platform_device at91sam9260_mmc_device = {
221 .name = "at91_mci",
222 .id = -1,
223 .dev = {
224 .dma_mask = &mmc_dmamask,
225 .coherent_dma_mask = 0xffffffff,
226 .platform_data = &mmc_data,
227 },
228 .resource = mmc_resources,
229 .num_resources = ARRAY_SIZE(mmc_resources),
230 };
231
232 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
233 {
234 if (!data)
235 return;
236
237 /* input/irq */
238 if (data->det_pin) {
239 at91_set_gpio_input(data->det_pin, 1);
240 at91_set_deglitch(data->det_pin, 1);
241 }
242 if (data->wp_pin)
243 at91_set_gpio_input(data->wp_pin, 1);
244 if (data->vcc_pin)
245 at91_set_gpio_output(data->vcc_pin, 0);
246
247 /* CLK */
248 at91_set_A_periph(AT91_PIN_PA8, 0);
249
250 if (data->slot_b) {
251 /* CMD */
252 at91_set_B_periph(AT91_PIN_PA1, 1);
253
254 /* DAT0, maybe DAT1..DAT3 */
255 at91_set_B_periph(AT91_PIN_PA0, 1);
256 if (data->wire4) {
257 at91_set_B_periph(AT91_PIN_PA5, 1);
258 at91_set_B_periph(AT91_PIN_PA4, 1);
259 at91_set_B_periph(AT91_PIN_PA3, 1);
260 }
261 } else {
262 /* CMD */
263 at91_set_A_periph(AT91_PIN_PA7, 1);
264
265 /* DAT0, maybe DAT1..DAT3 */
266 at91_set_A_periph(AT91_PIN_PA6, 1);
267 if (data->wire4) {
268 at91_set_A_periph(AT91_PIN_PA9, 1);
269 at91_set_A_periph(AT91_PIN_PA10, 1);
270 at91_set_A_periph(AT91_PIN_PA11, 1);
271 }
272 }
273
274 mmc_data = *data;
275 platform_device_register(&at91sam9260_mmc_device);
276 }
277 #else
278 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
279 #endif
280
281
282 /* --------------------------------------------------------------------
283 * NAND / SmartMedia
284 * -------------------------------------------------------------------- */
285
286 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
287 static struct at91_nand_data nand_data;
288
289 #define NAND_BASE AT91_CHIPSELECT_3
290
291 static struct resource nand_resources[] = {
292 {
293 .start = NAND_BASE,
294 .end = NAND_BASE + SZ_8M - 1,
295 .flags = IORESOURCE_MEM,
296 }
297 };
298
299 static struct platform_device at91sam9260_nand_device = {
300 .name = "at91_nand",
301 .id = -1,
302 .dev = {
303 .platform_data = &nand_data,
304 },
305 .resource = nand_resources,
306 .num_resources = ARRAY_SIZE(nand_resources),
307 };
308
309 void __init at91_add_device_nand(struct at91_nand_data *data)
310 {
311 unsigned long csa, mode;
312
313 if (!data)
314 return;
315
316 csa = at91_sys_read(AT91_MATRIX_EBICSA);
317 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
318
319 /* set the bus interface characteristics */
320 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
321 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
322
323 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
324 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
325
326 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
327
328 if (data->bus_width_16)
329 mode = AT91_SMC_DBW_16;
330 else
331 mode = AT91_SMC_DBW_8;
332 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
333
334 /* enable pin */
335 if (data->enable_pin)
336 at91_set_gpio_output(data->enable_pin, 1);
337
338 /* ready/busy pin */
339 if (data->rdy_pin)
340 at91_set_gpio_input(data->rdy_pin, 1);
341
342 /* card detect pin */
343 if (data->det_pin)
344 at91_set_gpio_input(data->det_pin, 1);
345
346 nand_data = *data;
347 platform_device_register(&at91sam9260_nand_device);
348 }
349 #else
350 void __init at91_add_device_nand(struct at91_nand_data *data) {}
351 #endif
352
353
354 /* --------------------------------------------------------------------
355 * TWI (i2c)
356 * -------------------------------------------------------------------- */
357
358 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
359
360 static struct resource twi_resources[] = {
361 [0] = {
362 .start = AT91SAM9260_BASE_TWI,
363 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
364 .flags = IORESOURCE_MEM,
365 },
366 [1] = {
367 .start = AT91SAM9260_ID_TWI,
368 .end = AT91SAM9260_ID_TWI,
369 .flags = IORESOURCE_IRQ,
370 },
371 };
372
373 static struct platform_device at91sam9260_twi_device = {
374 .name = "at91_i2c",
375 .id = -1,
376 .resource = twi_resources,
377 .num_resources = ARRAY_SIZE(twi_resources),
378 };
379
380 void __init at91_add_device_i2c(void)
381 {
382 /* pins used for TWI interface */
383 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
384 at91_set_multi_drive(AT91_PIN_PA23, 1);
385
386 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
387 at91_set_multi_drive(AT91_PIN_PA24, 1);
388
389 platform_device_register(&at91sam9260_twi_device);
390 }
391 #else
392 void __init at91_add_device_i2c(void) {}
393 #endif
394
395
396 /* --------------------------------------------------------------------
397 * SPI
398 * -------------------------------------------------------------------- */
399
400 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
401 static u64 spi_dmamask = 0xffffffffUL;
402
403 static struct resource spi0_resources[] = {
404 [0] = {
405 .start = AT91SAM9260_BASE_SPI0,
406 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
407 .flags = IORESOURCE_MEM,
408 },
409 [1] = {
410 .start = AT91SAM9260_ID_SPI0,
411 .end = AT91SAM9260_ID_SPI0,
412 .flags = IORESOURCE_IRQ,
413 },
414 };
415
416 static struct platform_device at91sam9260_spi0_device = {
417 .name = "atmel_spi",
418 .id = 0,
419 .dev = {
420 .dma_mask = &spi_dmamask,
421 .coherent_dma_mask = 0xffffffff,
422 },
423 .resource = spi0_resources,
424 .num_resources = ARRAY_SIZE(spi0_resources),
425 };
426
427 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
428
429 static struct resource spi1_resources[] = {
430 [0] = {
431 .start = AT91SAM9260_BASE_SPI1,
432 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
433 .flags = IORESOURCE_MEM,
434 },
435 [1] = {
436 .start = AT91SAM9260_ID_SPI1,
437 .end = AT91SAM9260_ID_SPI1,
438 .flags = IORESOURCE_IRQ,
439 },
440 };
441
442 static struct platform_device at91sam9260_spi1_device = {
443 .name = "atmel_spi",
444 .id = 1,
445 .dev = {
446 .dma_mask = &spi_dmamask,
447 .coherent_dma_mask = 0xffffffff,
448 },
449 .resource = spi1_resources,
450 .num_resources = ARRAY_SIZE(spi1_resources),
451 };
452
453 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
454
455 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
456 {
457 int i;
458 unsigned long cs_pin;
459 short enable_spi0 = 0;
460 short enable_spi1 = 0;
461
462 /* Choose SPI chip-selects */
463 for (i = 0; i < nr_devices; i++) {
464 if (devices[i].controller_data)
465 cs_pin = (unsigned long) devices[i].controller_data;
466 else if (devices[i].bus_num == 0)
467 cs_pin = spi0_standard_cs[devices[i].chip_select];
468 else
469 cs_pin = spi1_standard_cs[devices[i].chip_select];
470
471 if (devices[i].bus_num == 0)
472 enable_spi0 = 1;
473 else
474 enable_spi1 = 1;
475
476 /* enable chip-select pin */
477 at91_set_gpio_output(cs_pin, 1);
478
479 /* pass chip-select pin to driver */
480 devices[i].controller_data = (void *) cs_pin;
481 }
482
483 spi_register_board_info(devices, nr_devices);
484
485 /* Configure SPI bus(es) */
486 if (enable_spi0) {
487 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
488 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
489 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
490
491 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
492 platform_device_register(&at91sam9260_spi0_device);
493 }
494 if (enable_spi1) {
495 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
496 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
497 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
498
499 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
500 platform_device_register(&at91sam9260_spi1_device);
501 }
502 }
503 #else
504 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
505 #endif
506
507
508 /* --------------------------------------------------------------------
509 * LEDs
510 * -------------------------------------------------------------------- */
511
512 #if defined(CONFIG_LEDS)
513 u8 at91_leds_cpu;
514 u8 at91_leds_timer;
515
516 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
517 {
518 /* Enable GPIO to access the LEDs */
519 at91_set_gpio_output(cpu_led, 1);
520 at91_set_gpio_output(timer_led, 1);
521
522 at91_leds_cpu = cpu_led;
523 at91_leds_timer = timer_led;
524 }
525 #else
526 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
527 #endif
528
529
530 /* --------------------------------------------------------------------
531 * UART
532 * -------------------------------------------------------------------- */
533 #if defined(CONFIG_SERIAL_ATMEL)
534 static struct resource dbgu_resources[] = {
535 [0] = {
536 .start = AT91_VA_BASE_SYS + AT91_DBGU,
537 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
538 .flags = IORESOURCE_MEM,
539 },
540 [1] = {
541 .start = AT91_ID_SYS,
542 .end = AT91_ID_SYS,
543 .flags = IORESOURCE_IRQ,
544 },
545 };
546
547 static struct atmel_uart_data dbgu_data = {
548 .use_dma_tx = 0,
549 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
550 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
551 };
552
553 static struct platform_device at91sam9260_dbgu_device = {
554 .name = "atmel_usart",
555 .id = 0,
556 .dev = {
557 .platform_data = &dbgu_data,
558 .coherent_dma_mask = 0xffffffff,
559 },
560 .resource = dbgu_resources,
561 .num_resources = ARRAY_SIZE(dbgu_resources),
562 };
563
564 static inline void configure_dbgu_pins(void)
565 {
566 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
567 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
568 }
569
570 static struct resource uart0_resources[] = {
571 [0] = {
572 .start = AT91SAM9260_BASE_US0,
573 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
574 .flags = IORESOURCE_MEM,
575 },
576 [1] = {
577 .start = AT91SAM9260_ID_US0,
578 .end = AT91SAM9260_ID_US0,
579 .flags = IORESOURCE_IRQ,
580 },
581 };
582
583 static struct atmel_uart_data uart0_data = {
584 .use_dma_tx = 1,
585 .use_dma_rx = 1,
586 };
587
588 static struct platform_device at91sam9260_uart0_device = {
589 .name = "atmel_usart",
590 .id = 1,
591 .dev = {
592 .platform_data = &uart0_data,
593 .coherent_dma_mask = 0xffffffff,
594 },
595 .resource = uart0_resources,
596 .num_resources = ARRAY_SIZE(uart0_resources),
597 };
598
599 static inline void configure_usart0_pins(void)
600 {
601 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
602 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
603 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
604 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
605 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
606 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
607 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
608 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
609 }
610
611 static struct resource uart1_resources[] = {
612 [0] = {
613 .start = AT91SAM9260_BASE_US1,
614 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
615 .flags = IORESOURCE_MEM,
616 },
617 [1] = {
618 .start = AT91SAM9260_ID_US1,
619 .end = AT91SAM9260_ID_US1,
620 .flags = IORESOURCE_IRQ,
621 },
622 };
623
624 static struct atmel_uart_data uart1_data = {
625 .use_dma_tx = 1,
626 .use_dma_rx = 1,
627 };
628
629 static struct platform_device at91sam9260_uart1_device = {
630 .name = "atmel_usart",
631 .id = 2,
632 .dev = {
633 .platform_data = &uart1_data,
634 .coherent_dma_mask = 0xffffffff,
635 },
636 .resource = uart1_resources,
637 .num_resources = ARRAY_SIZE(uart1_resources),
638 };
639
640 static inline void configure_usart1_pins(void)
641 {
642 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
643 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
644 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
645 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
646 }
647
648 static struct resource uart2_resources[] = {
649 [0] = {
650 .start = AT91SAM9260_BASE_US2,
651 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
652 .flags = IORESOURCE_MEM,
653 },
654 [1] = {
655 .start = AT91SAM9260_ID_US2,
656 .end = AT91SAM9260_ID_US2,
657 .flags = IORESOURCE_IRQ,
658 },
659 };
660
661 static struct atmel_uart_data uart2_data = {
662 .use_dma_tx = 1,
663 .use_dma_rx = 1,
664 };
665
666 static struct platform_device at91sam9260_uart2_device = {
667 .name = "atmel_usart",
668 .id = 3,
669 .dev = {
670 .platform_data = &uart2_data,
671 .coherent_dma_mask = 0xffffffff,
672 },
673 .resource = uart2_resources,
674 .num_resources = ARRAY_SIZE(uart2_resources),
675 };
676
677 static inline void configure_usart2_pins(void)
678 {
679 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
680 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
681 }
682
683 static struct resource uart3_resources[] = {
684 [0] = {
685 .start = AT91SAM9260_BASE_US3,
686 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
687 .flags = IORESOURCE_MEM,
688 },
689 [1] = {
690 .start = AT91SAM9260_ID_US3,
691 .end = AT91SAM9260_ID_US3,
692 .flags = IORESOURCE_IRQ,
693 },
694 };
695
696 static struct atmel_uart_data uart3_data = {
697 .use_dma_tx = 1,
698 .use_dma_rx = 1,
699 };
700
701 static struct platform_device at91sam9260_uart3_device = {
702 .name = "atmel_usart",
703 .id = 4,
704 .dev = {
705 .platform_data = &uart3_data,
706 .coherent_dma_mask = 0xffffffff,
707 },
708 .resource = uart3_resources,
709 .num_resources = ARRAY_SIZE(uart3_resources),
710 };
711
712 static inline void configure_usart3_pins(void)
713 {
714 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
715 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
716 }
717
718 static struct resource uart4_resources[] = {
719 [0] = {
720 .start = AT91SAM9260_BASE_US4,
721 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
722 .flags = IORESOURCE_MEM,
723 },
724 [1] = {
725 .start = AT91SAM9260_ID_US4,
726 .end = AT91SAM9260_ID_US4,
727 .flags = IORESOURCE_IRQ,
728 },
729 };
730
731 static struct atmel_uart_data uart4_data = {
732 .use_dma_tx = 1,
733 .use_dma_rx = 1,
734 };
735
736 static struct platform_device at91sam9260_uart4_device = {
737 .name = "atmel_usart",
738 .id = 5,
739 .dev = {
740 .platform_data = &uart4_data,
741 .coherent_dma_mask = 0xffffffff,
742 },
743 .resource = uart4_resources,
744 .num_resources = ARRAY_SIZE(uart4_resources),
745 };
746
747 static inline void configure_usart4_pins(void)
748 {
749 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
750 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
751 }
752
753 static struct resource uart5_resources[] = {
754 [0] = {
755 .start = AT91SAM9260_BASE_US5,
756 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
757 .flags = IORESOURCE_MEM,
758 },
759 [1] = {
760 .start = AT91SAM9260_ID_US5,
761 .end = AT91SAM9260_ID_US5,
762 .flags = IORESOURCE_IRQ,
763 },
764 };
765
766 static struct atmel_uart_data uart5_data = {
767 .use_dma_tx = 1,
768 .use_dma_rx = 1,
769 };
770
771 static struct platform_device at91sam9260_uart5_device = {
772 .name = "atmel_usart",
773 .id = 6,
774 .dev = {
775 .platform_data = &uart5_data,
776 .coherent_dma_mask = 0xffffffff,
777 },
778 .resource = uart5_resources,
779 .num_resources = ARRAY_SIZE(uart5_resources),
780 };
781
782 static inline void configure_usart5_pins(void)
783 {
784 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
785 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
786 }
787
788 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
789 struct platform_device *atmel_default_console_device; /* the serial console device */
790
791 void __init at91_init_serial(struct at91_uart_config *config)
792 {
793 int i;
794
795 /* Fill in list of supported UARTs */
796 for (i = 0; i < config->nr_tty; i++) {
797 switch (config->tty_map[i]) {
798 case 0:
799 configure_usart0_pins();
800 at91_uarts[i] = &at91sam9260_uart0_device;
801 at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
802 break;
803 case 1:
804 configure_usart1_pins();
805 at91_uarts[i] = &at91sam9260_uart1_device;
806 at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
807 break;
808 case 2:
809 configure_usart2_pins();
810 at91_uarts[i] = &at91sam9260_uart2_device;
811 at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
812 break;
813 case 3:
814 configure_usart3_pins();
815 at91_uarts[i] = &at91sam9260_uart3_device;
816 at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
817 break;
818 case 4:
819 configure_usart4_pins();
820 at91_uarts[i] = &at91sam9260_uart4_device;
821 at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
822 break;
823 case 5:
824 configure_usart5_pins();
825 at91_uarts[i] = &at91sam9260_uart5_device;
826 at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
827 break;
828 case 6:
829 configure_dbgu_pins();
830 at91_uarts[i] = &at91sam9260_dbgu_device;
831 at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
832 break;
833 default:
834 continue;
835 }
836 at91_uarts[i]->id = i; /* update ID number to mapped ID */
837 }
838
839 /* Set serial console device */
840 if (config->console_tty < ATMEL_MAX_UART)
841 atmel_default_console_device = at91_uarts[config->console_tty];
842 if (!atmel_default_console_device)
843 printk(KERN_INFO "AT91: No default serial console defined.\n");
844 }
845
846 void __init at91_add_device_serial(void)
847 {
848 int i;
849
850 for (i = 0; i < ATMEL_MAX_UART; i++) {
851 if (at91_uarts[i])
852 platform_device_register(at91_uarts[i]);
853 }
854 }
855 #else
856 void __init at91_init_serial(struct at91_uart_config *config) {}
857 void __init at91_add_device_serial(void) {}
858 #endif
859
860
861 /* -------------------------------------------------------------------- */
862 /*
863 * These devices are always present and don't need any board-specific
864 * setup.
865 */
866 static int __init at91_add_standard_devices(void)
867 {
868 return 0;
869 }
870
871 arch_initcall(at91_add_standard_devices);
Linux with added FPC-III support