arch/arm/mach-at91/at91sam9261.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9261.c
   3  *
   4  *  Copyright (C) 2005 SAN People
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #include <linux/module.h>
  14
  15 #include <asm/mach/arch.h>
  16 #include <asm/mach/map.h>
  17 #include <asm/arch/at91sam9261.h>
  18 #include <asm/arch/at91_pmc.h>
  19 #include <asm/arch/at91_rstc.h>
  20
  21 #include "generic.h"
  22 #include "clock.h"
  23
  24 static struct map_desc at91sam9261_io_desc[] __initdata = {
  25         {
  26                 .virtual        = AT91_VA_BASE_SYS,
  27                 .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  28                 .length         = SZ_16K,
  29                 .type           = MT_DEVICE,
  30         }, {
  31                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
  32                 .pfn            = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
  33                 .length         = AT91SAM9261_SRAM_SIZE,
  34                 .type           = MT_DEVICE,
  35         },
  36 };
  37
  38 /* --------------------------------------------------------------------
  39  *  Clocks
  40  * -------------------------------------------------------------------- */
  41
  42 /*
  43  * The peripheral clocks.
  44  */
  45 static struct clk pioA_clk = {
  46         .name           = "pioA_clk",
  47         .pmc_mask       = 1 << AT91SAM9261_ID_PIOA,
  48         .type           = CLK_TYPE_PERIPHERAL,
  49 };
  50 static struct clk pioB_clk = {
  51         .name           = "pioB_clk",
  52         .pmc_mask       = 1 << AT91SAM9261_ID_PIOB,
  53         .type           = CLK_TYPE_PERIPHERAL,
  54 };
  55 static struct clk pioC_clk = {
  56         .name           = "pioC_clk",
  57         .pmc_mask       = 1 << AT91SAM9261_ID_PIOC,
  58         .type           = CLK_TYPE_PERIPHERAL,
  59 };
  60 static struct clk usart0_clk = {
  61         .name           = "usart0_clk",
  62         .pmc_mask       = 1 << AT91SAM9261_ID_US0,
  63         .type           = CLK_TYPE_PERIPHERAL,
  64 };
  65 static struct clk usart1_clk = {
  66         .name           = "usart1_clk",
  67         .pmc_mask       = 1 << AT91SAM9261_ID_US1,
  68         .type           = CLK_TYPE_PERIPHERAL,
  69 };
  70 static struct clk usart2_clk = {
  71         .name           = "usart2_clk",
  72         .pmc_mask       = 1 << AT91SAM9261_ID_US2,
  73         .type           = CLK_TYPE_PERIPHERAL,
  74 };
  75 static struct clk mmc_clk = {
  76         .name           = "mci_clk",
  77         .pmc_mask       = 1 << AT91SAM9261_ID_MCI,
  78         .type           = CLK_TYPE_PERIPHERAL,
  79 };
  80 static struct clk udc_clk = {
  81         .name           = "udc_clk",
  82         .pmc_mask       = 1 << AT91SAM9261_ID_UDP,
  83         .type           = CLK_TYPE_PERIPHERAL,
  84 };
  85 static struct clk twi_clk = {
  86         .name           = "twi_clk",
  87         .pmc_mask       = 1 << AT91SAM9261_ID_TWI,
  88         .type           = CLK_TYPE_PERIPHERAL,
  89 };
  90 static struct clk spi0_clk = {
  91         .name           = "spi0_clk",
  92         .pmc_mask       = 1 << AT91SAM9261_ID_SPI0,
  93         .type           = CLK_TYPE_PERIPHERAL,
  94 };
  95 static struct clk spi1_clk = {
  96         .name           = "spi1_clk",
  97         .pmc_mask       = 1 << AT91SAM9261_ID_SPI1,
  98         .type           = CLK_TYPE_PERIPHERAL,
  99 };
 100 static struct clk tc0_clk = {
 101         .name           = "tc0_clk",
 102         .pmc_mask       = 1 << AT91SAM9261_ID_TC0,
 103         .type           = CLK_TYPE_PERIPHERAL,
 104 };
 105 static struct clk tc1_clk = {
 106         .name           = "tc1_clk",
 107         .pmc_mask       = 1 << AT91SAM9261_ID_TC1,
 108         .type           = CLK_TYPE_PERIPHERAL,
 109 };
 110 static struct clk tc2_clk = {
 111         .name           = "tc2_clk",
 112         .pmc_mask       = 1 << AT91SAM9261_ID_TC2,
 113         .type           = CLK_TYPE_PERIPHERAL,
 114 };
 115 static struct clk ohci_clk = {
 116         .name           = "ohci_clk",
 117         .pmc_mask       = 1 << AT91SAM9261_ID_UHP,
 118         .type           = CLK_TYPE_PERIPHERAL,
 119 };
 120 static struct clk lcdc_clk = {
 121         .name           = "lcdc_clk",
 122         .pmc_mask       = 1 << AT91SAM9261_ID_LCDC,
 123         .type           = CLK_TYPE_PERIPHERAL,
 124 };
 125
 126 static struct clk *periph_clocks[] __initdata = {
 127         &pioA_clk,
 128         &pioB_clk,
 129         &pioC_clk,
 130         &usart0_clk,
 131         &usart1_clk,
 132         &usart2_clk,
 133         &mmc_clk,
 134         &udc_clk,
 135         &twi_clk,
 136         &spi0_clk,
 137         &spi1_clk,
 138         // ssc 0 .. ssc2
 139         &tc0_clk,
 140         &tc1_clk,
 141         &tc2_clk,
 142         &ohci_clk,
 143         &lcdc_clk,
 144         // irq0 .. irq2
 145 };
 146
 147 /*
 148  * The four programmable clocks.
 149  * You must configure pin multiplexing to bring these signals out.
 150  */
 151 static struct clk pck0 = {
 152         .name           = "pck0",
 153         .pmc_mask       = AT91_PMC_PCK0,
 154         .type           = CLK_TYPE_PROGRAMMABLE,
 155         .id             = 0,
 156 };
 157 static struct clk pck1 = {
 158         .name           = "pck1",
 159         .pmc_mask       = AT91_PMC_PCK1,
 160         .type           = CLK_TYPE_PROGRAMMABLE,
 161         .id             = 1,
 162 };
 163 static struct clk pck2 = {
 164         .name           = "pck2",
 165         .pmc_mask       = AT91_PMC_PCK2,
 166         .type           = CLK_TYPE_PROGRAMMABLE,
 167         .id             = 2,
 168 };
 169 static struct clk pck3 = {
 170         .name           = "pck3",
 171         .pmc_mask       = AT91_PMC_PCK3,
 172         .type           = CLK_TYPE_PROGRAMMABLE,
 173         .id             = 3,
 174 };
 175
 176 /* HClocks */
 177 static struct clk hck0 = {
 178         .name           = "hck0",
 179         .pmc_mask       = AT91_PMC_HCK0,
 180         .type           = CLK_TYPE_SYSTEM,
 181         .id             = 0,
 182 };
 183 static struct clk hck1 = {
 184         .name           = "hck1",
 185         .pmc_mask       = AT91_PMC_HCK1,
 186         .type           = CLK_TYPE_SYSTEM,
 187         .id             = 1,
 188 };
 189
 190 static void __init at91sam9261_register_clocks(void)
 191 {
 192         int i;
 193
 194         for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 195                 clk_register(periph_clocks[i]);
 196
 197         clk_register(&pck0);
 198         clk_register(&pck1);
 199         clk_register(&pck2);
 200         clk_register(&pck3);
 201
 202         clk_register(&hck0);
 203         clk_register(&hck1);
 204 }
 205
 206 /* --------------------------------------------------------------------
 207  *  GPIO
 208  * -------------------------------------------------------------------- */
 209
 210 static struct at91_gpio_bank at91sam9261_gpio[] = {
 211         {
 212                 .id             = AT91SAM9261_ID_PIOA,
 213                 .offset         = AT91_PIOA,
 214                 .clock          = &pioA_clk,
 215         }, {
 216                 .id             = AT91SAM9261_ID_PIOB,
 217                 .offset         = AT91_PIOB,
 218                 .clock          = &pioB_clk,
 219         }, {
 220                 .id             = AT91SAM9261_ID_PIOC,
 221                 .offset         = AT91_PIOC,
 222                 .clock          = &pioC_clk,
 223         }
 224 };
 225
 226 static void at91sam9261_reset(void)
 227 {
 228         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 229 }
 230
 231
 232 /* --------------------------------------------------------------------
 233  *  AT91SAM9261 processor initialization
 234  * -------------------------------------------------------------------- */
 235
 236 void __init at91sam9261_initialize(unsigned long main_clock)
 237 {
 238         /* Map peripherals */
 239         iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
 240
 241         at91_arch_reset = at91sam9261_reset;
 242         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
 243                         | (1 << AT91SAM9261_ID_IRQ2);
 244
 245         /* Init clock subsystem */
 246         at91_clock_init(main_clock);
 247
 248         /* Register the processor-specific clocks */
 249         at91sam9261_register_clocks();
 250
 251         /* Register GPIO subsystem */
 252         at91_gpio_init(at91sam9261_gpio, 3);
 253 }
 254
 255 /* --------------------------------------------------------------------
 256  *  Interrupt initialization
 257  * -------------------------------------------------------------------- */
 258
 259 /*
 260  * The default interrupt priority levels (0 = lowest, 7 = highest).
 261  */
 262 static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
 263         7,      /* Advanced Interrupt Controller */
 264         7,      /* System Peripherals */
 265         0,      /* Parallel IO Controller A */
 266         0,      /* Parallel IO Controller B */
 267         0,      /* Parallel IO Controller C */
 268         0,
 269         6,      /* USART 0 */
 270         6,      /* USART 1 */
 271         6,      /* USART 2 */
 272         0,      /* Multimedia Card Interface */
 273         4,      /* USB Device Port */
 274         0,      /* Two-Wire Interface */
 275         6,      /* Serial Peripheral Interface 0 */
 276         6,      /* Serial Peripheral Interface 1 */
 277         5,      /* Serial Synchronous Controller 0 */
 278         5,      /* Serial Synchronous Controller 1 */
 279         5,      /* Serial Synchronous Controller 2 */
 280         0,      /* Timer Counter 0 */
 281         0,      /* Timer Counter 1 */
 282         0,      /* Timer Counter 2 */
 283         3,      /* USB Host port */
 284         3,      /* LCD Controller */
 285         0,
 286         0,
 287         0,
 288         0,
 289         0,
 290         0,
 291         0,
 292         0,      /* Advanced Interrupt Controller */
 293         0,      /* Advanced Interrupt Controller */
 294         0,      /* Advanced Interrupt Controller */
 295 };
 296
 297 void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
 298 {
 299         if (!priority)
 300                 priority = at91sam9261_default_irq_priority;
 301
 302         /* Initialize the AIC interrupt controller */
 303         at91_aic_init(priority);
 304
 305         /* Enable GPIO interrupts */
 306         at91_gpio_irq_setup();
 307 }