1 /* linux/arch/arm/mach-s3c2410/mach-qt2410.c
3 * Copyright (C) 2006 by OpenMoko, Inc.
4 * Author: Harald Welte <laforge@openmoko.org>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/interrupt.h>
27 #include <linux/list.h>
28 #include <linux/timer.h>
29 #include <linux/init.h>
30 #include <linux/platform_device.h>
31 #include <linux/serial_core.h>
32 #include <linux/mmc/protocol.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/spi_bitbang.h>
36 #include <linux/mtd/mtd.h>
37 #include <linux/mtd/nand.h>
38 #include <linux/mtd/nand_ecc.h>
39 #include <linux/mtd/partitions.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/map.h>
43 #include <asm/mach/irq.h>
45 #include <asm/hardware.h>
48 #include <asm/mach-types.h>
50 #include <asm/arch/regs-gpio.h>
51 #include <asm/arch/leds-gpio.h>
52 #include <asm/arch/regs-serial.h>
53 #include <asm/arch/fb.h>
54 #include <asm/arch/nand.h>
55 #include <asm/arch/udc.h>
56 #include <asm/arch/spi.h>
57 #include <asm/arch/spi-gpio.h>
59 #include <asm/plat-s3c24xx/common-smdk.h>
60 #include <asm/plat-s3c24xx/devs.h>
61 #include <asm/plat-s3c24xx/cpu.h>
62 #include <asm/plat-s3c24xx/pm.h>
64 static struct map_desc qt2410_iodesc
[] __initdata
= {
65 { 0xe0000000, __phys_to_pfn(S3C2410_CS3
+0x01000000), SZ_1M
, MT_DEVICE
}
68 #define UCON S3C2410_UCON_DEFAULT
69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
72 static struct s3c2410_uartcfg smdk2410_uartcfgs
[] = {
98 /* Configuration for 640x480 SHARP LQ080V3DG01 */
99 static struct s3c2410fb_mach_info qt2410_biglcd_cfg __initdata
= {
102 .lcdcon1
= S3C2410_LCDCON1_TFT16BPP
|
103 S3C2410_LCDCON1_TFT
|
104 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
106 .lcdcon2
= S3C2410_LCDCON2_VBPD(18) | /* 19 */
107 S3C2410_LCDCON2_LINEVAL(479) |
108 S3C2410_LCDCON2_VFPD(10) | /* 11 */
109 S3C2410_LCDCON2_VSPW(14), /* 15 */
111 .lcdcon3
= S3C2410_LCDCON3_HBPD(43) | /* 44 */
112 S3C2410_LCDCON3_HOZVAL(639) | /* 640 */
113 S3C2410_LCDCON3_HFPD(115), /* 116 */
115 .lcdcon4
= S3C2410_LCDCON4_MVAL(0) |
116 S3C2410_LCDCON4_HSPW(95), /* 96 */
118 .lcdcon5
= S3C2410_LCDCON5_FRM565
|
119 S3C2410_LCDCON5_INVVLINE
|
120 S3C2410_LCDCON5_INVVFRAME
|
121 S3C2410_LCDCON5_PWREN
|
122 S3C2410_LCDCON5_HWSWP
,
125 .lpcsel
= ((0xCE6) & ~7) | 1<<4,
149 /* Configuration for 480x640 toppoly TD028TTEC1 */
150 static struct s3c2410fb_mach_info qt2410_prodlcd_cfg __initdata
= {
153 .lcdcon1
= S3C2410_LCDCON1_TFT16BPP
|
154 S3C2410_LCDCON1_TFT
|
155 S3C2410_LCDCON1_CLKVAL(0x01), /* HCLK/4 */
157 .lcdcon2
= S3C2410_LCDCON2_VBPD(1) | /* 2 */
158 S3C2410_LCDCON2_LINEVAL(639) |/* 640 */
159 S3C2410_LCDCON2_VFPD(3) | /* 4 */
160 S3C2410_LCDCON2_VSPW(1), /* 2 */
162 .lcdcon3
= S3C2410_LCDCON3_HBPD(7) | /* 8 */
163 S3C2410_LCDCON3_HOZVAL(479) | /* 479 */
164 S3C2410_LCDCON3_HFPD(23), /* 24 */
166 .lcdcon4
= S3C2410_LCDCON4_MVAL(0) |
167 S3C2410_LCDCON4_HSPW(7), /* 8 */
169 .lcdcon5
= S3C2410_LCDCON5_FRM565
|
170 S3C2410_LCDCON5_INVVLINE
|
171 S3C2410_LCDCON5_INVVFRAME
|
172 S3C2410_LCDCON5_PWREN
|
173 S3C2410_LCDCON5_HWSWP
,
176 .lpcsel
= ((0xCE6) & ~7) | 1<<4,
200 /* Config for 240x320 LCD */
201 static struct s3c2410fb_mach_info qt2410_lcd_cfg __initdata
= {
204 .lcdcon1
= S3C2410_LCDCON1_TFT16BPP
|
205 S3C2410_LCDCON1_TFT
|
206 S3C2410_LCDCON1_CLKVAL(0x04),
208 .lcdcon2
= S3C2410_LCDCON2_VBPD(1) |
209 S3C2410_LCDCON2_LINEVAL(319) |
210 S3C2410_LCDCON2_VFPD(6) |
211 S3C2410_LCDCON2_VSPW(3),
213 .lcdcon3
= S3C2410_LCDCON3_HBPD(12) |
214 S3C2410_LCDCON3_HOZVAL(239) |
215 S3C2410_LCDCON3_HFPD(7),
217 .lcdcon4
= S3C2410_LCDCON4_MVAL(0) |
218 S3C2410_LCDCON4_HSPW(3),
220 .lcdcon5
= S3C2410_LCDCON5_FRM565
|
221 S3C2410_LCDCON5_INVVLINE
|
222 S3C2410_LCDCON5_INVVFRAME
|
223 S3C2410_LCDCON5_PWREN
|
224 S3C2410_LCDCON5_HWSWP
,
227 .lpcsel
= ((0xCE6) & ~7) | 1<<4,
253 static struct resource qt2410_cs89x0_resources
[] = {
256 .end
= 0x19000000 + 16,
257 .flags
= IORESOURCE_MEM
,
262 .flags
= IORESOURCE_IRQ
,
266 static struct platform_device qt2410_cs89x0
= {
267 .name
= "cirrus-cs89x0",
268 .num_resources
= ARRAY_SIZE(qt2410_cs89x0_resources
),
269 .resource
= qt2410_cs89x0_resources
,
274 static struct s3c24xx_led_platdata qt2410_pdata_led
= {
275 .gpio
= S3C2410_GPB0
,
276 .flags
= S3C24XX_LEDF_ACTLOW
| S3C24XX_LEDF_TRISTATE
,
278 .def_trigger
= "timer",
281 static struct platform_device qt2410_led
= {
282 .name
= "s3c24xx_led",
285 .platform_data
= &qt2410_pdata_led
,
291 static void spi_gpio_cs(struct s3c2410_spigpio_info
*spi
, int cs
)
294 case BITBANG_CS_ACTIVE
:
295 s3c2410_gpio_setpin(S3C2410_GPB5
, 0);
297 case BITBANG_CS_INACTIVE
:
298 s3c2410_gpio_setpin(S3C2410_GPB5
, 1);
303 static struct s3c2410_spigpio_info spi_gpio_cfg
= {
304 .pin_clk
= S3C2410_GPG7
,
305 .pin_mosi
= S3C2410_GPG6
,
306 .pin_miso
= S3C2410_GPG5
,
307 .chip_select
= &spi_gpio_cs
,
311 static struct platform_device qt2410_spi
= {
312 .name
= "s3c24xx-spi-gpio",
315 .platform_data
= &spi_gpio_cfg
,
321 static struct platform_device
*qt2410_devices
[] __initdata
= {
328 &s3c_device_usbgadget
,
334 static struct s3c24xx_board qt2410_board __initdata
= {
335 .devices
= qt2410_devices
,
336 .devices_count
= ARRAY_SIZE(qt2410_devices
)
339 static struct mtd_partition qt2410_nand_part
[] = {
346 .name
= "U-Boot environment",
367 static struct s3c2410_nand_set qt2410_nand_sets
[] = {
371 .nr_partitions
= ARRAY_SIZE(qt2410_nand_part
),
372 .partitions
= qt2410_nand_part
,
376 /* choose a set of timings which should suit most 512Mbit
380 static struct s3c2410_platform_nand qt2410_nand_info
= {
384 .nr_sets
= ARRAY_SIZE(qt2410_nand_sets
),
385 .sets
= qt2410_nand_sets
,
390 static struct s3c2410_udc_mach_info qt2410_udc_cfg
= {
393 static char tft_type
= 's';
395 static int __init
qt2410_tft_setup(char *str
)
401 __setup("tft=", qt2410_tft_setup
);
403 static void __init
qt2410_map_io(void)
405 s3c24xx_init_io(qt2410_iodesc
, ARRAY_SIZE(qt2410_iodesc
));
406 s3c24xx_init_clocks(12*1000*1000);
407 s3c24xx_init_uarts(smdk2410_uartcfgs
, ARRAY_SIZE(smdk2410_uartcfgs
));
408 s3c24xx_set_board(&qt2410_board
);
411 static void __init
qt2410_machine_init(void)
413 s3c_device_nand
.dev
.platform_data
= &qt2410_nand_info
;
416 case 'p': /* production */
417 s3c24xx_fb_set_platdata(&qt2410_prodlcd_cfg
);
420 s3c24xx_fb_set_platdata(&qt2410_biglcd_cfg
);
422 case 's': /* small */
424 s3c24xx_fb_set_platdata(&qt2410_lcd_cfg
);
428 s3c2410_gpio_cfgpin(S3C2410_GPB0
, S3C2410_GPIO_OUTPUT
);
429 s3c2410_gpio_setpin(S3C2410_GPB0
, 1);
431 s3c24xx_udc_set_platdata(&qt2410_udc_cfg
);
433 s3c2410_gpio_cfgpin(S3C2410_GPB5
, S3C2410_GPIO_OUTPUT
);
438 MACHINE_START(QT2410
, "QT2410")
439 .phys_io
= S3C2410_PA_UART
,
440 .io_pg_offst
= (((u32
)S3C24XX_VA_UART
) >> 18) & 0xfffc,
441 .boot_params
= S3C2410_SDRAM_PA
+ 0x100,
442 .map_io
= qt2410_map_io
,
443 .init_irq
= s3c24xx_init_irq
,
444 .init_machine
= qt2410_machine_init
,
445 .timer
= &s3c24xx_timer
,