arch/arm/mach-s3c2412/s3c2412.c

   1 /* linux/arch/arm/mach-s3c2412/s3c2412.c
   2  *
   3  * Copyright (c) 2006 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * http://armlinux.simtec.co.uk/.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/types.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/list.h>
  17 #include <linux/timer.h>
  18 #include <linux/init.h>
  19 #include <linux/sysdev.h>
  20 #include <linux/serial_core.h>
  21 #include <linux/platform_device.h>
  22
  23 #include <asm/mach/arch.h>
  24 #include <asm/mach/map.h>
  25 #include <asm/mach/irq.h>
  26
  27 #include <asm/hardware.h>
  28 #include <asm/proc-fns.h>
  29 #include <asm/io.h>
  30 #include <asm/irq.h>
  31
  32 #include <asm/arch/idle.h>
  33
  34 #include <asm/arch/regs-clock.h>
  35 #include <asm/arch/regs-serial.h>
  36 #include <asm/arch/regs-power.h>
  37 #include <asm/arch/regs-gpio.h>
  38 #include <asm/arch/regs-gpioj.h>
  39 #include <asm/arch/regs-dsc.h>
  40
  41 #include <asm/plat-s3c24xx/s3c2412.h>
  42 #include <asm/plat-s3c24xx/cpu.h>
  43 #include <asm/plat-s3c24xx/devs.h>
  44 #include <asm/plat-s3c24xx/clock.h>
  45 #include <asm/plat-s3c24xx/pm.h>
  46
  47 #ifndef CONFIG_CPU_S3C2412_ONLY
  48 void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
  49
  50 static inline void s3c2412_init_gpio2(void)
  51 {
  52         s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10;
  53 }
  54 #else
  55 #define s3c2412_init_gpio2() do { } while(0)
  56 #endif
  57
  58 /* Initial IO mappings */
  59
  60 static struct map_desc s3c2412_iodesc[] __initdata = {
  61         IODESC_ENT(CLKPWR),
  62         IODESC_ENT(LCD),
  63         IODESC_ENT(TIMER),
  64         IODESC_ENT(WATCHDOG),
  65 };
  66
  67 /* uart registration process */
  68
  69 void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  70 {
  71         s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no);
  72
  73         /* rename devices that are s3c2412/s3c2413 specific */
  74         s3c_device_sdi.name  = "s3c2412-sdi";
  75         s3c_device_lcd.name  = "s3c2412-lcd";
  76         s3c_device_nand.name = "s3c2412-nand";
  77 }
  78
  79 /* s3c2412_idle
  80  *
  81  * use the standard idle call by ensuring the idle mode
  82  * in power config, then issuing the idle co-processor
  83  * instruction
  84 */
  85
  86 static void s3c2412_idle(void)
  87 {
  88         unsigned long tmp;
  89
  90         /* ensure our idle mode is to go to idle */
  91
  92         tmp = __raw_readl(S3C2412_PWRCFG);
  93         tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK;
  94         tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE;
  95         __raw_writel(tmp, S3C2412_PWRCFG);
  96
  97         cpu_do_idle();
  98 }
  99
 100 /* s3c2412_map_io
 101  *
 102  * register the standard cpu IO areas, and any passed in from the
 103  * machine specific initialisation.
 104 */
 105
 106 void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
 107 {
 108         /* move base of IO */
 109
 110         s3c2412_init_gpio2();
 111
 112         /* set our idle function */
 113
 114         s3c24xx_idle = s3c2412_idle;
 115
 116         /* register our io-tables */
 117
 118         iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
 119         iotable_init(mach_desc, mach_size);
 120 }
 121
 122 void __init s3c2412_init_clocks(int xtal)
 123 {
 124         unsigned long tmp;
 125         unsigned long fclk;
 126         unsigned long hclk;
 127         unsigned long pclk;
 128
 129         /* now we've got our machine bits initialised, work out what
 130          * clocks we've got */
 131
 132         fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
 133
 134         tmp = __raw_readl(S3C2410_CLKDIVN);
 135
 136         /* work out clock scalings */
 137
 138         hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1);
 139         hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1);
 140         pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1);
 141
 142         /* print brieft summary of clocks, etc */
 143
 144         printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
 145                print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
 146
 147         /* initialise the clocks here, to allow other things like the
 148          * console to use them
 149          */
 150
 151         s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
 152         s3c2412_baseclk_add();
 153 }
 154
 155 /* need to register class before we actually register the device, and
 156  * we also need to ensure that it has been initialised before any of the
 157  * drivers even try to use it (even if not on an s3c2412 based system)
 158  * as a driver which may support both 2410 and 2440 may try and use it.
 159 */
 160
 161 struct sysdev_class s3c2412_sysclass = {
 162         set_kset_name("s3c2412-core"),
 163 };
 164
 165 static int __init s3c2412_core_init(void)
 166 {
 167         return sysdev_class_register(&s3c2412_sysclass);
 168 }
 169
 170 core_initcall(s3c2412_core_init);
 171
 172 static struct sys_device s3c2412_sysdev = {
 173         .cls            = &s3c2412_sysclass,
 174 };
 175
 176 int __init s3c2412_init(void)
 177 {
 178         printk("S3C2412: Initialising architecture\n");
 179
 180         return sysdev_register(&s3c2412_sysdev);
 181 }