2 * linux/arch/m32r/mm/fault.c
4 * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
5 * Copyright (c) 2004 Naoto Sugai, NIIBE Yutaka
7 * Some code taken from i386 version.
8 * Copyright (C) 1995 Linus Torvalds
11 #include <linux/signal.h>
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
14 #include <linux/errno.h>
15 #include <linux/string.h>
16 #include <linux/types.h>
17 #include <linux/ptrace.h>
18 #include <linux/mman.h>
20 #include <linux/smp.h>
21 #include <linux/smp_lock.h>
22 #include <linux/interrupt.h>
23 #include <linux/init.h>
24 #include <linux/tty.h>
25 #include <linux/vt_kern.h> /* For unblank_screen() */
26 #include <linux/highmem.h>
27 #include <linux/module.h>
30 #include <asm/system.h>
31 #include <asm/uaccess.h>
32 #include <asm/hardirq.h>
33 #include <asm/mmu_context.h>
34 #include <asm/tlbflush.h>
36 extern void die(const char *, struct pt_regs
*, long);
39 asmlinkage
unsigned int tlb_entry_i_dat
;
40 asmlinkage
unsigned int tlb_entry_d_dat
;
41 #define tlb_entry_i tlb_entry_i_dat
42 #define tlb_entry_d tlb_entry_d_dat
44 unsigned int tlb_entry_i_dat
[NR_CPUS
];
45 unsigned int tlb_entry_d_dat
[NR_CPUS
];
46 #define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
47 #define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
50 extern void init_tlb(void);
52 /*======================================================================*
54 *======================================================================*
55 * This routine handles page faults. It determines the address,
56 * and the problem, and then passes it off to one of the appropriate
61 * error_code : See below
62 * address : M32R MMU MDEVA reg. (Operand ACE)
63 * : M32R BPC reg. (Instruction ACE)
66 * bit 0 == 0 means no page found, 1 means protection fault
67 * bit 1 == 0 means read, 1 means write
68 * bit 2 == 0 means kernel, 1 means user-mode
69 * bit 3 == 0 means data, 1 means instruction
70 *======================================================================*/
71 #define ACE_PROTECTION 1
73 #define ACE_USERMODE 4
74 #define ACE_INSTRUCTION 8
76 asmlinkage
void do_page_fault(struct pt_regs
*regs
, unsigned long error_code
,
77 unsigned long address
)
79 struct task_struct
*tsk
;
81 struct vm_area_struct
* vma
;
82 unsigned long page
, addr
;
87 * If BPSW IE bit enable --> set PSW IE bit
89 if (regs
->psw
& M32R_PSW_BIE
)
94 info
.si_code
= SEGV_MAPERR
;
97 * We fault-in kernel-space virtual memory on-demand. The
98 * 'reference' page table is init_mm.pgd.
100 * NOTE! We MUST NOT take any locks for this case. We may
101 * be in an interrupt or a critical region, and should
102 * only copy the information from the master page table,
105 * This verifies that the fault happens in kernel space
106 * (error_code & ACE_USERMODE) == 0, and that the fault was not a
107 * protection error (error_code & ACE_PROTECTION) == 0.
109 if (address
>= TASK_SIZE
&& !(error_code
& ACE_USERMODE
))
115 * If we're in an interrupt or have no user context or are running in an
116 * atomic region then we must not take the fault..
118 if (in_atomic() || !mm
)
119 goto bad_area_nosemaphore
;
121 /* When running in the kernel we expect faults to occur only to
122 * addresses in user space. All other faults represent errors in the
123 * kernel and should generate an OOPS. Unfortunatly, in the case of an
124 * erroneous fault occurring in a code path which already holds mmap_sem
125 * we will deadlock attempting to validate the fault against the
126 * address space. Luckily the kernel only validly references user
127 * space from well defined areas of code, which are listed in the
130 * As the vast majority of faults will be valid we will only perform
131 * the source reference check when there is a possibilty of a deadlock.
132 * Attempt to lock the address space, if we cannot we then validate the
133 * source. If this is invalid we can skip the address space check,
134 * thus avoiding the deadlock.
136 if (!down_read_trylock(&mm
->mmap_sem
)) {
137 if ((error_code
& ACE_USERMODE
) == 0 &&
138 !search_exception_tables(regs
->psw
))
139 goto bad_area_nosemaphore
;
140 down_read(&mm
->mmap_sem
);
143 vma
= find_vma(mm
, address
);
146 if (vma
->vm_start
<= address
)
148 if (!(vma
->vm_flags
& VM_GROWSDOWN
))
151 if (error_code
& ACE_USERMODE
) {
153 * accessing the stack below "spu" is always a bug.
154 * The "+ 4" is there due to the push instruction
155 * doing pre-decrement on the stack and that
156 * doesn't show up until later..
158 if (address
+ 4 < regs
->spu
)
162 if (expand_stack(vma
, address
))
165 * Ok, we have a good vm_area for this memory access, so
169 info
.si_code
= SEGV_ACCERR
;
171 switch (error_code
& (ACE_WRITE
|ACE_PROTECTION
)) {
172 default: /* 3: write, present */
174 case ACE_WRITE
: /* write, not present */
175 if (!(vma
->vm_flags
& VM_WRITE
))
179 case ACE_PROTECTION
: /* read, present */
180 case 0: /* read, not present */
181 if (!(vma
->vm_flags
& (VM_READ
| VM_EXEC
)))
186 * For instruction access exception, check if the area is executable
188 if ((error_code
& ACE_INSTRUCTION
) && !(vma
->vm_flags
& VM_EXEC
))
193 * If for any reason at all we couldn't handle the fault,
194 * make sure we exit gracefully rather than endlessly redo
197 addr
= (address
& PAGE_MASK
);
198 set_thread_fault_code(error_code
);
199 switch (handle_mm_fault(mm
, vma
, addr
, write
)) {
206 case VM_FAULT_SIGBUS
:
213 set_thread_fault_code(0);
214 up_read(&mm
->mmap_sem
);
218 * Something tried to access memory that isn't in our memory map..
219 * Fix it, but check if it's kernel or user first..
222 up_read(&mm
->mmap_sem
);
224 bad_area_nosemaphore
:
225 /* User mode accesses just cause a SIGSEGV */
226 if (error_code
& ACE_USERMODE
) {
227 tsk
->thread
.address
= address
;
228 tsk
->thread
.error_code
= error_code
| (address
>= TASK_SIZE
);
229 tsk
->thread
.trap_no
= 14;
230 info
.si_signo
= SIGSEGV
;
232 /* info.si_code has been set above */
233 info
.si_addr
= (void __user
*)address
;
234 force_sig_info(SIGSEGV
, &info
, tsk
);
239 /* Are we prepared to handle this kernel fault? */
240 if (fixup_exception(regs
))
244 * Oops. The kernel tried to access some bad page. We'll have to
245 * terminate things with extreme prejudice.
250 if (address
< PAGE_SIZE
)
251 printk(KERN_ALERT
"Unable to handle kernel NULL pointer dereference");
253 printk(KERN_ALERT
"Unable to handle kernel paging request");
254 printk(" at virtual address %08lx\n",address
);
255 printk(KERN_ALERT
" printing bpc:\n");
256 printk("%08lx\n", regs
->bpc
);
257 page
= *(unsigned long *)MPTB
;
258 page
= ((unsigned long *) page
)[address
>> PGDIR_SHIFT
];
259 printk(KERN_ALERT
"*pde = %08lx\n", page
);
260 if (page
& _PAGE_PRESENT
) {
262 address
&= 0x003ff000;
263 page
= ((unsigned long *) __va(page
))[address
>> PAGE_SHIFT
];
264 printk(KERN_ALERT
"*pte = %08lx\n", page
);
266 die("Oops", regs
, error_code
);
271 * We ran out of memory, or some other thing happened to us that made
272 * us unable to handle the page fault gracefully.
275 up_read(&mm
->mmap_sem
);
278 down_read(&mm
->mmap_sem
);
281 printk("VM: killing process %s\n", tsk
->comm
);
282 if (error_code
& ACE_USERMODE
)
287 up_read(&mm
->mmap_sem
);
289 /* Kernel mode? Handle exception or die */
290 if (!(error_code
& ACE_USERMODE
))
293 tsk
->thread
.address
= address
;
294 tsk
->thread
.error_code
= error_code
;
295 tsk
->thread
.trap_no
= 14;
296 info
.si_signo
= SIGBUS
;
298 info
.si_code
= BUS_ADRERR
;
299 info
.si_addr
= (void __user
*)address
;
300 force_sig_info(SIGBUS
, &info
, tsk
);
306 * Synchronize this task's top level page-table
307 * with the 'reference' page table.
309 * Do _not_ use "tsk" here. We might be inside
310 * an interrupt in the middle of a task switch..
312 int offset
= pgd_index(address
);
317 pgd
= (pgd_t
*)*(unsigned long *)MPTB
;
318 pgd
= offset
+ (pgd_t
*)pgd
;
319 pgd_k
= init_mm
.pgd
+ offset
;
321 if (!pgd_present(*pgd_k
))
325 * set_pgd(pgd, *pgd_k); here would be useless on PAE
326 * and redundant with the set_pmd() on non-PAE.
329 pmd
= pmd_offset(pgd
, address
);
330 pmd_k
= pmd_offset(pgd_k
, address
);
331 if (!pmd_present(*pmd_k
))
333 set_pmd(pmd
, *pmd_k
);
335 pte_k
= pte_offset_kernel(pmd_k
, address
);
336 if (!pte_present(*pte_k
))
339 addr
= (address
& PAGE_MASK
);
340 set_thread_fault_code(error_code
);
341 update_mmu_cache(NULL
, addr
, *pte_k
);
342 set_thread_fault_code(0);
347 /*======================================================================*
349 *======================================================================*/
350 #define TLB_MASK (NR_TLB_ENTRIES - 1)
351 #define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8))
352 #define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8))
353 void update_mmu_cache(struct vm_area_struct
*vma
, unsigned long vaddr
,
356 volatile unsigned long *entry1
, *entry2
;
357 unsigned long pte_data
, flags
;
358 unsigned int *entry_dat
;
359 int inst
= get_thread_fault_code() & ACE_INSTRUCTION
;
362 /* Ptrace may call this routine. */
363 if (vma
&& current
->active_mm
!= vma
->vm_mm
)
366 local_irq_save(flags
);
368 vaddr
= (vaddr
& PAGE_MASK
) | get_asid();
370 pte_data
= pte_val(pte
);
372 #ifdef CONFIG_CHIP_OPSP
373 entry1
= (unsigned long *)ITLB_BASE
;
374 for (i
= 0; i
< NR_TLB_ENTRIES
; i
++) {
375 if (*entry1
++ == vaddr
) {
376 set_tlb_data(entry1
, pte_data
);
381 entry2
= (unsigned long *)DTLB_BASE
;
382 for (i
= 0; i
< NR_TLB_ENTRIES
; i
++) {
383 if (*entry2
++ == vaddr
) {
384 set_tlb_data(entry2
, pte_data
);
392 * entry1: ITLB entry address
393 * entry2: DTLB entry address
395 __asm__
__volatile__ (
396 "seth %0, #high(%4) \n\t"
397 "st %2, @(%5, %0) \n\t"
399 "st %1, @(%6, %0) \n\t"
400 "add3 r4, %0, %7 \n\t"
403 "ld %1, @(%6, %0) \n\t"
409 : "=&r" (entry1
), "=&r" (entry2
)
410 : "r" (vaddr
), "r" (pte_data
), "i" (MMU_REG_BASE
),
411 "i" (MSVA_offset
), "i" (MTOP_offset
), "i" (MIDXI_offset
)
416 if ((!inst
&& entry2
>= DTLB_END
) || (inst
&& entry1
>= ITLB_END
))
420 local_irq_restore(flags
);
424 /* Valid entry not found */
427 * Update ITLB or DTLB entry
428 * entry1: TLB entry address
429 * entry2: TLB base address
432 entry2
= (unsigned long *)DTLB_BASE
;
433 entry_dat
= &tlb_entry_d
;
435 entry2
= (unsigned long *)ITLB_BASE
;
436 entry_dat
= &tlb_entry_i
;
438 entry1
= entry2
+ (((*entry_dat
- 1) & TLB_MASK
) << 1);
440 for (i
= 0 ; i
< NR_TLB_ENTRIES
; i
++) {
441 if (!(entry1
[1] & 2)) /* Valid bit check */
444 if (entry1
!= entry2
)
447 entry1
+= TLB_MASK
<< 1;
450 if (i
>= NR_TLB_ENTRIES
) { /* Empty entry not found */
451 entry1
= entry2
+ (*entry_dat
<< 1);
452 *entry_dat
= (*entry_dat
+ 1) & TLB_MASK
;
454 *entry1
++ = vaddr
; /* Set TLB tag */
455 set_tlb_data(entry1
, pte_data
);
460 /*======================================================================*
461 * flush_tlb_page() : flushes one page
462 *======================================================================*/
463 void local_flush_tlb_page(struct vm_area_struct
*vma
, unsigned long page
)
465 if (vma
->vm_mm
&& mm_context(vma
->vm_mm
) != NO_CONTEXT
) {
468 local_irq_save(flags
);
470 page
|= (mm_context(vma
->vm_mm
) & MMU_CONTEXT_ASID_MASK
);
471 __flush_tlb_page(page
);
472 local_irq_restore(flags
);
476 /*======================================================================*
477 * flush_tlb_range() : flushes a range of pages
478 *======================================================================*/
479 void local_flush_tlb_range(struct vm_area_struct
*vma
, unsigned long start
,
482 struct mm_struct
*mm
;
485 if (mm_context(mm
) != NO_CONTEXT
) {
489 local_irq_save(flags
);
490 size
= (end
- start
+ (PAGE_SIZE
- 1)) >> PAGE_SHIFT
;
491 if (size
> (NR_TLB_ENTRIES
/ 4)) { /* Too many TLB to flush */
492 mm_context(mm
) = NO_CONTEXT
;
493 if (mm
== current
->mm
)
494 activate_context(mm
);
498 asid
= mm_context(mm
) & MMU_CONTEXT_ASID_MASK
;
500 end
+= (PAGE_SIZE
- 1);
505 while (start
< end
) {
506 __flush_tlb_page(start
);
510 local_irq_restore(flags
);
514 /*======================================================================*
515 * flush_tlb_mm() : flushes the specified mm context TLB's
516 *======================================================================*/
517 void local_flush_tlb_mm(struct mm_struct
*mm
)
519 /* Invalidate all TLB of this process. */
520 /* Instead of invalidating each TLB, we get new MMU context. */
521 if (mm_context(mm
) != NO_CONTEXT
) {
524 local_irq_save(flags
);
525 mm_context(mm
) = NO_CONTEXT
;
526 if (mm
== current
->mm
)
527 activate_context(mm
);
528 local_irq_restore(flags
);
532 /*======================================================================*
533 * flush_tlb_all() : flushes all processes TLBs
534 *======================================================================*/
535 void local_flush_tlb_all(void)
539 local_irq_save(flags
);
541 local_irq_restore(flags
);
544 /*======================================================================*
546 *======================================================================*/
547 void __init
init_mmu(void)
551 mmu_context_cache
= MMU_CONTEXT_FIRST_VERSION
;
552 set_asid(mmu_context_cache
& MMU_CONTEXT_ASID_MASK
);
553 *(volatile unsigned long *)MPTB
= (unsigned long)swapper_pg_dir
;