arch/mips/mips-boards/generic/init.c

   1 /*
   2  * Copyright (C) 1999, 2000, 2004, 2005  MIPS Technologies, Inc.
   3  *      All rights reserved.
   4  *      Authors: Carsten Langgaard <carstenl@mips.com>
   5  *               Maciej W. Rozycki <macro@mips.com>
   6  *
   7  *  This program is free software; you can distribute it and/or modify it
   8  *  under the terms of the GNU General Public License (Version 2) as
   9  *  published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope it will be useful, but WITHOUT
  12  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  *  for more details.
  15  *
  16  *  You should have received a copy of the GNU General Public License along
  17  *  with this program; if not, write to the Free Software Foundation, Inc.,
  18  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  19  *
  20  * PROM library initialisation code.
  21  */
  22 #include <linux/init.h>
  23 #include <linux/string.h>
  24 #include <linux/kernel.h>
  25
  26 #include <asm/bootinfo.h>
  27 #include <asm/gt64120.h>
  28 #include <asm/io.h>
  29 #include <asm/system.h>
  30 #include <asm/cacheflush.h>
  31 #include <asm/traps.h>
  32
  33 #include <asm/mips-boards/prom.h>
  34 #include <asm/mips-boards/generic.h>
  35 #include <asm/mips-boards/bonito64.h>
  36 #include <asm/mips-boards/msc01_pci.h>
  37
  38 #include <asm/mips-boards/malta.h>
  39
  40 #ifdef CONFIG_KGDB
  41 extern int rs_kgdb_hook(int, int);
  42 extern int rs_putDebugChar(char);
  43 extern char rs_getDebugChar(void);
  44 extern int saa9730_kgdb_hook(int);
  45 extern int saa9730_putDebugChar(char);
  46 extern char saa9730_getDebugChar(void);
  47 #endif
  48
  49 int prom_argc;
  50 int *_prom_argv, *_prom_envp;
  51
  52 /*
  53  * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
  54  * This macro take care of sign extension, if running in 64-bit mode.
  55  */
  56 #define prom_envp(index) ((char *)(long)_prom_envp[(index)])
  57
  58 int init_debug = 0;
  59
  60 unsigned int mips_revision_corid;
  61
  62 /* Bonito64 system controller register base. */
  63 unsigned long _pcictrl_bonito;
  64 unsigned long _pcictrl_bonito_pcicfg;
  65
  66 /* GT64120 system controller register base */
  67 unsigned long _pcictrl_gt64120;
  68
  69 /* MIPS System controller register base */
  70 unsigned long _pcictrl_msc;
  71
  72 char *prom_getenv(char *envname)
  73 {
  74         /*
  75          * Return a pointer to the given environment variable.
  76          * In 64-bit mode: we're using 64-bit pointers, but all pointers
  77          * in the PROM structures are only 32-bit, so we need some
  78          * workarounds, if we are running in 64-bit mode.
  79          */
  80         int i, index=0;
  81
  82         i = strlen(envname);
  83
  84         while (prom_envp(index)) {
  85                 if(strncmp(envname, prom_envp(index), i) == 0) {
  86                         return(prom_envp(index+1));
  87                 }
  88                 index += 2;
  89         }
  90
  91         return NULL;
  92 }
  93
  94 static inline unsigned char str2hexnum(unsigned char c)
  95 {
  96         if (c >= '0' && c <= '9')
  97                 return c - '0';
  98         if (c >= 'a' && c <= 'f')
  99                 return c - 'a' + 10;
 100         return 0; /* foo */
 101 }
 102
 103 static inline void str2eaddr(unsigned char *ea, unsigned char *str)
 104 {
 105         int i;
 106
 107         for (i = 0; i < 6; i++) {
 108                 unsigned char num;
 109
 110                 if((*str == '.') || (*str == ':'))
 111                         str++;
 112                 num = str2hexnum(*str++) << 4;
 113                 num |= (str2hexnum(*str++));
 114                 ea[i] = num;
 115         }
 116 }
 117
 118 int get_ethernet_addr(char *ethernet_addr)
 119 {
 120         char *ethaddr_str;
 121
 122         ethaddr_str = prom_getenv("ethaddr");
 123         if (!ethaddr_str) {
 124                 printk("ethaddr not set in boot prom\n");
 125                 return -1;
 126         }
 127         str2eaddr(ethernet_addr, ethaddr_str);
 128
 129         if (init_debug > 1) {
 130                 int i;
 131                 printk("get_ethernet_addr: ");
 132                 for (i=0; i<5; i++)
 133                         printk("%02x:", (unsigned char)*(ethernet_addr+i));
 134                 printk("%02x\n", *(ethernet_addr+i));
 135         }
 136
 137         return 0;
 138 }
 139
 140 #ifdef CONFIG_SERIAL_8250_CONSOLE
 141 static void __init console_config(void)
 142 {
 143         char console_string[40];
 144         int baud = 0;
 145         char parity = '\0', bits = '\0', flow = '\0';
 146         char *s;
 147
 148         if ((strstr(prom_getcmdline(), "console=")) == NULL) {
 149                 s = prom_getenv("modetty0");
 150                 if (s) {
 151                         while (*s >= '0' && *s <= '9')
 152                                 baud = baud*10 + *s++ - '0';
 153                         if (*s == ',') s++;
 154                         if (*s) parity = *s++;
 155                         if (*s == ',') s++;
 156                         if (*s) bits = *s++;
 157                         if (*s == ',') s++;
 158                         if (*s == 'h') flow = 'r';
 159                 }
 160                 if (baud == 0)
 161                         baud = 38400;
 162                 if (parity != 'n' && parity != 'o' && parity != 'e')
 163                         parity = 'n';
 164                 if (bits != '7' && bits != '8')
 165                         bits = '8';
 166                 if (flow == '\0')
 167                         flow = 'r';
 168                 sprintf (console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
 169                 strcat (prom_getcmdline(), console_string);
 170                 pr_info("Config serial console:%s\n", console_string);
 171         }
 172 }
 173 #endif
 174
 175 #ifdef CONFIG_KGDB
 176 void __init kgdb_config (void)
 177 {
 178         extern int (*generic_putDebugChar)(char);
 179         extern char (*generic_getDebugChar)(void);
 180         char *argptr;
 181         int line, speed;
 182
 183         argptr = prom_getcmdline();
 184         if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
 185                 argptr += strlen("kgdb=ttyS");
 186                 if (*argptr != '0' && *argptr != '1')
 187                         printk("KGDB: Unknown serial line /dev/ttyS%c, "
 188                                "falling back to /dev/ttyS1\n", *argptr);
 189                 line = *argptr == '0' ? 0 : 1;
 190                 printk("KGDB: Using serial line /dev/ttyS%d for session\n", line);
 191
 192                 speed = 0;
 193                 if (*++argptr == ',')
 194                 {
 195                         int c;
 196                         while ((c = *++argptr) && ('0' <= c && c <= '9'))
 197                                 speed = speed * 10 + c - '0';
 198                 }
 199 #ifdef CONFIG_MIPS_ATLAS
 200                 if (line == 1) {
 201                         speed = saa9730_kgdb_hook(speed);
 202                         generic_putDebugChar = saa9730_putDebugChar;
 203                         generic_getDebugChar = saa9730_getDebugChar;
 204                 }
 205                 else
 206 #endif
 207                 {
 208                         speed = rs_kgdb_hook(line, speed);
 209                         generic_putDebugChar = rs_putDebugChar;
 210                         generic_getDebugChar = rs_getDebugChar;
 211                 }
 212
 213                 pr_info("KGDB: Using serial line /dev/ttyS%d at %d for "
 214                         "session, please connect your debugger\n",
 215                         line ? 1 : 0, speed);
 216
 217                 {
 218                         char *s;
 219                         for (s = "Please connect GDB to this port\r\n"; *s; )
 220                                 generic_putDebugChar (*s++);
 221                 }
 222
 223                 /* Breakpoint is invoked after interrupts are initialised */
 224         }
 225 }
 226 #endif
 227
 228 void __init mips_nmi_setup (void)
 229 {
 230         void *base;
 231         extern char except_vec_nmi;
 232
 233         base = cpu_has_veic ?
 234                 (void *)(CAC_BASE + 0xa80) :
 235                 (void *)(CAC_BASE + 0x380);
 236         memcpy(base, &except_vec_nmi, 0x80);
 237         flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
 238 }
 239
 240 void __init mips_ejtag_setup (void)
 241 {
 242         void *base;
 243         extern char except_vec_ejtag_debug;
 244
 245         base = cpu_has_veic ?
 246                 (void *)(CAC_BASE + 0xa00) :
 247                 (void *)(CAC_BASE + 0x300);
 248         memcpy(base, &except_vec_ejtag_debug, 0x80);
 249         flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
 250 }
 251
 252 void __init prom_init(void)
 253 {
 254         prom_argc = fw_arg0;
 255         _prom_argv = (int *) fw_arg1;
 256         _prom_envp = (int *) fw_arg2;
 257
 258         mips_display_message("LINUX");
 259
 260 #ifdef CONFIG_MIPS_SEAD
 261         set_io_port_base(KSEG1);
 262 #else
 263         /*
 264          * early setup of _pcictrl_bonito so that we can determine
 265          * the system controller on a CORE_EMUL board
 266          */
 267         _pcictrl_bonito = (unsigned long)ioremap(BONITO_REG_BASE, BONITO_REG_SIZE);
 268
 269         mips_revision_corid = MIPS_REVISION_CORID;
 270
 271         if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) {
 272                 if (BONITO_PCIDID == 0x0001df53 ||
 273                     BONITO_PCIDID == 0x0003df53)
 274                         mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON;
 275                 else
 276                         mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_MSC;
 277         }
 278         switch(mips_revision_corid) {
 279                 u32 start, map, mask, data;
 280
 281         case MIPS_REVISION_CORID_QED_RM5261:
 282         case MIPS_REVISION_CORID_CORE_LV:
 283         case MIPS_REVISION_CORID_CORE_FPGA:
 284         case MIPS_REVISION_CORID_CORE_FPGAR2:
 285                 /*
 286                  * Setup the North bridge to do Master byte-lane swapping
 287                  * when running in bigendian.
 288                  */
 289                 _pcictrl_gt64120 = (unsigned long)ioremap(MIPS_GT_BASE, 0x2000);
 290
 291 #ifdef CONFIG_CPU_LITTLE_ENDIAN
 292                 GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
 293                          GT_PCI0_CMD_SBYTESWAP_BIT);
 294 #else
 295                 GT_WRITE(GT_PCI0_CMD_OFS, 0);
 296 #endif
 297                 /* Fix up PCI I/O mapping if necessary (for Atlas).  */
 298                 start = GT_READ(GT_PCI0IOLD_OFS);
 299                 map = GT_READ(GT_PCI0IOREMAP_OFS);
 300                 if ((start & map) != 0) {
 301                         map &= ~start;
 302                         GT_WRITE(GT_PCI0IOREMAP_OFS, map);
 303                 }
 304
 305                 set_io_port_base(MALTA_GT_PORT_BASE);
 306                 break;
 307
 308         case MIPS_REVISION_CORID_CORE_EMUL_BON:
 309         case MIPS_REVISION_CORID_BONITO64:
 310         case MIPS_REVISION_CORID_CORE_20K:
 311                 _pcictrl_bonito_pcicfg = (unsigned long)ioremap(BONITO_PCICFG_BASE, BONITO_PCICFG_SIZE);
 312
 313                 /*
 314                  * Disable Bonito IOBC.
 315                  */
 316                 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
 317                         ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
 318                           BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
 319
 320                 /*
 321                  * Setup the North bridge to do Master byte-lane swapping
 322                  * when running in bigendian.
 323                  */
 324 #ifdef CONFIG_CPU_LITTLE_ENDIAN
 325                 BONITO_BONGENCFG = BONITO_BONGENCFG &
 326                         ~(BONITO_BONGENCFG_MSTRBYTESWAP |
 327                           BONITO_BONGENCFG_BYTESWAP);
 328 #else
 329                 BONITO_BONGENCFG = BONITO_BONGENCFG |
 330                         BONITO_BONGENCFG_MSTRBYTESWAP |
 331                         BONITO_BONGENCFG_BYTESWAP;
 332 #endif
 333
 334                 set_io_port_base(MALTA_BONITO_PORT_BASE);
 335                 break;
 336
 337         case MIPS_REVISION_CORID_CORE_MSC:
 338         case MIPS_REVISION_CORID_CORE_FPGA2:
 339         case MIPS_REVISION_CORID_CORE_FPGA3:
 340         case MIPS_REVISION_CORID_CORE_24K:
 341         case MIPS_REVISION_CORID_CORE_EMUL_MSC:
 342                 _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
 343
 344                 mb();
 345                 MSC_READ(MSC01_PCI_CFG, data);
 346                 MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT);
 347                 wmb();
 348
 349                 /* Fix up lane swapping.  */
 350 #ifdef CONFIG_CPU_LITTLE_ENDIAN
 351                 MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
 352 #else
 353                 MSC_WRITE(MSC01_PCI_SWAP,
 354                           MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF |
 355                           MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
 356                           MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
 357 #endif
 358                 /* Fix up target memory mapping.  */
 359                 MSC_READ(MSC01_PCI_BAR0, mask);
 360                 MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
 361
 362                 /* Don't handle target retries indefinitely.  */
 363                 if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
 364                     MSC01_PCI_CFG_MAXRTRY_MSK)
 365                         data = (data & ~(MSC01_PCI_CFG_MAXRTRY_MSK <<
 366                                          MSC01_PCI_CFG_MAXRTRY_SHF)) |
 367                                ((MSC01_PCI_CFG_MAXRTRY_MSK - 1) <<
 368                                 MSC01_PCI_CFG_MAXRTRY_SHF);
 369
 370                 wmb();
 371                 MSC_WRITE(MSC01_PCI_CFG, data);
 372                 mb();
 373
 374                 set_io_port_base(MALTA_MSC_PORT_BASE);
 375                 break;
 376
 377         default:
 378                 /* Unknown Core card */
 379                 mips_display_message("CC Error");
 380                 while(1);   /* We die here... */
 381         }
 382 #endif
 383         board_nmi_handler_setup = mips_nmi_setup;
 384         board_ejtag_handler_setup = mips_ejtag_setup;
 385
 386         pr_info("\nLINUX started...\n");
 387         prom_init_cmdline();
 388         prom_meminit();
 389 #ifdef CONFIG_SERIAL_8250_CONSOLE
 390         console_config();
 391 #endif
 392 }