arch/powerpc/platforms/83xx/pci.c

   1 /*
   2  * FSL SoC setup code
   3  *
   4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/errno.h>
  16 #include <linux/pci.h>
  17 #include <linux/delay.h>
  18 #include <linux/irq.h>
  19 #include <linux/module.h>
  20
  21 #include <asm/system.h>
  22 #include <asm/atomic.h>
  23 #include <asm/io.h>
  24 #include <asm/pci-bridge.h>
  25 #include <asm/prom.h>
  26 #include <sysdev/fsl_soc.h>
  27
  28 #undef DEBUG
  29
  30 #ifdef DEBUG
  31 #define DBG(x...) printk(x)
  32 #else
  33 #define DBG(x...)
  34 #endif
  35
  36 int mpc83xx_pci2_busno;
  37
  38 int mpc83xx_exclude_device(u_char bus, u_char devfn)
  39 {
  40         if (bus == 0 && PCI_SLOT(devfn) == 0)
  41                 return PCIBIOS_DEVICE_NOT_FOUND;
  42         if (mpc83xx_pci2_busno)
  43                 if (bus == (mpc83xx_pci2_busno) && PCI_SLOT(devfn) == 0)
  44                         return PCIBIOS_DEVICE_NOT_FOUND;
  45         return PCIBIOS_SUCCESSFUL;
  46 }
  47
  48 int __init add_bridge(struct device_node *dev)
  49 {
  50         int len;
  51         struct pci_controller *hose;
  52         struct resource rsrc;
  53         const int *bus_range;
  54         int primary = 1, has_address = 0;
  55         phys_addr_t immr = get_immrbase();
  56
  57         DBG("Adding PCI host bridge %s\n", dev->full_name);
  58
  59         /* Fetch host bridge registers address */
  60         has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
  61
  62         /* Get bus range if any */
  63         bus_range = get_property(dev, "bus-range", &len);
  64         if (bus_range == NULL || len < 2 * sizeof(int)) {
  65                 printk(KERN_WARNING "Can't get bus-range for %s, assume"
  66                        " bus 0\n", dev->full_name);
  67         }
  68
  69         hose = pcibios_alloc_controller();
  70         if (!hose)
  71                 return -ENOMEM;
  72         hose->arch_data = dev;
  73         hose->set_cfg_type = 1;
  74
  75         hose->first_busno = bus_range ? bus_range[0] : 0;
  76         hose->last_busno = bus_range ? bus_range[1] : 0xff;
  77
  78         /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
  79          * the other at 0x8600, we consider the 0x8500 the primary controller
  80          */
  81         /* PCI 1 */
  82         if ((rsrc.start & 0xfffff) == 0x8500) {
  83                 setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304);
  84         }
  85         /* PCI 2 */
  86         if ((rsrc.start & 0xfffff) == 0x8600) {
  87                 setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384);
  88                 primary = 0;
  89                 hose->bus_offset = hose->first_busno;
  90                 mpc83xx_pci2_busno = hose->first_busno;
  91         }
  92
  93         printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
  94                "Firmware bus number: %d->%d\n",
  95                (unsigned long long)rsrc.start, hose->first_busno,
  96                hose->last_busno);
  97
  98         DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
  99             hose, hose->cfg_addr, hose->cfg_data);
 100
 101         /* Interpret the "ranges" property */
 102         /* This also maps the I/O region and sets isa_io/mem_base */
 103         pci_process_bridge_OF_ranges(hose, dev, primary);
 104
 105         return 0;
 106 }