arch/powerpc/platforms/85xx/mpc85xx_cds.c

   1 /*
   2  * MPC85xx setup and early boot code plus other random bits.
   3  *
   4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
   5  *
   6  * Copyright 2005 Freescale Semiconductor Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  */
  13
  14 #include <linux/stddef.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/reboot.h>
  19 #include <linux/pci.h>
  20 #include <linux/kdev_t.h>
  21 #include <linux/major.h>
  22 #include <linux/console.h>
  23 #include <linux/delay.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/initrd.h>
  26 #include <linux/module.h>
  27 #include <linux/fsl_devices.h>
  28
  29 #include <asm/system.h>
  30 #include <asm/pgtable.h>
  31 #include <asm/page.h>
  32 #include <asm/atomic.h>
  33 #include <asm/time.h>
  34 #include <asm/io.h>
  35 #include <asm/machdep.h>
  36 #include <asm/ipic.h>
  37 #include <asm/bootinfo.h>
  38 #include <asm/pci-bridge.h>
  39 #include <asm/mpc85xx.h>
  40 #include <asm/irq.h>
  41 #include <mm/mmu_decl.h>
  42 #include <asm/prom.h>
  43 #include <asm/udbg.h>
  44 #include <asm/mpic.h>
  45 #include <asm/i8259.h>
  46
  47 #include <sysdev/fsl_soc.h>
  48 #include "mpc85xx.h"
  49
  50 #ifndef CONFIG_PCI
  51 unsigned long isa_io_base = 0;
  52 unsigned long isa_mem_base = 0;
  53 #endif
  54
  55 static int cds_pci_slot = 2;
  56 static volatile u8 *cadmus;
  57
  58 #ifdef CONFIG_PCI
  59
  60 #define ARCADIA_HOST_BRIDGE_IDSEL       17
  61 #define ARCADIA_2ND_BRIDGE_IDSEL        3
  62
  63 extern int mpc85xx_pci2_busno;
  64
  65 static int mpc85xx_exclude_device(u_char bus, u_char devfn)
  66 {
  67         if (bus == 0 && PCI_SLOT(devfn) == 0)
  68                 return PCIBIOS_DEVICE_NOT_FOUND;
  69         if (mpc85xx_pci2_busno)
  70                 if (bus == (mpc85xx_pci2_busno) && PCI_SLOT(devfn) == 0)
  71                         return PCIBIOS_DEVICE_NOT_FOUND;
  72         /* We explicitly do not go past the Tundra 320 Bridge */
  73         if ((bus == 1) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
  74                 return PCIBIOS_DEVICE_NOT_FOUND;
  75         if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
  76                 return PCIBIOS_DEVICE_NOT_FOUND;
  77         else
  78                 return PCIBIOS_SUCCESSFUL;
  79 }
  80
  81 static void __init mpc85xx_cds_pcibios_fixup(void)
  82 {
  83         struct pci_dev *dev;
  84         u_char          c;
  85
  86         if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
  87                                         PCI_DEVICE_ID_VIA_82C586_1, NULL))) {
  88                 /*
  89                  * U-Boot does not set the enable bits
  90                  * for the IDE device. Force them on here.
  91                  */
  92                 pci_read_config_byte(dev, 0x40, &c);
  93                 c |= 0x03; /* IDE: Chip Enable Bits */
  94                 pci_write_config_byte(dev, 0x40, c);
  95
  96                 /*
  97                  * Since only primary interface works, force the
  98                  * IDE function to standard primary IDE interrupt
  99                  * w/ 8259 offset
 100                  */
 101                 dev->irq = 14;
 102                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
 103                 pci_dev_put(dev);
 104         }
 105
 106         /*
 107          * Force legacy USB interrupt routing
 108          */
 109         if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
 110                                         PCI_DEVICE_ID_VIA_82C586_2, NULL))) {
 111                 dev->irq = 10;
 112                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);
 113                 pci_dev_put(dev);
 114         }
 115
 116         if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
 117                                         PCI_DEVICE_ID_VIA_82C586_2, dev))) {
 118                 dev->irq = 11;
 119                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
 120                 pci_dev_put(dev);
 121         }
 122
 123         /* Now map all the PCI irqs */
 124         dev = NULL;
 125         for_each_pci_dev(dev)
 126                 pci_read_irq_line(dev);
 127 }
 128
 129 #ifdef CONFIG_PPC_I8259
 130 #warning The i8259 PIC support is currently broken
 131 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
 132 {
 133         unsigned int cascade_irq = i8259_irq();
 134
 135         if (cascade_irq != NO_IRQ)
 136                 generic_handle_irq(cascade_irq);
 137
 138         desc->chip->eoi(irq);
 139 }
 140 #endif /* PPC_I8259 */
 141 #endif /* CONFIG_PCI */
 142
 143 static void __init mpc85xx_cds_pic_init(void)
 144 {
 145         struct mpic *mpic;
 146         struct resource r;
 147         struct device_node *np = NULL;
 148 #ifdef CONFIG_PPC_I8259
 149         struct device_node *cascade_node = NULL;
 150         int cascade_irq;
 151 #endif
 152
 153         np = of_find_node_by_type(np, "open-pic");
 154
 155         if (np == NULL) {
 156                 printk(KERN_ERR "Could not find open-pic node\n");
 157                 return;
 158         }
 159
 160         if (of_address_to_resource(np, 0, &r)) {
 161                 printk(KERN_ERR "Failed to map mpic register space\n");
 162                 of_node_put(np);
 163                 return;
 164         }
 165
 166         mpic = mpic_alloc(np, r.start,
 167                         MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
 168                         4, 0, " OpenPIC  ");
 169         BUG_ON(mpic == NULL);
 170
 171         /* Return the mpic node */
 172         of_node_put(np);
 173
 174         mpic_assign_isu(mpic, 0, r.start + 0x10200);
 175         mpic_assign_isu(mpic, 1, r.start + 0x10280);
 176         mpic_assign_isu(mpic, 2, r.start + 0x10300);
 177         mpic_assign_isu(mpic, 3, r.start + 0x10380);
 178         mpic_assign_isu(mpic, 4, r.start + 0x10400);
 179         mpic_assign_isu(mpic, 5, r.start + 0x10480);
 180         mpic_assign_isu(mpic, 6, r.start + 0x10500);
 181         mpic_assign_isu(mpic, 7, r.start + 0x10580);
 182
 183         /* Used only for 8548 so far, but no harm in
 184          * allocating them for everyone */
 185         mpic_assign_isu(mpic, 8, r.start + 0x10600);
 186         mpic_assign_isu(mpic, 9, r.start + 0x10680);
 187         mpic_assign_isu(mpic, 10, r.start + 0x10700);
 188         mpic_assign_isu(mpic, 11, r.start + 0x10780);
 189
 190         /* External Interrupts */
 191         mpic_assign_isu(mpic, 12, r.start + 0x10000);
 192         mpic_assign_isu(mpic, 13, r.start + 0x10080);
 193         mpic_assign_isu(mpic, 14, r.start + 0x10100);
 194
 195         mpic_init(mpic);
 196
 197 #ifdef CONFIG_PPC_I8259
 198         /* Initialize the i8259 controller */
 199         for_each_node_by_type(np, "interrupt-controller")
 200                 if (device_is_compatible(np, "chrp,iic")) {
 201                         cascade_node = np;
 202                         break;
 203                 }
 204
 205         if (cascade_node == NULL) {
 206                 printk(KERN_DEBUG "Could not find i8259 PIC\n");
 207                 return;
 208         }
 209
 210         cascade_irq = irq_of_parse_and_map(cascade_node, 0);
 211         if (cascade_irq == NO_IRQ) {
 212                 printk(KERN_ERR "Failed to map cascade interrupt\n");
 213                 return;
 214         }
 215
 216         i8259_init(cascade_node, 0);
 217         of_node_put(cascade_node);
 218
 219         set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
 220 #endif /* CONFIG_PPC_I8259 */
 221 }
 222
 223 /*
 224  * Setup the architecture
 225  */
 226 static void __init mpc85xx_cds_setup_arch(void)
 227 {
 228         struct device_node *cpu;
 229 #ifdef CONFIG_PCI
 230         struct device_node *np;
 231 #endif
 232
 233         if (ppc_md.progress)
 234                 ppc_md.progress("mpc85xx_cds_setup_arch()", 0);
 235
 236         cpu = of_find_node_by_type(NULL, "cpu");
 237         if (cpu != 0) {
 238                 const unsigned int *fp;
 239
 240                 fp = get_property(cpu, "clock-frequency", NULL);
 241                 if (fp != 0)
 242                         loops_per_jiffy = *fp / HZ;
 243                 else
 244                         loops_per_jiffy = 500000000 / HZ;
 245                 of_node_put(cpu);
 246         }
 247
 248         cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);
 249         cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
 250
 251         if (ppc_md.progress) {
 252                 char buf[40];
 253                 snprintf(buf, 40, "CDS Version = 0x%x in slot %d\n",
 254                                 cadmus[CM_VER], cds_pci_slot);
 255                 ppc_md.progress(buf, 0);
 256         }
 257
 258 #ifdef CONFIG_PCI
 259         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
 260                 add_bridge(np);
 261
 262         ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
 263         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 264 #endif
 265 }
 266
 267 static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
 268 {
 269         uint pvid, svid, phid1;
 270         uint memsize = total_memory;
 271
 272         pvid = mfspr(SPRN_PVR);
 273         svid = mfspr(SPRN_SVR);
 274
 275         seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
 276         seq_printf(m, "Machine\t\t: MPC85xx CDS (0x%x)\n", cadmus[CM_VER]);
 277         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 278         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 279
 280         /* Display cpu Pll setting */
 281         phid1 = mfspr(SPRN_HID1);
 282         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 283
 284         /* Display the amount of memory */
 285         seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
 286 }
 287
 288
 289 /*
 290  * Called very early, device-tree isn't unflattened
 291  */
 292 static int __init mpc85xx_cds_probe(void)
 293 {
 294         unsigned long root = of_get_flat_dt_root();
 295
 296         return of_flat_dt_is_compatible(root, "MPC85xxCDS");
 297 }
 298
 299 define_machine(mpc85xx_cds) {
 300         .name           = "MPC85xx CDS",
 301         .probe          = mpc85xx_cds_probe,
 302         .setup_arch     = mpc85xx_cds_setup_arch,
 303         .init_IRQ       = mpc85xx_cds_pic_init,
 304         .show_cpuinfo   = mpc85xx_cds_show_cpuinfo,
 305         .get_irq        = mpic_get_irq,
 306         .restart        = mpc85xx_restart,
 307         .calibrate_decr = generic_calibrate_decr,
 308         .progress       = udbg_progress,
 309 };