1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
7 * Based largely on code which is:
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
12 #include <linux/errno.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/profile.h>
32 #include <linux/miscdevice.h>
33 #include <linux/rtc.h>
35 #include <asm/oplib.h>
36 #include <asm/mostek.h>
37 #include <asm/timer.h>
41 #include <asm/of_device.h>
42 #include <asm/starfire.h>
44 #include <asm/sections.h>
45 #include <asm/cpudata.h>
46 #include <asm/uaccess.h>
48 #include <asm/irq_regs.h>
50 DEFINE_SPINLOCK(mostek_lock
);
51 DEFINE_SPINLOCK(rtc_lock
);
52 void __iomem
*mstk48t02_regs
= NULL
;
54 unsigned long ds1287_regs
= 0UL;
57 static void __iomem
*mstk48t08_regs
;
58 static void __iomem
*mstk48t59_regs
;
60 static int set_rtc_mmss(unsigned long);
62 #define TICK_PRIV_BIT (1UL << 63)
65 unsigned long profile_pc(struct pt_regs
*regs
)
67 unsigned long pc
= instruction_pointer(regs
);
69 if (in_lock_functions(pc
))
70 return regs
->u_regs
[UREG_RETPC
];
73 EXPORT_SYMBOL(profile_pc
);
76 static void tick_disable_protection(void)
78 /* Set things up so user can access tick register for profiling
79 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
80 * read back of %tick after writing it.
86 "1: rd %%tick, %%g2\n"
87 " add %%g2, 6, %%g2\n"
88 " andn %%g2, %0, %%g2\n"
89 " wrpr %%g2, 0, %%tick\n"
96 static void tick_init_tick(unsigned long offset
)
98 tick_disable_protection();
100 __asm__
__volatile__(
102 " andn %%g1, %1, %%g1\n"
104 " add %%g1, %0, %%g1\n"
106 "1: wr %%g1, 0x0, %%tick_cmpr\n"
107 " rd %%tick_cmpr, %%g0"
109 : "r" (offset
), "r" (TICK_PRIV_BIT
)
113 static unsigned long tick_get_tick(void)
117 __asm__
__volatile__("rd %%tick, %0\n\t"
121 return ret
& ~TICK_PRIV_BIT
;
124 static unsigned long tick_get_compare(void)
128 __asm__
__volatile__("rd %%tick_cmpr, %0\n\t"
135 static unsigned long tick_add_compare(unsigned long adj
)
137 unsigned long new_compare
;
139 /* Workaround for Spitfire Errata (#54 I think??), I discovered
140 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
143 * On Blackbird writes to %tick_cmpr can fail, the
144 * workaround seems to be to execute the wr instruction
145 * at the start of an I-cache line, and perform a dummy
146 * read back from %tick_cmpr right after writing to it. -DaveM
148 __asm__
__volatile__("rd %%tick_cmpr, %0\n\t"
149 "ba,pt %%xcc, 1f\n\t"
150 " add %0, %1, %0\n\t"
153 "wr %0, 0, %%tick_cmpr\n\t"
154 "rd %%tick_cmpr, %%g0"
155 : "=&r" (new_compare
)
161 static unsigned long tick_add_tick(unsigned long adj
, unsigned long offset
)
163 unsigned long new_tick
, tmp
;
165 /* Also need to handle Blackbird bug here too. */
166 __asm__
__volatile__("rd %%tick, %0\n\t"
168 "wrpr %0, 0, %%tick\n\t"
169 "andn %0, %4, %1\n\t"
170 "ba,pt %%xcc, 1f\n\t"
171 " add %1, %3, %1\n\t"
174 "wr %1, 0, %%tick_cmpr\n\t"
175 "rd %%tick_cmpr, %%g0"
176 : "=&r" (new_tick
), "=&r" (tmp
)
177 : "r" (adj
), "r" (offset
), "r" (TICK_PRIV_BIT
));
182 static struct sparc64_tick_ops tick_operations __read_mostly
= {
183 .init_tick
= tick_init_tick
,
184 .get_tick
= tick_get_tick
,
185 .get_compare
= tick_get_compare
,
186 .add_tick
= tick_add_tick
,
187 .add_compare
= tick_add_compare
,
188 .softint_mask
= 1UL << 0,
191 struct sparc64_tick_ops
*tick_ops __read_mostly
= &tick_operations
;
193 static void stick_init_tick(unsigned long offset
)
195 /* Writes to the %tick and %stick register are not
196 * allowed on sun4v. The Hypervisor controls that
199 if (tlb_type
!= hypervisor
) {
200 tick_disable_protection();
202 /* Let the user get at STICK too. */
203 __asm__
__volatile__(
204 " rd %%asr24, %%g2\n"
205 " andn %%g2, %0, %%g2\n"
206 " wr %%g2, 0, %%asr24"
208 : "r" (TICK_PRIV_BIT
)
212 __asm__
__volatile__(
213 " rd %%asr24, %%g1\n"
214 " andn %%g1, %1, %%g1\n"
215 " add %%g1, %0, %%g1\n"
216 " wr %%g1, 0x0, %%asr25"
218 : "r" (offset
), "r" (TICK_PRIV_BIT
)
222 static unsigned long stick_get_tick(void)
226 __asm__
__volatile__("rd %%asr24, %0"
229 return ret
& ~TICK_PRIV_BIT
;
232 static unsigned long stick_get_compare(void)
236 __asm__
__volatile__("rd %%asr25, %0"
242 static unsigned long stick_add_tick(unsigned long adj
, unsigned long offset
)
244 unsigned long new_tick
, tmp
;
246 __asm__
__volatile__("rd %%asr24, %0\n\t"
248 "wr %0, 0, %%asr24\n\t"
249 "andn %0, %4, %1\n\t"
252 : "=&r" (new_tick
), "=&r" (tmp
)
253 : "r" (adj
), "r" (offset
), "r" (TICK_PRIV_BIT
));
258 static unsigned long stick_add_compare(unsigned long adj
)
260 unsigned long new_compare
;
262 __asm__
__volatile__("rd %%asr25, %0\n\t"
265 : "=&r" (new_compare
)
271 static struct sparc64_tick_ops stick_operations __read_mostly
= {
272 .init_tick
= stick_init_tick
,
273 .get_tick
= stick_get_tick
,
274 .get_compare
= stick_get_compare
,
275 .add_tick
= stick_add_tick
,
276 .add_compare
= stick_add_compare
,
277 .softint_mask
= 1UL << 16,
280 /* On Hummingbird the STICK/STICK_CMPR register is implemented
281 * in I/O space. There are two 64-bit registers each, the
282 * first holds the low 32-bits of the value and the second holds
285 * Since STICK is constantly updating, we have to access it carefully.
287 * The sequence we use to read is:
290 * 3) read high again, if it rolled re-read both low and high again.
292 * Writing STICK safely is also tricky:
293 * 1) write low to zero
297 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
298 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
300 static unsigned long __hbird_read_stick(void)
302 unsigned long ret
, tmp1
, tmp2
, tmp3
;
303 unsigned long addr
= HBIRD_STICK_ADDR
+8;
305 __asm__
__volatile__("ldxa [%1] %5, %2\n"
307 "sub %1, 0x8, %1\n\t"
308 "ldxa [%1] %5, %3\n\t"
309 "add %1, 0x8, %1\n\t"
310 "ldxa [%1] %5, %4\n\t"
312 "bne,a,pn %%xcc, 1b\n\t"
314 "sllx %4, 32, %4\n\t"
316 : "=&r" (ret
), "=&r" (addr
),
317 "=&r" (tmp1
), "=&r" (tmp2
), "=&r" (tmp3
)
318 : "i" (ASI_PHYS_BYPASS_EC_E
), "1" (addr
));
323 static unsigned long __hbird_read_compare(void)
325 unsigned long low
, high
;
326 unsigned long addr
= HBIRD_STICKCMP_ADDR
;
328 __asm__
__volatile__("ldxa [%2] %3, %0\n\t"
329 "add %2, 0x8, %2\n\t"
331 : "=&r" (low
), "=&r" (high
), "=&r" (addr
)
332 : "i" (ASI_PHYS_BYPASS_EC_E
), "2" (addr
));
334 return (high
<< 32UL) | low
;
337 static void __hbird_write_stick(unsigned long val
)
339 unsigned long low
= (val
& 0xffffffffUL
);
340 unsigned long high
= (val
>> 32UL);
341 unsigned long addr
= HBIRD_STICK_ADDR
;
343 __asm__
__volatile__("stxa %%g0, [%0] %4\n\t"
344 "add %0, 0x8, %0\n\t"
345 "stxa %3, [%0] %4\n\t"
346 "sub %0, 0x8, %0\n\t"
349 : "0" (addr
), "r" (low
), "r" (high
),
350 "i" (ASI_PHYS_BYPASS_EC_E
));
353 static void __hbird_write_compare(unsigned long val
)
355 unsigned long low
= (val
& 0xffffffffUL
);
356 unsigned long high
= (val
>> 32UL);
357 unsigned long addr
= HBIRD_STICKCMP_ADDR
+ 0x8UL
;
359 __asm__
__volatile__("stxa %3, [%0] %4\n\t"
360 "sub %0, 0x8, %0\n\t"
363 : "0" (addr
), "r" (low
), "r" (high
),
364 "i" (ASI_PHYS_BYPASS_EC_E
));
367 static void hbtick_init_tick(unsigned long offset
)
371 tick_disable_protection();
373 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
374 * XXX into actually sending STICK interrupts. I think because
375 * XXX of how we store %tick_cmpr in head.S this somehow resets the
376 * XXX {TICK + STICK} interrupt mux. -DaveM
378 __hbird_write_stick(__hbird_read_stick());
380 val
= __hbird_read_stick() & ~TICK_PRIV_BIT
;
381 __hbird_write_compare(val
+ offset
);
384 static unsigned long hbtick_get_tick(void)
386 return __hbird_read_stick() & ~TICK_PRIV_BIT
;
389 static unsigned long hbtick_get_compare(void)
391 return __hbird_read_compare();
394 static unsigned long hbtick_add_tick(unsigned long adj
, unsigned long offset
)
398 val
= __hbird_read_stick() + adj
;
399 __hbird_write_stick(val
);
401 val
&= ~TICK_PRIV_BIT
;
402 __hbird_write_compare(val
+ offset
);
407 static unsigned long hbtick_add_compare(unsigned long adj
)
409 unsigned long val
= __hbird_read_compare() + adj
;
411 val
&= ~TICK_PRIV_BIT
;
412 __hbird_write_compare(val
);
417 static struct sparc64_tick_ops hbtick_operations __read_mostly
= {
418 .init_tick
= hbtick_init_tick
,
419 .get_tick
= hbtick_get_tick
,
420 .get_compare
= hbtick_get_compare
,
421 .add_tick
= hbtick_add_tick
,
422 .add_compare
= hbtick_add_compare
,
423 .softint_mask
= 1UL << 0,
426 /* timer_interrupt() needs to keep up the real-time clock,
427 * as well as call the "do_timer()" routine every clocktick
429 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
430 * interrupts, one at level14 and one with softint bit 0.
432 unsigned long timer_tick_offset __read_mostly
;
434 static unsigned long timer_ticks_per_nsec_quotient __read_mostly
;
436 #define TICK_SIZE (tick_nsec / 1000)
438 static inline void timer_check_rtc(void)
440 /* last time the cmos clock got updated */
441 static long last_rtc_update
;
443 /* Determine when to update the Mostek clock. */
445 xtime
.tv_sec
> last_rtc_update
+ 660 &&
446 (xtime
.tv_nsec
/ 1000) >= 500000 - ((unsigned) TICK_SIZE
) / 2 &&
447 (xtime
.tv_nsec
/ 1000) <= 500000 + ((unsigned) TICK_SIZE
) / 2) {
448 if (set_rtc_mmss(xtime
.tv_sec
) == 0)
449 last_rtc_update
= xtime
.tv_sec
;
451 last_rtc_update
= xtime
.tv_sec
- 600;
452 /* do it again in 60 s */
456 irqreturn_t
timer_interrupt(int irq
, void *dev_id
)
458 unsigned long ticks
, compare
, pstate
;
460 write_seqlock(&xtime_lock
);
464 profile_tick(CPU_PROFILING
);
465 update_process_times(user_mode(get_irq_regs()));
469 /* Guarantee that the following sequences execute
472 __asm__
__volatile__("rdpr %%pstate, %0\n\t"
473 "wrpr %0, %1, %%pstate"
477 compare
= tick_ops
->add_compare(timer_tick_offset
);
478 ticks
= tick_ops
->get_tick();
480 /* Restore PSTATE_IE. */
481 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
484 } while (time_after_eq(ticks
, compare
));
488 write_sequnlock(&xtime_lock
);
494 void timer_tick_interrupt(struct pt_regs
*regs
)
496 write_seqlock(&xtime_lock
);
502 write_sequnlock(&xtime_lock
);
506 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
507 static void __init
kick_start_clock(void)
509 void __iomem
*regs
= mstk48t02_regs
;
513 prom_printf("CLOCK: Clock was stopped. Kick start ");
515 spin_lock_irq(&mostek_lock
);
517 /* Turn on the kick start bit to start the oscillator. */
518 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
519 tmp
|= MSTK_CREG_WRITE
;
520 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
521 tmp
= mostek_read(regs
+ MOSTEK_SEC
);
523 mostek_write(regs
+ MOSTEK_SEC
, tmp
);
524 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
525 tmp
|= MSTK_KICK_START
;
526 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
527 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
528 tmp
&= ~MSTK_CREG_WRITE
;
529 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
531 spin_unlock_irq(&mostek_lock
);
533 /* Delay to allow the clock oscillator to start. */
534 sec
= MSTK_REG_SEC(regs
);
535 for (i
= 0; i
< 3; i
++) {
536 while (sec
== MSTK_REG_SEC(regs
))
537 for (count
= 0; count
< 100000; count
++)
540 sec
= MSTK_REG_SEC(regs
);
544 spin_lock_irq(&mostek_lock
);
546 /* Turn off kick start and set a "valid" time and date. */
547 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
548 tmp
|= MSTK_CREG_WRITE
;
549 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
550 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
551 tmp
&= ~MSTK_KICK_START
;
552 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
553 MSTK_SET_REG_SEC(regs
,0);
554 MSTK_SET_REG_MIN(regs
,0);
555 MSTK_SET_REG_HOUR(regs
,0);
556 MSTK_SET_REG_DOW(regs
,5);
557 MSTK_SET_REG_DOM(regs
,1);
558 MSTK_SET_REG_MONTH(regs
,8);
559 MSTK_SET_REG_YEAR(regs
,1996 - MSTK_YEAR_ZERO
);
560 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
561 tmp
&= ~MSTK_CREG_WRITE
;
562 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
564 spin_unlock_irq(&mostek_lock
);
566 /* Ensure the kick start bit is off. If it isn't, turn it off. */
567 while (mostek_read(regs
+ MOSTEK_HOUR
) & MSTK_KICK_START
) {
568 prom_printf("CLOCK: Kick start still on!\n");
570 spin_lock_irq(&mostek_lock
);
572 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
573 tmp
|= MSTK_CREG_WRITE
;
574 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
576 tmp
= mostek_read(regs
+ MOSTEK_HOUR
);
577 tmp
&= ~MSTK_KICK_START
;
578 mostek_write(regs
+ MOSTEK_HOUR
, tmp
);
580 tmp
= mostek_read(regs
+ MOSTEK_CREG
);
581 tmp
&= ~MSTK_CREG_WRITE
;
582 mostek_write(regs
+ MOSTEK_CREG
, tmp
);
584 spin_unlock_irq(&mostek_lock
);
587 prom_printf("CLOCK: Kick start procedure successful.\n");
590 /* Return nonzero if the clock chip battery is low. */
591 static int __init
has_low_battery(void)
593 void __iomem
*regs
= mstk48t02_regs
;
596 spin_lock_irq(&mostek_lock
);
598 data1
= mostek_read(regs
+ MOSTEK_EEPROM
); /* Read some data. */
599 mostek_write(regs
+ MOSTEK_EEPROM
, ~data1
); /* Write back the complement. */
600 data2
= mostek_read(regs
+ MOSTEK_EEPROM
); /* Read back the complement. */
601 mostek_write(regs
+ MOSTEK_EEPROM
, data1
); /* Restore original value. */
603 spin_unlock_irq(&mostek_lock
);
605 return (data1
== data2
); /* Was the write blocked? */
608 /* Probe for the real time clock chip. */
609 static void __init
set_system_time(void)
611 unsigned int year
, mon
, day
, hour
, min
, sec
;
612 void __iomem
*mregs
= mstk48t02_regs
;
614 unsigned long dregs
= ds1287_regs
;
616 unsigned long dregs
= 0UL;
620 if (!mregs
&& !dregs
) {
621 prom_printf("Something wrong, clock regs not mapped yet.\n");
626 spin_lock_irq(&mostek_lock
);
628 /* Traditional Mostek chip. */
629 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
630 tmp
|= MSTK_CREG_READ
;
631 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
633 sec
= MSTK_REG_SEC(mregs
);
634 min
= MSTK_REG_MIN(mregs
);
635 hour
= MSTK_REG_HOUR(mregs
);
636 day
= MSTK_REG_DOM(mregs
);
637 mon
= MSTK_REG_MONTH(mregs
);
638 year
= MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs
) );
640 /* Dallas 12887 RTC chip. */
643 sec
= CMOS_READ(RTC_SECONDS
);
644 min
= CMOS_READ(RTC_MINUTES
);
645 hour
= CMOS_READ(RTC_HOURS
);
646 day
= CMOS_READ(RTC_DAY_OF_MONTH
);
647 mon
= CMOS_READ(RTC_MONTH
);
648 year
= CMOS_READ(RTC_YEAR
);
649 } while (sec
!= CMOS_READ(RTC_SECONDS
));
651 if (!(CMOS_READ(RTC_CONTROL
) & RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
659 if ((year
+= 1900) < 1970)
663 xtime
.tv_sec
= mktime(year
, mon
, day
, hour
, min
, sec
);
664 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
665 set_normalized_timespec(&wall_to_monotonic
,
666 -xtime
.tv_sec
, -xtime
.tv_nsec
);
669 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
670 tmp
&= ~MSTK_CREG_READ
;
671 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
673 spin_unlock_irq(&mostek_lock
);
677 /* davem suggests we keep this within the 4M locked kernel image */
678 static u32
starfire_get_time(void)
680 static char obp_gettod
[32];
683 sprintf(obp_gettod
, "h# %08x unix-gettod",
684 (unsigned int) (long) &unix_tod
);
685 prom_feval(obp_gettod
);
690 static int starfire_set_time(u32 val
)
692 /* Do nothing, time is set using the service processor
693 * console on this platform.
698 static u32
hypervisor_get_time(void)
700 register unsigned long func
asm("%o5");
701 register unsigned long arg0
asm("%o0");
702 register unsigned long arg1
asm("%o1");
706 func
= HV_FAST_TOD_GET
;
709 __asm__
__volatile__("ta %6"
710 : "=&r" (func
), "=&r" (arg0
), "=&r" (arg1
)
711 : "0" (func
), "1" (arg0
), "2" (arg1
),
715 if (arg0
== HV_EWOULDBLOCK
) {
720 printk(KERN_WARNING
"SUN4V: tod_get() timed out.\n");
723 printk(KERN_WARNING
"SUN4V: tod_get() not supported.\n");
727 static int hypervisor_set_time(u32 secs
)
729 register unsigned long func
asm("%o5");
730 register unsigned long arg0
asm("%o0");
734 func
= HV_FAST_TOD_SET
;
736 __asm__
__volatile__("ta %4"
737 : "=&r" (func
), "=&r" (arg0
)
738 : "0" (func
), "1" (arg0
),
742 if (arg0
== HV_EWOULDBLOCK
) {
747 printk(KERN_WARNING
"SUN4V: tod_set() timed out.\n");
750 printk(KERN_WARNING
"SUN4V: tod_set() not supported.\n");
754 static int __init
clock_model_matches(char *model
)
756 if (strcmp(model
, "mk48t02") &&
757 strcmp(model
, "mk48t08") &&
758 strcmp(model
, "mk48t59") &&
759 strcmp(model
, "m5819") &&
760 strcmp(model
, "m5819p") &&
761 strcmp(model
, "m5823") &&
762 strcmp(model
, "ds1287"))
768 static int __devinit
clock_probe(struct of_device
*op
, const struct of_device_id
*match
)
770 struct device_node
*dp
= op
->node
;
771 char *model
= of_get_property(dp
, "model", NULL
);
772 unsigned long size
, flags
;
775 if (!model
|| !clock_model_matches(model
))
778 /* On an Enterprise system there can be multiple mostek clocks.
779 * We should only match the one that is on the central FHC bus.
781 if (!strcmp(dp
->parent
->name
, "fhc") &&
782 strcmp(dp
->parent
->parent
->name
, "central") != 0)
785 size
= (op
->resource
[0].end
- op
->resource
[0].start
) + 1;
786 regs
= of_ioremap(&op
->resource
[0], 0, size
, "clock");
791 if (!strcmp(model
, "ds1287") ||
792 !strcmp(model
, "m5819") ||
793 !strcmp(model
, "m5819p") ||
794 !strcmp(model
, "m5823")) {
795 ds1287_regs
= (unsigned long) regs
;
798 if (model
[5] == '0' && model
[6] == '2') {
799 mstk48t02_regs
= regs
;
800 } else if(model
[5] == '0' && model
[6] == '8') {
801 mstk48t08_regs
= regs
;
802 mstk48t02_regs
= mstk48t08_regs
+ MOSTEK_48T08_48T02
;
804 mstk48t59_regs
= regs
;
805 mstk48t02_regs
= mstk48t59_regs
+ MOSTEK_48T59_48T02
;
808 printk(KERN_INFO
"%s: Clock regs at %p\n", dp
->full_name
, regs
);
810 local_irq_save(flags
);
812 if (mstk48t02_regs
!= NULL
) {
813 /* Report a low battery voltage condition. */
814 if (has_low_battery())
815 prom_printf("NVRAM: Low battery voltage!\n");
817 /* Kick start the clock if it is completely stopped. */
818 if (mostek_read(mstk48t02_regs
+ MOSTEK_SEC
) & MSTK_STOP
)
824 local_irq_restore(flags
);
829 static struct of_device_id clock_match
[] = {
839 static struct of_platform_driver clock_driver
= {
841 .match_table
= clock_match
,
842 .probe
= clock_probe
,
845 static int __init
clock_init(void)
847 if (this_is_starfire
) {
848 xtime
.tv_sec
= starfire_get_time();
849 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
850 set_normalized_timespec(&wall_to_monotonic
,
851 -xtime
.tv_sec
, -xtime
.tv_nsec
);
854 if (tlb_type
== hypervisor
) {
855 xtime
.tv_sec
= hypervisor_get_time();
856 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
857 set_normalized_timespec(&wall_to_monotonic
,
858 -xtime
.tv_sec
, -xtime
.tv_nsec
);
862 return of_register_driver(&clock_driver
, &of_bus_type
);
865 /* Must be after subsys_initcall() so that busses are probed. Must
866 * be before device_initcall() because things like the RTC driver
867 * need to see the clock registers.
869 fs_initcall(clock_init
);
871 /* This is gets the master TICK_INT timer going. */
872 static unsigned long sparc64_init_timers(void)
874 struct device_node
*dp
;
875 struct property
*prop
;
878 extern void smp_tick_init(void);
881 dp
= of_find_node_by_path("/");
882 if (tlb_type
== spitfire
) {
883 unsigned long ver
, manuf
, impl
;
885 __asm__
__volatile__ ("rdpr %%ver, %0"
887 manuf
= ((ver
>> 48) & 0xffff);
888 impl
= ((ver
>> 32) & 0xffff);
889 if (manuf
== 0x17 && impl
== 0x13) {
890 /* Hummingbird, aka Ultra-IIe */
891 tick_ops
= &hbtick_operations
;
892 prop
= of_find_property(dp
, "stick-frequency", NULL
);
894 tick_ops
= &tick_operations
;
895 cpu_find_by_instance(0, &dp
, NULL
);
896 prop
= of_find_property(dp
, "clock-frequency", NULL
);
899 tick_ops
= &stick_operations
;
900 prop
= of_find_property(dp
, "stick-frequency", NULL
);
902 clock
= *(unsigned int *) prop
->value
;
903 timer_tick_offset
= clock
/ HZ
;
912 static void sparc64_start_timers(void)
914 unsigned long pstate
;
916 /* Guarantee that the following sequences execute
919 __asm__
__volatile__("rdpr %%pstate, %0\n\t"
920 "wrpr %0, %1, %%pstate"
924 tick_ops
->init_tick(timer_tick_offset
);
926 /* Restore PSTATE_IE. */
927 __asm__
__volatile__("wrpr %0, 0x0, %%pstate"
933 unsigned long clock_tick_ref
;
934 unsigned int ref_freq
;
936 static DEFINE_PER_CPU(struct freq_table
, sparc64_freq_table
) = { 0, 0 };
938 unsigned long sparc64_get_clock_tick(unsigned int cpu
)
940 struct freq_table
*ft
= &per_cpu(sparc64_freq_table
, cpu
);
942 if (ft
->clock_tick_ref
)
943 return ft
->clock_tick_ref
;
944 return cpu_data(cpu
).clock_tick
;
947 #ifdef CONFIG_CPU_FREQ
949 static int sparc64_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
952 struct cpufreq_freqs
*freq
= data
;
953 unsigned int cpu
= freq
->cpu
;
954 struct freq_table
*ft
= &per_cpu(sparc64_freq_table
, cpu
);
957 ft
->ref_freq
= freq
->old
;
958 ft
->clock_tick_ref
= cpu_data(cpu
).clock_tick
;
960 if ((val
== CPUFREQ_PRECHANGE
&& freq
->old
< freq
->new) ||
961 (val
== CPUFREQ_POSTCHANGE
&& freq
->old
> freq
->new) ||
962 (val
== CPUFREQ_RESUMECHANGE
)) {
963 cpu_data(cpu
).clock_tick
=
964 cpufreq_scale(ft
->clock_tick_ref
,
972 static struct notifier_block sparc64_cpufreq_notifier_block
= {
973 .notifier_call
= sparc64_cpufreq_notifier
976 #endif /* CONFIG_CPU_FREQ */
978 static struct time_interpolator sparc64_cpu_interpolator
= {
979 .source
= TIME_SOURCE_CPU
,
981 .mask
= 0xffffffffffffffffLL
984 /* The quotient formula is taken from the IA64 port. */
985 #define SPARC64_NSEC_PER_CYC_SHIFT 10UL
986 void __init
time_init(void)
988 unsigned long clock
= sparc64_init_timers();
990 sparc64_cpu_interpolator
.frequency
= clock
;
991 register_time_interpolator(&sparc64_cpu_interpolator
);
993 /* Now that the interpolator is registered, it is
994 * safe to start the timer ticking.
996 sparc64_start_timers();
998 timer_ticks_per_nsec_quotient
=
999 (((NSEC_PER_SEC
<< SPARC64_NSEC_PER_CYC_SHIFT
) +
1000 (clock
/ 2)) / clock
);
1002 #ifdef CONFIG_CPU_FREQ
1003 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block
,
1004 CPUFREQ_TRANSITION_NOTIFIER
);
1008 unsigned long long sched_clock(void)
1010 unsigned long ticks
= tick_ops
->get_tick();
1012 return (ticks
* timer_ticks_per_nsec_quotient
)
1013 >> SPARC64_NSEC_PER_CYC_SHIFT
;
1016 static int set_rtc_mmss(unsigned long nowtime
)
1018 int real_seconds
, real_minutes
, chip_minutes
;
1019 void __iomem
*mregs
= mstk48t02_regs
;
1021 unsigned long dregs
= ds1287_regs
;
1023 unsigned long dregs
= 0UL;
1025 unsigned long flags
;
1029 * Not having a register set can lead to trouble.
1030 * Also starfire doesn't have a tod clock.
1032 if (!mregs
&& !dregs
)
1036 spin_lock_irqsave(&mostek_lock
, flags
);
1038 /* Read the current RTC minutes. */
1039 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1040 tmp
|= MSTK_CREG_READ
;
1041 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1043 chip_minutes
= MSTK_REG_MIN(mregs
);
1045 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1046 tmp
&= ~MSTK_CREG_READ
;
1047 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1050 * since we're only adjusting minutes and seconds,
1051 * don't interfere with hour overflow. This avoids
1052 * messing with unknown time zones but requires your
1053 * RTC not to be off by more than 15 minutes
1055 real_seconds
= nowtime
% 60;
1056 real_minutes
= nowtime
/ 60;
1057 if (((abs(real_minutes
- chip_minutes
) + 15)/30) & 1)
1058 real_minutes
+= 30; /* correct for half hour time zone */
1061 if (abs(real_minutes
- chip_minutes
) < 30) {
1062 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1063 tmp
|= MSTK_CREG_WRITE
;
1064 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1066 MSTK_SET_REG_SEC(mregs
,real_seconds
);
1067 MSTK_SET_REG_MIN(mregs
,real_minutes
);
1069 tmp
= mostek_read(mregs
+ MOSTEK_CREG
);
1070 tmp
&= ~MSTK_CREG_WRITE
;
1071 mostek_write(mregs
+ MOSTEK_CREG
, tmp
);
1073 spin_unlock_irqrestore(&mostek_lock
, flags
);
1077 spin_unlock_irqrestore(&mostek_lock
, flags
);
1083 unsigned char save_control
, save_freq_select
;
1085 /* Stolen from arch/i386/kernel/time.c, see there for
1086 * credits and descriptive comments.
1088 spin_lock_irqsave(&rtc_lock
, flags
);
1089 save_control
= CMOS_READ(RTC_CONTROL
); /* tell the clock it's being set */
1090 CMOS_WRITE((save_control
|RTC_SET
), RTC_CONTROL
);
1092 save_freq_select
= CMOS_READ(RTC_FREQ_SELECT
); /* stop and reset prescaler */
1093 CMOS_WRITE((save_freq_select
|RTC_DIV_RESET2
), RTC_FREQ_SELECT
);
1095 chip_minutes
= CMOS_READ(RTC_MINUTES
);
1096 if (!(save_control
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
)
1097 BCD_TO_BIN(chip_minutes
);
1098 real_seconds
= nowtime
% 60;
1099 real_minutes
= nowtime
/ 60;
1100 if (((abs(real_minutes
- chip_minutes
) + 15)/30) & 1)
1104 if (abs(real_minutes
- chip_minutes
) < 30) {
1105 if (!(save_control
& RTC_DM_BINARY
) || RTC_ALWAYS_BCD
) {
1106 BIN_TO_BCD(real_seconds
);
1107 BIN_TO_BCD(real_minutes
);
1109 CMOS_WRITE(real_seconds
,RTC_SECONDS
);
1110 CMOS_WRITE(real_minutes
,RTC_MINUTES
);
1113 "set_rtc_mmss: can't update from %d to %d\n",
1114 chip_minutes
, real_minutes
);
1118 CMOS_WRITE(save_control
, RTC_CONTROL
);
1119 CMOS_WRITE(save_freq_select
, RTC_FREQ_SELECT
);
1120 spin_unlock_irqrestore(&rtc_lock
, flags
);
1126 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1127 static unsigned char mini_rtc_status
; /* bitmapped status byte. */
1129 /* months start at 0 now */
1130 static unsigned char days_in_mo
[] =
1131 {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
1134 #define STARTOFTIME 1970
1135 #define SECDAY 86400L
1136 #define SECYR (SECDAY * 365)
1137 #define leapyear(year) ((year) % 4 == 0 && \
1138 ((year) % 100 != 0 || (year) % 400 == 0))
1139 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1140 #define days_in_month(a) (month_days[(a) - 1])
1142 static int month_days
[12] = {
1143 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1147 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1149 static void GregorianDay(struct rtc_time
* tm
)
1154 int MonthOffset
[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1156 lastYear
= tm
->tm_year
- 1;
1159 * Number of leap corrections to apply up to end of last year
1161 leapsToDate
= lastYear
/ 4 - lastYear
/ 100 + lastYear
/ 400;
1164 * This year is a leap year if it is divisible by 4 except when it is
1165 * divisible by 100 unless it is divisible by 400
1167 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1169 day
= tm
->tm_mon
> 2 && leapyear(tm
->tm_year
);
1171 day
+= lastYear
*365 + leapsToDate
+ MonthOffset
[tm
->tm_mon
-1] +
1174 tm
->tm_wday
= day
% 7;
1177 static void to_tm(int tim
, struct rtc_time
*tm
)
1180 register long hms
, day
;
1185 /* Hours, minutes, seconds are easy */
1186 tm
->tm_hour
= hms
/ 3600;
1187 tm
->tm_min
= (hms
% 3600) / 60;
1188 tm
->tm_sec
= (hms
% 3600) % 60;
1190 /* Number of years in days */
1191 for (i
= STARTOFTIME
; day
>= days_in_year(i
); i
++)
1192 day
-= days_in_year(i
);
1195 /* Number of months in days left */
1196 if (leapyear(tm
->tm_year
))
1197 days_in_month(FEBRUARY
) = 29;
1198 for (i
= 1; day
>= days_in_month(i
); i
++)
1199 day
-= days_in_month(i
);
1200 days_in_month(FEBRUARY
) = 28;
1203 /* Days are what is left over (+1) from all that. */
1204 tm
->tm_mday
= day
+ 1;
1207 * Determine the day of week
1212 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1213 * aka Unix time. So we have to convert to/from rtc_time.
1215 static inline void mini_get_rtc_time(struct rtc_time
*time
)
1217 unsigned long flags
;
1220 spin_lock_irqsave(&rtc_lock
, flags
);
1222 if (this_is_starfire
)
1223 seconds
= starfire_get_time();
1224 else if (tlb_type
== hypervisor
)
1225 seconds
= hypervisor_get_time();
1226 spin_unlock_irqrestore(&rtc_lock
, flags
);
1228 to_tm(seconds
, time
);
1229 time
->tm_year
-= 1900;
1233 static inline int mini_set_rtc_time(struct rtc_time
*time
)
1235 u32 seconds
= mktime(time
->tm_year
+ 1900, time
->tm_mon
+ 1,
1236 time
->tm_mday
, time
->tm_hour
,
1237 time
->tm_min
, time
->tm_sec
);
1238 unsigned long flags
;
1241 spin_lock_irqsave(&rtc_lock
, flags
);
1243 if (this_is_starfire
)
1244 err
= starfire_set_time(seconds
);
1245 else if (tlb_type
== hypervisor
)
1246 err
= hypervisor_set_time(seconds
);
1247 spin_unlock_irqrestore(&rtc_lock
, flags
);
1252 static int mini_rtc_ioctl(struct inode
*inode
, struct file
*file
,
1253 unsigned int cmd
, unsigned long arg
)
1255 struct rtc_time wtime
;
1256 void __user
*argp
= (void __user
*)arg
;
1266 case RTC_UIE_OFF
: /* disable ints from RTC updates. */
1269 case RTC_UIE_ON
: /* enable ints for RTC updates. */
1272 case RTC_RD_TIME
: /* Read the time/date from RTC */
1273 /* this doesn't get week-day, who cares */
1274 memset(&wtime
, 0, sizeof(wtime
));
1275 mini_get_rtc_time(&wtime
);
1277 return copy_to_user(argp
, &wtime
, sizeof(wtime
)) ? -EFAULT
: 0;
1279 case RTC_SET_TIME
: /* Set the RTC */
1282 unsigned char leap_yr
;
1284 if (!capable(CAP_SYS_TIME
))
1287 if (copy_from_user(&wtime
, argp
, sizeof(wtime
)))
1290 year
= wtime
.tm_year
+ 1900;
1291 leap_yr
= ((!(year
% 4) && (year
% 100)) ||
1294 if ((wtime
.tm_mon
< 0 || wtime
.tm_mon
> 11) || (wtime
.tm_mday
< 1))
1297 if (wtime
.tm_mday
< 0 || wtime
.tm_mday
>
1298 (days_in_mo
[wtime
.tm_mon
] + ((wtime
.tm_mon
== 1) && leap_yr
)))
1301 if (wtime
.tm_hour
< 0 || wtime
.tm_hour
>= 24 ||
1302 wtime
.tm_min
< 0 || wtime
.tm_min
>= 60 ||
1303 wtime
.tm_sec
< 0 || wtime
.tm_sec
>= 60)
1306 return mini_set_rtc_time(&wtime
);
1313 static int mini_rtc_open(struct inode
*inode
, struct file
*file
)
1315 if (mini_rtc_status
& RTC_IS_OPEN
)
1318 mini_rtc_status
|= RTC_IS_OPEN
;
1323 static int mini_rtc_release(struct inode
*inode
, struct file
*file
)
1325 mini_rtc_status
&= ~RTC_IS_OPEN
;
1330 static const struct file_operations mini_rtc_fops
= {
1331 .owner
= THIS_MODULE
,
1332 .ioctl
= mini_rtc_ioctl
,
1333 .open
= mini_rtc_open
,
1334 .release
= mini_rtc_release
,
1337 static struct miscdevice rtc_mini_dev
=
1341 .fops
= &mini_rtc_fops
,
1344 static int __init
rtc_mini_init(void)
1348 if (tlb_type
!= hypervisor
&& !this_is_starfire
)
1351 printk(KERN_INFO
"Mini RTC Driver\n");
1353 retval
= misc_register(&rtc_mini_dev
);
1360 static void __exit
rtc_mini_exit(void)
1362 misc_deregister(&rtc_mini_dev
);
1366 module_init(rtc_mini_init
);
1367 module_exit(rtc_mini_exit
);