2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/clk-provider.h>
17 #include <linux/of_fdt.h>
18 #include <linux/of_platform.h>
19 #include <linux/cache.h>
20 #include <asm/sections.h>
21 #include <asm/arcregs.h>
23 #include <asm/setup.h>
26 #include <asm/unwind.h>
28 #include <asm/mach_desc.h>
31 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
33 /* Part of U-boot ABI: see head.S */
34 int __initdata uboot_tag
;
35 char __initdata
*uboot_arg
;
37 const struct machine_desc
*machine_desc
;
39 struct task_struct
*_current_task
[NR_CPUS
]; /* For stack switching */
41 struct cpuinfo_arc cpuinfo_arc700
[NR_CPUS
];
43 static void read_arc_build_cfg_regs(void)
45 struct bcr_perip uncached_space
;
46 struct bcr_generic bcr
;
47 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
50 READ_BCR(AUX_IDENTITY
, cpu
->core
);
51 READ_BCR(ARC_REG_ISA_CFG_BCR
, cpu
->isa
);
53 READ_BCR(ARC_REG_TIMERS_BCR
, cpu
->timers
);
54 cpu
->vec_base
= read_aux_reg(AUX_INTR_VEC_BASE
);
56 READ_BCR(ARC_REG_D_UNCACH_BCR
, uncached_space
);
57 cpu
->uncached_base
= uncached_space
.start
<< 24;
59 READ_BCR(ARC_REG_MUL_BCR
, cpu
->extn_mpy
);
61 cpu
->extn
.norm
= read_aux_reg(ARC_REG_NORM_BCR
) > 1 ? 1 : 0; /* 2,3 */
62 cpu
->extn
.barrel
= read_aux_reg(ARC_REG_BARREL_BCR
) > 1 ? 1 : 0; /* 2,3 */
63 cpu
->extn
.swap
= read_aux_reg(ARC_REG_SWAP_BCR
) ? 1 : 0; /* 1,3 */
64 cpu
->extn
.crc
= read_aux_reg(ARC_REG_CRC_BCR
) ? 1 : 0;
65 cpu
->extn
.minmax
= read_aux_reg(ARC_REG_MIXMAX_BCR
) > 1 ? 1 : 0; /* 2 */
67 /* Note that we read the CCM BCRs independent of kernel config
68 * This is to catch the cases where user doesn't know that
69 * CCMs are present in hardware build
74 struct bcr_dccm_base dccm_base
;
75 unsigned int bcr_32bit_val
;
77 bcr_32bit_val
= read_aux_reg(ARC_REG_ICCM_BCR
);
79 iccm
= *((struct bcr_iccm
*)&bcr_32bit_val
);
80 cpu
->iccm
.base_addr
= iccm
.base
<< 16;
81 cpu
->iccm
.sz
= 0x2000 << (iccm
.sz
- 1);
84 bcr_32bit_val
= read_aux_reg(ARC_REG_DCCM_BCR
);
86 dccm
= *((struct bcr_dccm
*)&bcr_32bit_val
);
87 cpu
->dccm
.sz
= 0x800 << (dccm
.sz
);
89 READ_BCR(ARC_REG_DCCMBASE_BCR
, dccm_base
);
90 cpu
->dccm
.base_addr
= dccm_base
.addr
<< 8;
94 READ_BCR(ARC_REG_XY_MEM_BCR
, cpu
->extn_xymem
);
96 read_decode_mmu_bcr();
97 read_decode_cache_bcr();
100 struct bcr_fp_arcompact sp
, dp
;
101 struct bcr_bpu_arcompact bpu
;
103 READ_BCR(ARC_REG_FP_BCR
, sp
);
104 READ_BCR(ARC_REG_DPFP_BCR
, dp
);
105 cpu
->extn
.fpu_sp
= sp
.ver
? 1 : 0;
106 cpu
->extn
.fpu_dp
= dp
.ver
? 1 : 0;
108 READ_BCR(ARC_REG_BPU_BCR
, bpu
);
109 cpu
->bpu
.ver
= bpu
.ver
;
110 cpu
->bpu
.full
= bpu
.fam
? 1 : 0;
112 cpu
->bpu
.num_cache
= 256 << (bpu
.ent
- 1);
113 cpu
->bpu
.num_pred
= 256 << (bpu
.ent
- 1);
117 READ_BCR(ARC_REG_AP_BCR
, bcr
);
118 cpu
->extn
.ap
= bcr
.ver
? 1 : 0;
120 READ_BCR(ARC_REG_SMART_BCR
, bcr
);
121 cpu
->extn
.smart
= bcr
.ver
? 1 : 0;
123 cpu
->extn
.debug
= cpu
->extn
.ap
| cpu
->extn
.smart
;
126 static const struct cpuinfo_data arc_cpu_tbl
[] = {
127 { {0x20, "ARC 600" }, 0x2F},
128 { {0x30, "ARC 700" }, 0x33},
129 { {0x34, "ARC 700 R4.10"}, 0x34},
130 { {0x35, "ARC 700 R4.11"}, 0x35},
134 #define IS_AVAIL1(v, str) ((v) ? str : "")
135 #define IS_USED(cfg) (IS_ENABLED(cfg) ? "" : "(not used) ")
136 #define IS_AVAIL2(v, str, cfg) IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg))
138 static char *arc_cpu_mumbojumbo(int cpu_id
, char *buf
, int len
)
140 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
141 struct bcr_identity
*core
= &cpu
->core
;
142 const struct cpuinfo_data
*tbl
;
150 isa_nm
= "ARCompact";
151 be
= IS_ENABLED(CONFIG_CPU_BIG_ENDIAN
);
153 atomic
= cpu
->isa
.atomic1
;
154 if (!cpu
->isa
.ver
) /* ISA BCR absent, use Kconfig info */
155 atomic
= IS_ENABLED(CONFIG_ARC_HAS_LLSC
);
158 n
+= scnprintf(buf
+ n
, len
- n
,
159 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
160 core
->family
, core
->cpu_id
, core
->chip_id
);
162 for (tbl
= &arc_cpu_tbl
[0]; tbl
->info
.id
!= 0; tbl
++) {
163 if ((core
->family
>= tbl
->info
.id
) &&
164 (core
->family
<= tbl
->up_range
)) {
165 n
+= scnprintf(buf
+ n
, len
- n
,
166 "processor [%d]\t: %s (%s ISA) %s\n",
167 cpu_id
, tbl
->info
.str
, isa_nm
,
168 IS_AVAIL1(be
, "[Big-Endian]"));
173 if (tbl
->info
.id
== 0)
174 n
+= scnprintf(buf
+ n
, len
- n
, "UNKNOWN ARC Processor\n");
176 n
+= scnprintf(buf
+ n
, len
- n
, "CPU speed\t: %u.%02u Mhz\n",
177 (unsigned int)(arc_get_core_freq() / 1000000),
178 (unsigned int)(arc_get_core_freq() / 10000) % 100);
180 n
+= scnprintf(buf
+ n
, len
- n
, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
181 IS_AVAIL1(cpu
->timers
.t0
, "Timer0 "),
182 IS_AVAIL1(cpu
->timers
.t1
, "Timer1 "),
183 IS_AVAIL2(cpu
->timers
.rtsc
, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC
));
185 n
+= i
= scnprintf(buf
+ n
, len
- n
, "%s%s",
186 IS_AVAIL2(atomic
, "atomic ", CONFIG_ARC_HAS_LLSC
));
189 n
+= scnprintf(buf
+ n
, len
- n
, "\n\t\t: ");
191 n
+= scnprintf(buf
+ n
, len
- n
, "%s%s%s%s%s%s%s%s\n",
192 IS_AVAIL1(cpu
->extn_mpy
.ver
, "mpy "),
193 IS_AVAIL1(cpu
->extn
.norm
, "norm "),
194 IS_AVAIL1(cpu
->extn
.barrel
, "barrel-shift "),
195 IS_AVAIL1(cpu
->extn
.swap
, "swap "),
196 IS_AVAIL1(cpu
->extn
.minmax
, "minmax "),
197 IS_AVAIL1(cpu
->extn
.crc
, "crc "),
198 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE
));
201 n
+= scnprintf(buf
+ n
, len
- n
,
202 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
203 IS_AVAIL1(cpu
->bpu
.full
, "full"),
204 IS_AVAIL1(!cpu
->bpu
.full
, "partial"),
205 cpu
->bpu
.num_cache
, cpu
->bpu
.num_pred
);
210 static char *arc_extn_mumbojumbo(int cpu_id
, char *buf
, int len
)
213 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[cpu_id
];
217 n
+= scnprintf(buf
+ n
, len
- n
,
218 "Vector Table\t: %#x\nUncached Base\t: %#x\n",
219 cpu
->vec_base
, cpu
->uncached_base
);
221 if (cpu
->extn
.fpu_sp
|| cpu
->extn
.fpu_dp
)
222 n
+= scnprintf(buf
+ n
, len
- n
, "FPU\t\t: %s%s\n",
223 IS_AVAIL1(cpu
->extn
.fpu_sp
, "SP "),
224 IS_AVAIL1(cpu
->extn
.fpu_dp
, "DP "));
227 n
+= scnprintf(buf
+ n
, len
- n
, "DEBUG\t\t: %s%s%s\n",
228 IS_AVAIL1(cpu
->extn
.ap
, "ActionPoint "),
229 IS_AVAIL1(cpu
->extn
.smart
, "smaRT "),
230 IS_AVAIL1(cpu
->extn
.rtt
, "RTT "));
232 if (cpu
->dccm
.sz
|| cpu
->iccm
.sz
)
233 n
+= scnprintf(buf
+ n
, len
- n
, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
234 cpu
->dccm
.base_addr
, TO_KB(cpu
->dccm
.sz
),
235 cpu
->iccm
.base_addr
, TO_KB(cpu
->iccm
.sz
));
237 n
+= scnprintf(buf
+ n
, len
- n
,
238 "OS ABI [v3]\t: no-legacy-syscalls\n");
243 static void arc_chk_core_config(void)
245 struct cpuinfo_arc
*cpu
= &cpuinfo_arc700
[smp_processor_id()];
249 panic("Timer0 is not present!\n");
252 panic("Timer1 is not present!\n");
254 if (IS_ENABLED(CONFIG_ARC_HAS_RTSC
) && !cpu
->timers
.rtsc
)
255 panic("RTSC is not present\n");
257 #ifdef CONFIG_ARC_HAS_DCCM
259 * DCCM can be arbit placed in hardware.
260 * Make sure it's placement/sz matches what Linux is built with
262 if ((unsigned int)__arc_dccm_base
!= cpu
->dccm
.base_addr
)
263 panic("Linux built with incorrect DCCM Base address\n");
265 if (CONFIG_ARC_DCCM_SZ
!= cpu
->dccm
.sz
)
266 panic("Linux built with incorrect DCCM Size\n");
269 #ifdef CONFIG_ARC_HAS_ICCM
270 if (CONFIG_ARC_ICCM_SZ
!= cpu
->iccm
.sz
)
271 panic("Linux built with incorrect ICCM Size\n");
275 * FP hardware/software config sanity
276 * -If hardware contains DPFP, kernel needs to save/restore FPU state
277 * -If not, it will crash trying to save/restore the non-existant regs
279 * (only DPDP checked since SP has no arch visible regs)
281 fpu_enabled
= IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE
);
283 if (cpu
->extn
.fpu_dp
&& !fpu_enabled
)
284 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
285 else if (!cpu
->extn
.fpu_dp
&& fpu_enabled
)
286 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
290 * Initialize and setup the processor core
291 * This is called by all the CPUs thus should not do special case stuff
292 * such as only for boot CPU etc
295 void setup_processor(void)
298 int cpu_id
= smp_processor_id();
300 read_arc_build_cfg_regs();
303 printk(arc_cpu_mumbojumbo(cpu_id
, str
, sizeof(str
)));
308 printk(arc_extn_mumbojumbo(cpu_id
, str
, sizeof(str
)));
309 printk(arc_platform_smp_cpuinfo());
311 arc_chk_core_config();
314 static inline int is_kernel(unsigned long addr
)
316 if (addr
>= (unsigned long)_stext
&& addr
<= (unsigned long)_end
)
321 void __init
setup_arch(char **cmdline_p
)
323 /* make sure that uboot passed pointer to cmdline/dtb is valid */
324 if (uboot_tag
&& is_kernel((unsigned long)uboot_arg
))
325 panic("Invalid uboot arg\n");
327 /* See if u-boot passed an external Device Tree blob */
328 machine_desc
= setup_machine_fdt(uboot_arg
); /* uboot_tag == 2 */
330 /* No, so try the embedded one */
331 machine_desc
= setup_machine_fdt(__dtb_start
);
333 panic("Embedded DT invalid\n");
336 * If we are here, it is established that @uboot_arg didn't
337 * point to DT blob. Instead if u-boot says it is cmdline,
338 * Appent to embedded DT cmdline.
339 * setup_machine_fdt() would have populated @boot_command_line
341 if (uboot_tag
== 1) {
342 /* Ensure a whitespace between the 2 cmdlines */
343 strlcat(boot_command_line
, " ", COMMAND_LINE_SIZE
);
344 strlcat(boot_command_line
, uboot_arg
,
349 /* Save unparsed command line copy for /proc/cmdline */
350 *cmdline_p
= boot_command_line
;
352 /* To force early parsing of things like mem=xxx */
355 /* Platform/board specific: e.g. early console registration */
356 if (machine_desc
->init_early
)
357 machine_desc
->init_early();
363 /* copy flat DT out of .init and then unflatten it */
364 unflatten_and_copy_device_tree();
366 /* Can be issue if someone passes cmd line arg "ro"
367 * But that is unlikely so keeping it as it is
369 root_mountflags
&= ~MS_RDONLY
;
371 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
372 conswitchp
= &dummy_con
;
379 static int __init
customize_machine(void)
383 * Traverses flattened DeviceTree - registering platform devices
384 * (if any) complete with their resources
386 of_platform_populate(NULL
, of_default_bus_match_table
, NULL
, NULL
);
388 if (machine_desc
->init_machine
)
389 machine_desc
->init_machine();
393 arch_initcall(customize_machine
);
395 static int __init
init_late_machine(void)
397 if (machine_desc
->init_late
)
398 machine_desc
->init_late();
402 late_initcall(init_late_machine
);
404 * Get CPU information for use by the procfs.
407 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
408 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
410 static int show_cpuinfo(struct seq_file
*m
, void *v
)
413 int cpu_id
= ptr_to_cpu(v
);
415 if (!cpu_online(cpu_id
)) {
416 seq_printf(m
, "processor [%d]\t: Offline\n", cpu_id
);
420 str
= (char *)__get_free_page(GFP_TEMPORARY
);
424 seq_printf(m
, arc_cpu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
426 seq_printf(m
, "Bogo MIPS\t: %lu.%02lu\n",
427 loops_per_jiffy
/ (500000 / HZ
),
428 (loops_per_jiffy
/ (5000 / HZ
)) % 100);
430 seq_printf(m
, arc_mmu_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
431 seq_printf(m
, arc_cache_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
432 seq_printf(m
, arc_extn_mumbojumbo(cpu_id
, str
, PAGE_SIZE
));
433 seq_printf(m
, arc_platform_smp_cpuinfo());
435 free_page((unsigned long)str
);
442 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
445 * Callback returns cpu-id to iterator for show routine, NULL to stop.
446 * However since NULL is also a valid cpu-id (0), we use a round-about
447 * way to pass it w/o having to kmalloc/free a 2 byte string.
448 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
450 return *pos
< num_possible_cpus() ? cpu_to_ptr(*pos
) : NULL
;
453 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
456 return c_start(m
, pos
);
459 static void c_stop(struct seq_file
*m
, void *v
)
463 const struct seq_operations cpuinfo_op
= {
470 static DEFINE_PER_CPU(struct cpu
, cpu_topology
);
472 static int __init
topology_init(void)
476 for_each_present_cpu(cpu
)
477 register_cpu(&per_cpu(cpu_topology
, cpu
), cpu
);
482 subsys_initcall(topology_init
);