arch/blackfin/include/uapi/asm/fixed_code.h

   1 /*
   2  * This file defines the fixed addresses where userspace programs
   3  * can find atomic code sequences.
   4  *
   5  * Copyright 2007-2008 Analog Devices Inc.
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #ifndef _UAPI__BFIN_ASM_FIXED_CODE_H__
  11 #define _UAPI__BFIN_ASM_FIXED_CODE_H__
  12
  13
  14 #ifndef CONFIG_PHY_RAM_BASE_ADDRESS
  15 #define CONFIG_PHY_RAM_BASE_ADDRESS     0x0
  16 #endif
  17
  18 #define FIXED_CODE_START        (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
  19
  20 #define SIGRETURN_STUB          (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
  21
  22 #define ATOMIC_SEQS_START       (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
  23
  24 #define ATOMIC_XCHG32           (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
  25 #define ATOMIC_CAS32            (CONFIG_PHY_RAM_BASE_ADDRESS + 0x420)
  26 #define ATOMIC_ADD32            (CONFIG_PHY_RAM_BASE_ADDRESS + 0x430)
  27 #define ATOMIC_SUB32            (CONFIG_PHY_RAM_BASE_ADDRESS + 0x440)
  28 #define ATOMIC_IOR32            (CONFIG_PHY_RAM_BASE_ADDRESS + 0x450)
  29 #define ATOMIC_AND32            (CONFIG_PHY_RAM_BASE_ADDRESS + 0x460)
  30 #define ATOMIC_XOR32            (CONFIG_PHY_RAM_BASE_ADDRESS + 0x470)
  31
  32 #define ATOMIC_SEQS_END         (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
  33
  34 #define SAFE_USER_INSTRUCTION   (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
  35
  36 #define FIXED_CODE_END          (CONFIG_PHY_RAM_BASE_ADDRESS + 0x490)
  37
  38 #endif /* _UAPI__BFIN_ASM_FIXED_CODE_H__ */