arch/blackfin/mach-bf537/include/mach/bf537.h

   1 /*
   2  * System MMR Register and memory map for ADSP-BF537
   3  *
   4  * Copyright 2005-2008 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #ifndef __MACH_BF537_H__
  10 #define __MACH_BF537_H__
  11
  12 #define OFFSET_(x) ((x) & 0x0000FFFF)
  13
  14 /*some misc defines*/
  15 #define IMASK_IVG15             0x8000
  16 #define IMASK_IVG14             0x4000
  17 #define IMASK_IVG13             0x2000
  18 #define IMASK_IVG12             0x1000
  19
  20 #define IMASK_IVG11             0x0800
  21 #define IMASK_IVG10             0x0400
  22 #define IMASK_IVG9              0x0200
  23 #define IMASK_IVG8              0x0100
  24
  25 #define IMASK_IVG7              0x0080
  26 #define IMASK_IVGTMR    0x0040
  27 #define IMASK_IVGHW             0x0020
  28
  29 /***************************/
  30
  31
  32 #define BFIN_DSUBBANKS  4
  33 #define BFIN_DWAYS              2
  34 #define BFIN_DLINES             64
  35 #define BFIN_ISUBBANKS  4
  36 #define BFIN_IWAYS              4
  37 #define BFIN_ILINES             32
  38
  39 #define WAY0_L                  0x1
  40 #define WAY1_L                  0x2
  41 #define WAY01_L                 0x3
  42 #define WAY2_L                  0x4
  43 #define WAY02_L                 0x5
  44 #define WAY12_L                 0x6
  45 #define WAY012_L                0x7
  46
  47 #define WAY3_L                  0x8
  48 #define WAY03_L                 0x9
  49 #define WAY13_L                 0xA
  50 #define WAY013_L                0xB
  51
  52 #define WAY32_L                 0xC
  53 #define WAY320_L                0xD
  54 #define WAY321_L                0xE
  55 #define WAYALL_L                0xF
  56
  57 #define DMC_ENABLE (2<<2)       /*yes, 2, not 1 */
  58
  59 /********************************* EBIU Settings ************************************/
  60 #define AMBCTL0VAL      ((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)
  61 #define AMBCTL1VAL      ((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)
  62
  63 #ifdef CONFIG_C_AMBEN_ALL
  64 #define V_AMBEN AMBEN_ALL
  65 #endif
  66 #ifdef CONFIG_C_AMBEN
  67 #define V_AMBEN 0x0
  68 #endif
  69 #ifdef CONFIG_C_AMBEN_B0
  70 #define V_AMBEN AMBEN_B0
  71 #endif
  72 #ifdef CONFIG_C_AMBEN_B0_B1
  73 #define V_AMBEN AMBEN_B0_B1
  74 #endif
  75 #ifdef CONFIG_C_AMBEN_B0_B1_B2
  76 #define V_AMBEN AMBEN_B0_B1_B2
  77 #endif
  78 #ifdef CONFIG_C_AMCKEN
  79 #define V_AMCKEN AMCKEN
  80 #else
  81 #define V_AMCKEN 0x0
  82 #endif
  83 #ifdef CONFIG_C_CDPRIO
  84 #define V_CDPRIO 0x100
  85 #else
  86 #define V_CDPRIO 0x0
  87 #endif
  88
  89 #define AMGCTLVAL       (V_AMBEN | V_AMCKEN | V_CDPRIO)
  90
  91 #ifdef CONFIG_BF537
  92 #define CPU "BF537"
  93 #define CPUID 0x27c8
  94 #endif
  95 #ifdef CONFIG_BF536
  96 #define CPU "BF536"
  97 #define CPUID 0x27c8
  98 #endif
  99 #ifdef CONFIG_BF534
 100 #define CPU "BF534"
 101 #define CPUID 0x27c6
 102 #endif
 103
 104 #ifndef CPU
 105 #error "Unknown CPU type - This kernel doesn't seem to be configured properly"
 106 #endif
 107
 108 #endif                          /* __MACH_BF537_H__  */