arch/arm/mach-mx5/board-mx51_babbage.c

   1 /*
   2  * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/i2c.h>
  16 #include <linux/gpio.h>
  17 #include <linux/delay.h>
  18 #include <linux/io.h>
  19 #include <linux/input.h>
  20 #include <linux/spi/flash.h>
  21 #include <linux/spi/spi.h>
  22
  23 #include <mach/common.h>
  24 #include <mach/hardware.h>
  25 #include <mach/iomux-mx51.h>
  26
  27 #include <asm/irq.h>
  28 #include <asm/setup.h>
  29 #include <asm/mach-types.h>
  30 #include <asm/mach/arch.h>
  31 #include <asm/mach/time.h>
  32
  33 #include "devices-imx51.h"
  34 #include "devices.h"
  35 #include "cpu_op-mx51.h"
  36
  37 #define BABBAGE_USB_HUB_RESET   IMX_GPIO_NR(1, 7)
  38 #define BABBAGE_USBH1_STP       IMX_GPIO_NR(1, 27)
  39 #define BABBAGE_PHY_RESET       IMX_GPIO_NR(2, 5)
  40 #define BABBAGE_FEC_PHY_RESET   IMX_GPIO_NR(2, 14)
  41 #define BABBAGE_POWER_KEY       IMX_GPIO_NR(2, 21)
  42 #define BABBAGE_ECSPI1_CS0      IMX_GPIO_NR(4, 24)
  43 #define BABBAGE_ECSPI1_CS1      IMX_GPIO_NR(4, 25)
  44
  45 /* USB_CTRL_1 */
  46 #define MX51_USB_CTRL_1_OFFSET                  0x10
  47 #define MX51_USB_CTRL_UH1_EXT_CLK_EN            (1 << 25)
  48
  49 #define MX51_USB_PLLDIV_12_MHZ          0x00
  50 #define MX51_USB_PLL_DIV_19_2_MHZ       0x01
  51 #define MX51_USB_PLL_DIV_24_MHZ 0x02
  52
  53 static struct gpio_keys_button babbage_buttons[] = {
  54         {
  55                 .gpio           = BABBAGE_POWER_KEY,
  56                 .code           = BTN_0,
  57                 .desc           = "PWR",
  58                 .active_low     = 1,
  59                 .wakeup         = 1,
  60         },
  61 };
  62
  63 static const struct gpio_keys_platform_data imx_button_data __initconst = {
  64         .buttons        = babbage_buttons,
  65         .nbuttons       = ARRAY_SIZE(babbage_buttons),
  66 };
  67
  68 static iomux_v3_cfg_t mx51babbage_pads[] = {
  69         /* UART1 */
  70         MX51_PAD_UART1_RXD__UART1_RXD,
  71         MX51_PAD_UART1_TXD__UART1_TXD,
  72         MX51_PAD_UART1_RTS__UART1_RTS,
  73         MX51_PAD_UART1_CTS__UART1_CTS,
  74
  75         /* UART2 */
  76         MX51_PAD_UART2_RXD__UART2_RXD,
  77         MX51_PAD_UART2_TXD__UART2_TXD,
  78
  79         /* UART3 */
  80         MX51_PAD_EIM_D25__UART3_RXD,
  81         MX51_PAD_EIM_D26__UART3_TXD,
  82         MX51_PAD_EIM_D27__UART3_RTS,
  83         MX51_PAD_EIM_D24__UART3_CTS,
  84
  85         /* I2C1 */
  86         MX51_PAD_EIM_D16__I2C1_SDA,
  87         MX51_PAD_EIM_D19__I2C1_SCL,
  88
  89         /* I2C2 */
  90         MX51_PAD_KEY_COL4__I2C2_SCL,
  91         MX51_PAD_KEY_COL5__I2C2_SDA,
  92
  93         /* HSI2C */
  94         MX51_PAD_I2C1_CLK__I2C1_CLK,
  95         MX51_PAD_I2C1_DAT__I2C1_DAT,
  96
  97         /* USB HOST1 */
  98         MX51_PAD_USBH1_CLK__USBH1_CLK,
  99         MX51_PAD_USBH1_DIR__USBH1_DIR,
 100         MX51_PAD_USBH1_NXT__USBH1_NXT,
 101         MX51_PAD_USBH1_DATA0__USBH1_DATA0,
 102         MX51_PAD_USBH1_DATA1__USBH1_DATA1,
 103         MX51_PAD_USBH1_DATA2__USBH1_DATA2,
 104         MX51_PAD_USBH1_DATA3__USBH1_DATA3,
 105         MX51_PAD_USBH1_DATA4__USBH1_DATA4,
 106         MX51_PAD_USBH1_DATA5__USBH1_DATA5,
 107         MX51_PAD_USBH1_DATA6__USBH1_DATA6,
 108         MX51_PAD_USBH1_DATA7__USBH1_DATA7,
 109
 110         /* USB HUB reset line*/
 111         MX51_PAD_GPIO1_7__GPIO1_7,
 112
 113         /* FEC */
 114         MX51_PAD_EIM_EB2__FEC_MDIO,
 115         MX51_PAD_EIM_EB3__FEC_RDATA1,
 116         MX51_PAD_EIM_CS2__FEC_RDATA2,
 117         MX51_PAD_EIM_CS3__FEC_RDATA3,
 118         MX51_PAD_EIM_CS4__FEC_RX_ER,
 119         MX51_PAD_EIM_CS5__FEC_CRS,
 120         MX51_PAD_NANDF_RB2__FEC_COL,
 121         MX51_PAD_NANDF_RB3__FEC_RX_CLK,
 122         MX51_PAD_NANDF_D9__FEC_RDATA0,
 123         MX51_PAD_NANDF_D8__FEC_TDATA0,
 124         MX51_PAD_NANDF_CS2__FEC_TX_ER,
 125         MX51_PAD_NANDF_CS3__FEC_MDC,
 126         MX51_PAD_NANDF_CS4__FEC_TDATA1,
 127         MX51_PAD_NANDF_CS5__FEC_TDATA2,
 128         MX51_PAD_NANDF_CS6__FEC_TDATA3,
 129         MX51_PAD_NANDF_CS7__FEC_TX_EN,
 130         MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
 131
 132         /* FEC PHY reset line */
 133         MX51_PAD_EIM_A20__GPIO2_14,
 134
 135         /* SD 1 */
 136         MX51_PAD_SD1_CMD__SD1_CMD,
 137         MX51_PAD_SD1_CLK__SD1_CLK,
 138         MX51_PAD_SD1_DATA0__SD1_DATA0,
 139         MX51_PAD_SD1_DATA1__SD1_DATA1,
 140         MX51_PAD_SD1_DATA2__SD1_DATA2,
 141         MX51_PAD_SD1_DATA3__SD1_DATA3,
 142
 143         /* SD 2 */
 144         MX51_PAD_SD2_CMD__SD2_CMD,
 145         MX51_PAD_SD2_CLK__SD2_CLK,
 146         MX51_PAD_SD2_DATA0__SD2_DATA0,
 147         MX51_PAD_SD2_DATA1__SD2_DATA1,
 148         MX51_PAD_SD2_DATA2__SD2_DATA2,
 149         MX51_PAD_SD2_DATA3__SD2_DATA3,
 150
 151         /* eCSPI1 */
 152         MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
 153         MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
 154         MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
 155         MX51_PAD_CSPI1_SS0__GPIO4_24,
 156         MX51_PAD_CSPI1_SS1__GPIO4_25,
 157 };
 158
 159 /* Serial ports */
 160 static const struct imxuart_platform_data uart_pdata __initconst = {
 161         .flags = IMXUART_HAVE_RTSCTS,
 162 };
 163
 164 static const struct imxi2c_platform_data babbage_i2c_data __initconst = {
 165         .bitrate = 100000,
 166 };
 167
 168 static struct imxi2c_platform_data babbage_hsi2c_data = {
 169         .bitrate = 400000,
 170 };
 171
 172 static int gpio_usbh1_active(void)
 173 {
 174         iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27;
 175         iomux_v3_cfg_t phyreset_gpio = MX51_PAD_EIM_D21__GPIO2_5;
 176         int ret;
 177
 178         /* Set USBH1_STP to GPIO and toggle it */
 179         mxc_iomux_v3_setup_pad(usbh1stp_gpio);
 180         ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp");
 181
 182         if (ret) {
 183                 pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret);
 184                 return ret;
 185         }
 186         gpio_direction_output(BABBAGE_USBH1_STP, 0);
 187         gpio_set_value(BABBAGE_USBH1_STP, 1);
 188         msleep(100);
 189         gpio_free(BABBAGE_USBH1_STP);
 190
 191         /* De-assert USB PHY RESETB */
 192         mxc_iomux_v3_setup_pad(phyreset_gpio);
 193         ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset");
 194
 195         if (ret) {
 196                 pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret);
 197                 return ret;
 198         }
 199         gpio_direction_output(BABBAGE_PHY_RESET, 1);
 200         return 0;
 201 }
 202
 203 static inline void babbage_usbhub_reset(void)
 204 {
 205         int ret;
 206
 207         /* Reset USB hub */
 208         ret = gpio_request_one(BABBAGE_USB_HUB_RESET,
 209                                         GPIOF_OUT_INIT_LOW, "GPIO1_7");
 210         if (ret) {
 211                 printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret);
 212                 return;
 213         }
 214
 215         msleep(2);
 216         /* Deassert reset */
 217         gpio_set_value(BABBAGE_USB_HUB_RESET, 1);
 218 }
 219
 220 static inline void babbage_fec_reset(void)
 221 {
 222         int ret;
 223
 224         /* reset FEC PHY */
 225         ret = gpio_request_one(BABBAGE_FEC_PHY_RESET,
 226                                         GPIOF_OUT_INIT_LOW, "fec-phy-reset");
 227         if (ret) {
 228                 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
 229                 return;
 230         }
 231         msleep(1);
 232         gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
 233 }
 234
 235 /* This function is board specific as the bit mask for the plldiv will also
 236 be different for other Freescale SoCs, thus a common bitmask is not
 237 possible and cannot get place in /plat-mxc/ehci.c.*/
 238 static int initialize_otg_port(struct platform_device *pdev)
 239 {
 240         u32 v;
 241         void __iomem *usb_base;
 242         void __iomem *usbother_base;
 243
 244         usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
 245         if (!usb_base)
 246                 return -ENOMEM;
 247         usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
 248
 249         /* Set the PHY clock to 19.2MHz */
 250         v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
 251         v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
 252         v |= MX51_USB_PLL_DIV_19_2_MHZ;
 253         __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
 254         iounmap(usb_base);
 255
 256         mdelay(10);
 257
 258         return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
 259 }
 260
 261 static int initialize_usbh1_port(struct platform_device *pdev)
 262 {
 263         u32 v;
 264         void __iomem *usb_base;
 265         void __iomem *usbother_base;
 266
 267         usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
 268         if (!usb_base)
 269                 return -ENOMEM;
 270         usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
 271
 272         /* The clock for the USBH1 ULPI port will come externally from the PHY. */
 273         v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
 274         __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
 275         iounmap(usb_base);
 276
 277         mdelay(10);
 278
 279         return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |
 280                         MXC_EHCI_ITC_NO_THRESHOLD);
 281 }
 282
 283 static struct mxc_usbh_platform_data dr_utmi_config = {
 284         .init           = initialize_otg_port,
 285         .portsc = MXC_EHCI_UTMI_16BIT,
 286 };
 287
 288 static struct fsl_usb2_platform_data usb_pdata = {
 289         .operating_mode = FSL_USB2_DR_DEVICE,
 290         .phy_mode       = FSL_USB2_PHY_UTMI_WIDE,
 291 };
 292
 293 static struct mxc_usbh_platform_data usbh1_config = {
 294         .init           = initialize_usbh1_port,
 295         .portsc = MXC_EHCI_MODE_ULPI,
 296 };
 297
 298 static int otg_mode_host;
 299
 300 static int __init babbage_otg_mode(char *options)
 301 {
 302         if (!strcmp(options, "host"))
 303                 otg_mode_host = 1;
 304         else if (!strcmp(options, "device"))
 305                 otg_mode_host = 0;
 306         else
 307                 pr_info("otg_mode neither \"host\" nor \"device\". "
 308                         "Defaulting to device\n");
 309         return 0;
 310 }
 311 __setup("otg_mode=", babbage_otg_mode);
 312
 313 static struct spi_board_info mx51_babbage_spi_board_info[] __initdata = {
 314         {
 315                 .modalias = "mtd_dataflash",
 316                 .max_speed_hz = 25000000,
 317                 .bus_num = 0,
 318                 .chip_select = 1,
 319                 .mode = SPI_MODE_0,
 320                 .platform_data = NULL,
 321         },
 322 };
 323
 324 static int mx51_babbage_spi_cs[] = {
 325         BABBAGE_ECSPI1_CS0,
 326         BABBAGE_ECSPI1_CS1,
 327 };
 328
 329 static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = {
 330         .chipselect     = mx51_babbage_spi_cs,
 331         .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs),
 332 };
 333
 334 /*
 335  * Board specific initialization.
 336  */
 337 static void __init mx51_babbage_init(void)
 338 {
 339         iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
 340         iomux_v3_cfg_t power_key = _MX51_PAD_EIM_A27__GPIO2_21 |
 341                 MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP);
 342
 343 #if defined(CONFIG_CPU_FREQ_IMX)
 344         get_cpu_op = mx51_get_cpu_op;
 345 #endif
 346         mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
 347                                         ARRAY_SIZE(mx51babbage_pads));
 348
 349         imx51_add_imx_uart(0, &uart_pdata);
 350         imx51_add_imx_uart(1, &uart_pdata);
 351         imx51_add_imx_uart(2, &uart_pdata);
 352
 353         babbage_fec_reset();
 354         imx51_add_fec(NULL);
 355
 356         /* Set the PAD settings for the pwr key. */
 357         mxc_iomux_v3_setup_pad(power_key);
 358         imx_add_gpio_keys(&imx_button_data);
 359
 360         imx51_add_imx_i2c(0, &babbage_i2c_data);
 361         imx51_add_imx_i2c(1, &babbage_i2c_data);
 362         mxc_register_device(&mxc_hsi2c_device, &babbage_hsi2c_data);
 363
 364         if (otg_mode_host)
 365                 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
 366         else {
 367                 initialize_otg_port(NULL);
 368                 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
 369         }
 370
 371         gpio_usbh1_active();
 372         mxc_register_device(&mxc_usbh1_device, &usbh1_config);
 373         /* setback USBH1_STP to be function */
 374         mxc_iomux_v3_setup_pad(usbh1stp);
 375         babbage_usbhub_reset();
 376
 377         imx51_add_sdhci_esdhc_imx(0, NULL);
 378         imx51_add_sdhci_esdhc_imx(1, NULL);
 379
 380         spi_register_board_info(mx51_babbage_spi_board_info,
 381                 ARRAY_SIZE(mx51_babbage_spi_board_info));
 382         imx51_add_ecspi(0, &mx51_babbage_spi_pdata);
 383         imx51_add_imx2_wdt(0, NULL);
 384 }
 385
 386 static void __init mx51_babbage_timer_init(void)
 387 {
 388         mx51_clocks_init(32768, 24000000, 22579200, 0);
 389 }
 390
 391 static struct sys_timer mx51_babbage_timer = {
 392         .init = mx51_babbage_timer_init,
 393 };
 394
 395 MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
 396         /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
 397         .boot_params = MX51_PHYS_OFFSET + 0x100,
 398         .map_io = mx51_map_io,
 399         .init_early = imx51_init_early,
 400         .init_irq = mx51_init_irq,
 401         .timer = &mx51_babbage_timer,
 402         .init_machine = mx51_babbage_init,
 403 MACHINE_END