arch/arm/mach-at91rm9200/at91sam9261.c

   1 /*
   2  * arch/arm/mach-at91rm9200/at91sam9261.c
   3  *
   4  *  Copyright (C) 2005 SAN People
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #include <linux/module.h>
  14
  15 #include <asm/mach/arch.h>
  16 #include <asm/mach/map.h>
  17 #include <asm/arch/at91sam9261.h>
  18 #include <asm/arch/at91_pmc.h>
  19 #include <asm/arch/at91_rstc.h>
  20
  21 #include "generic.h"
  22 #include "clock.h"
  23
  24 static struct map_desc at91sam9261_io_desc[] __initdata = {
  25         {
  26                 .virtual        = AT91_VA_BASE_SYS,
  27                 .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  28                 .length         = SZ_16K,
  29                 .type           = MT_DEVICE,
  30         }, {
  31                 .virtual        = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
  32                 .pfn            = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
  33                 .length         = AT91SAM9261_SRAM_SIZE,
  34                 .type           = MT_DEVICE,
  35         },
  36 };
  37
  38 /* --------------------------------------------------------------------
  39  *  Clocks
  40  * -------------------------------------------------------------------- */
  41
  42 /*
  43  * The peripheral clocks.
  44  */
  45 static struct clk pioA_clk = {
  46         .name           = "pioA_clk",
  47         .pmc_mask       = 1 << AT91SAM9261_ID_PIOA,
  48         .type           = CLK_TYPE_PERIPHERAL,
  49 };
  50 static struct clk pioB_clk = {
  51         .name           = "pioB_clk",
  52         .pmc_mask       = 1 << AT91SAM9261_ID_PIOB,
  53         .type           = CLK_TYPE_PERIPHERAL,
  54 };
  55 static struct clk pioC_clk = {
  56         .name           = "pioC_clk",
  57         .pmc_mask       = 1 << AT91SAM9261_ID_PIOC,
  58         .type           = CLK_TYPE_PERIPHERAL,
  59 };
  60 static struct clk usart0_clk = {
  61         .name           = "usart0_clk",
  62         .pmc_mask       = 1 << AT91SAM9261_ID_US0,
  63         .type           = CLK_TYPE_PERIPHERAL,
  64 };
  65 static struct clk usart1_clk = {
  66         .name           = "usart1_clk",
  67         .pmc_mask       = 1 << AT91SAM9261_ID_US1,
  68         .type           = CLK_TYPE_PERIPHERAL,
  69 };
  70 static struct clk usart2_clk = {
  71         .name           = "usart2_clk",
  72         .pmc_mask       = 1 << AT91SAM9261_ID_US2,
  73         .type           = CLK_TYPE_PERIPHERAL,
  74 };
  75 static struct clk mmc_clk = {
  76         .name           = "mci_clk",
  77         .pmc_mask       = 1 << AT91SAM9261_ID_MCI,
  78         .type           = CLK_TYPE_PERIPHERAL,
  79 };
  80 static struct clk udc_clk = {
  81         .name           = "udc_clk",
  82         .pmc_mask       = 1 << AT91SAM9261_ID_UDP,
  83         .type           = CLK_TYPE_PERIPHERAL,
  84 };
  85 static struct clk twi_clk = {
  86         .name           = "twi_clk",
  87         .pmc_mask       = 1 << AT91SAM9261_ID_TWI,
  88         .type           = CLK_TYPE_PERIPHERAL,
  89 };
  90 static struct clk spi0_clk = {
  91         .name           = "spi0_clk",
  92         .pmc_mask       = 1 << AT91SAM9261_ID_SPI0,
  93         .type           = CLK_TYPE_PERIPHERAL,
  94 };
  95 static struct clk spi1_clk = {
  96         .name           = "spi1_clk",
  97         .pmc_mask       = 1 << AT91SAM9261_ID_SPI1,
  98         .type           = CLK_TYPE_PERIPHERAL,
  99 };
 100 static struct clk ohci_clk = {
 101         .name           = "ohci_clk",
 102         .pmc_mask       = 1 << AT91SAM9261_ID_UHP,
 103         .type           = CLK_TYPE_PERIPHERAL,
 104 };
 105 static struct clk lcdc_clk = {
 106         .name           = "lcdc_clk",
 107         .pmc_mask       = 1 << AT91SAM9261_ID_LCDC,
 108         .type           = CLK_TYPE_PERIPHERAL,
 109 };
 110
 111 static struct clk *periph_clocks[] __initdata = {
 112         &pioA_clk,
 113         &pioB_clk,
 114         &pioC_clk,
 115         &usart0_clk,
 116         &usart1_clk,
 117         &usart2_clk,
 118         &mmc_clk,
 119         &udc_clk,
 120         &twi_clk,
 121         &spi0_clk,
 122         &spi1_clk,
 123         // ssc 0 .. ssc2
 124         // tc0 .. tc2
 125         &ohci_clk,
 126         &lcdc_clk,
 127         // irq0 .. irq2
 128 };
 129
 130 /*
 131  * The four programmable clocks.
 132  * You must configure pin multiplexing to bring these signals out.
 133  */
 134 static struct clk pck0 = {
 135         .name           = "pck0",
 136         .pmc_mask       = AT91_PMC_PCK0,
 137         .type           = CLK_TYPE_PROGRAMMABLE,
 138         .id             = 0,
 139 };
 140 static struct clk pck1 = {
 141         .name           = "pck1",
 142         .pmc_mask       = AT91_PMC_PCK1,
 143         .type           = CLK_TYPE_PROGRAMMABLE,
 144         .id             = 1,
 145 };
 146 static struct clk pck2 = {
 147         .name           = "pck2",
 148         .pmc_mask       = AT91_PMC_PCK2,
 149         .type           = CLK_TYPE_PROGRAMMABLE,
 150         .id             = 2,
 151 };
 152 static struct clk pck3 = {
 153         .name           = "pck3",
 154         .pmc_mask       = AT91_PMC_PCK3,
 155         .type           = CLK_TYPE_PROGRAMMABLE,
 156         .id             = 3,
 157 };
 158
 159 /* HClocks */
 160 static struct clk hck0 = {
 161         .name           = "hck0",
 162         .pmc_mask       = AT91_PMC_HCK0,
 163         .type           = CLK_TYPE_SYSTEM,
 164         .id             = 0,
 165 };
 166 static struct clk hck1 = {
 167         .name           = "hck1",
 168         .pmc_mask       = AT91_PMC_HCK1,
 169         .type           = CLK_TYPE_SYSTEM,
 170         .id             = 1,
 171 };
 172
 173 static void __init at91sam9261_register_clocks(void)
 174 {
 175         int i;
 176
 177         for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 178                 clk_register(periph_clocks[i]);
 179
 180         clk_register(&pck0);
 181         clk_register(&pck1);
 182         clk_register(&pck2);
 183         clk_register(&pck3);
 184
 185         clk_register(&hck0);
 186         clk_register(&hck1);
 187 }
 188
 189 /* --------------------------------------------------------------------
 190  *  GPIO
 191  * -------------------------------------------------------------------- */
 192
 193 static struct at91_gpio_bank at91sam9261_gpio[] = {
 194         {
 195                 .id             = AT91SAM9261_ID_PIOA,
 196                 .offset         = AT91_PIOA,
 197                 .clock          = &pioA_clk,
 198         }, {
 199                 .id             = AT91SAM9261_ID_PIOB,
 200                 .offset         = AT91_PIOB,
 201                 .clock          = &pioB_clk,
 202         }, {
 203                 .id             = AT91SAM9261_ID_PIOC,
 204                 .offset         = AT91_PIOC,
 205                 .clock          = &pioC_clk,
 206         }
 207 };
 208
 209 static void at91sam9261_reset(void)
 210 {
 211         at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 212 }
 213
 214
 215 /* --------------------------------------------------------------------
 216  *  AT91SAM9261 processor initialization
 217  * -------------------------------------------------------------------- */
 218
 219 void __init at91sam9261_initialize(unsigned long main_clock)
 220 {
 221         /* Map peripherals */
 222         iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
 223
 224         at91_arch_reset = at91sam9261_reset;
 225         at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
 226                         | (1 << AT91SAM9261_ID_IRQ2);
 227
 228         /* Init clock subsystem */
 229         at91_clock_init(main_clock);
 230
 231         /* Register the processor-specific clocks */
 232         at91sam9261_register_clocks();
 233
 234         /* Register GPIO subsystem */
 235         at91_gpio_init(at91sam9261_gpio, 3);
 236 }
 237
 238 /* --------------------------------------------------------------------
 239  *  Interrupt initialization
 240  * -------------------------------------------------------------------- */
 241
 242 /*
 243  * The default interrupt priority levels (0 = lowest, 7 = highest).
 244  */
 245 static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
 246         7,      /* Advanced Interrupt Controller */
 247         7,      /* System Peripherals */
 248         0,      /* Parallel IO Controller A */
 249         0,      /* Parallel IO Controller B */
 250         0,      /* Parallel IO Controller C */
 251         0,
 252         6,      /* USART 0 */
 253         6,      /* USART 1 */
 254         6,      /* USART 2 */
 255         0,      /* Multimedia Card Interface */
 256         4,      /* USB Device Port */
 257         0,      /* Two-Wire Interface */
 258         6,      /* Serial Peripheral Interface 0 */
 259         6,      /* Serial Peripheral Interface 1 */
 260         5,      /* Serial Synchronous Controller 0 */
 261         5,      /* Serial Synchronous Controller 1 */
 262         5,      /* Serial Synchronous Controller 2 */
 263         0,      /* Timer Counter 0 */
 264         0,      /* Timer Counter 1 */
 265         0,      /* Timer Counter 2 */
 266         3,      /* USB Host port */
 267         3,      /* LCD Controller */
 268         0,
 269         0,
 270         0,
 271         0,
 272         0,
 273         0,
 274         0,
 275         0,      /* Advanced Interrupt Controller */
 276         0,      /* Advanced Interrupt Controller */
 277         0,      /* Advanced Interrupt Controller */
 278 };
 279
 280 void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
 281 {
 282         if (!priority)
 283                 priority = at91sam9261_default_irq_priority;
 284
 285         /* Initialize the AIC interrupt controller */
 286         at91_aic_init(priority);
 287
 288         /* Enable GPIO interrupts */
 289         at91_gpio_irq_setup();
 290 }