arch/microblaze/kernel/process.c

   1 /*
   2  * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
   3  * Copyright (C) 2008-2009 PetaLogix
   4  * Copyright (C) 2006 Atmark Techno, Inc.
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License. See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #include <linux/cpu.h>
  12 #include <linux/export.h>
  13 #include <linux/sched.h>
  14 #include <linux/sched/debug.h>
  15 #include <linux/sched/task.h>
  16 #include <linux/sched/task_stack.h>
  17 #include <linux/pm.h>
  18 #include <linux/tick.h>
  19 #include <linux/bitops.h>
  20 #include <linux/ptrace.h>
  21 #include <asm/pgalloc.h>
  22 #include <linux/uaccess.h> /* for USER_DS macros */
  23 #include <asm/cacheflush.h>
  24
  25 void show_regs(struct pt_regs *regs)
  26 {
  27         show_regs_print_info(KERN_INFO);
  28
  29         pr_info(" Registers dump: mode=%X\r\n", regs->pt_mode);
  30         pr_info(" r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
  31                                 regs->r1, regs->r2, regs->r3, regs->r4);
  32         pr_info(" r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
  33                                 regs->r5, regs->r6, regs->r7, regs->r8);
  34         pr_info(" r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
  35                                 regs->r9, regs->r10, regs->r11, regs->r12);
  36         pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
  37                                 regs->r13, regs->r14, regs->r15, regs->r16);
  38         pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
  39                                 regs->r17, regs->r18, regs->r19, regs->r20);
  40         pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
  41                                 regs->r21, regs->r22, regs->r23, regs->r24);
  42         pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
  43                                 regs->r25, regs->r26, regs->r27, regs->r28);
  44         pr_info(" r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
  45                                 regs->r29, regs->r30, regs->r31, regs->pc);
  46         pr_info(" msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
  47                                 regs->msr, regs->ear, regs->esr, regs->fsr);
  48 }
  49
  50 void (*pm_power_off)(void) = NULL;
  51 EXPORT_SYMBOL(pm_power_off);
  52
  53 void flush_thread(void)
  54 {
  55 }
  56
  57 int copy_thread(unsigned long clone_flags, unsigned long usp,
  58                 unsigned long arg, struct task_struct *p)
  59 {
  60         struct pt_regs *childregs = task_pt_regs(p);
  61         struct thread_info *ti = task_thread_info(p);
  62
  63         if (unlikely(p->flags & PF_KTHREAD)) {
  64                 /* if we're creating a new kernel thread then just zeroing all
  65                  * the registers. That's OK for a brand new thread.*/
  66                 memset(childregs, 0, sizeof(struct pt_regs));
  67                 memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
  68                 ti->cpu_context.r1  = (unsigned long)childregs;
  69                 ti->cpu_context.r20 = (unsigned long)usp; /* fn */
  70                 ti->cpu_context.r19 = (unsigned long)arg;
  71                 childregs->pt_mode = 1;
  72                 local_save_flags(childregs->msr);
  73 #ifdef CONFIG_MMU
  74                 ti->cpu_context.msr = childregs->msr & ~MSR_IE;
  75 #endif
  76                 ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
  77                 return 0;
  78         }
  79         *childregs = *current_pt_regs();
  80         if (usp)
  81                 childregs->r1 = usp;
  82
  83         memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
  84         ti->cpu_context.r1 = (unsigned long)childregs;
  85 #ifndef CONFIG_MMU
  86         ti->cpu_context.msr = (unsigned long)childregs->msr;
  87 #else
  88         childregs->msr |= MSR_UMS;
  89
  90         /* we should consider the fact that childregs is a copy of the parent
  91          * regs which were saved immediately after entering the kernel state
  92          * before enabling VM. This MSR will be restored in switch_to and
  93          * RETURN() and we want to have the right machine state there
  94          * specifically this state must have INTs disabled before and enabled
  95          * after performing rtbd
  96          * compose the right MSR for RETURN(). It will work for switch_to also
  97          * excepting for VM and UMS
  98          * don't touch UMS , CARRY and cache bits
  99          * right now MSR is a copy of parent one */
 100         childregs->msr &= ~MSR_EIP;
 101         childregs->msr |= MSR_IE;
 102         childregs->msr &= ~MSR_VM;
 103         childregs->msr |= MSR_VMS;
 104         childregs->msr |= MSR_EE; /* exceptions will be enabled*/
 105
 106         ti->cpu_context.msr = (childregs->msr|MSR_VM);
 107         ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
 108         ti->cpu_context.msr &= ~MSR_IE;
 109 #endif
 110         ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
 111
 112         /*
 113          *  r21 is the thread reg, r10 is 6th arg to clone
 114          *  which contains TLS area
 115          */
 116         if (clone_flags & CLONE_SETTLS)
 117                 childregs->r21 = childregs->r10;
 118
 119         return 0;
 120 }
 121
 122 unsigned long get_wchan(struct task_struct *p)
 123 {
 124 /* TBD (used by procfs) */
 125         return 0;
 126 }
 127
 128 /* Set up a thread for executing a new program */
 129 void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
 130 {
 131         regs->pc = pc;
 132         regs->r1 = usp;
 133         regs->pt_mode = 0;
 134 #ifdef CONFIG_MMU
 135         regs->msr |= MSR_UMS;
 136         regs->msr &= ~MSR_VM;
 137 #endif
 138 }
 139
 140 #ifdef CONFIG_MMU
 141 #include <linux/elfcore.h>
 142 /*
 143  * Set up a thread for executing a new program
 144  */
 145 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
 146 {
 147         return 0; /* MicroBlaze has no separate FPU registers */
 148 }
 149 #endif /* CONFIG_MMU */
 150
 151 void arch_cpu_idle(void)
 152 {
 153        local_irq_enable();
 154 }