Merge tag 'riscv-for-linus-4.15-rc2_cleanups' of git://git.kernel.org/pub/scm/linux...
[linux/fpc-iii.git] / drivers / nvmem / rockchip-efuse.c
blob123de77ca5d6033646b7266922128056510705b1
1 /*
2 * Rockchip eFuse Driver
4 * Copyright (c) 2015 Rockchip Electronics Co. Ltd.
5 * Author: Caesar Wang <wxt@rock-chips.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/device.h>
20 #include <linux/io.h>
21 #include <linux/module.h>
22 #include <linux/nvmem-provider.h>
23 #include <linux/slab.h>
24 #include <linux/of.h>
25 #include <linux/of_platform.h>
26 #include <linux/platform_device.h>
28 #define RK3288_A_SHIFT 6
29 #define RK3288_A_MASK 0x3ff
30 #define RK3288_PGENB BIT(3)
31 #define RK3288_LOAD BIT(2)
32 #define RK3288_STROBE BIT(1)
33 #define RK3288_CSB BIT(0)
35 #define RK3399_A_SHIFT 16
36 #define RK3399_A_MASK 0x3ff
37 #define RK3399_NBYTES 4
38 #define RK3399_STROBSFTSEL BIT(9)
39 #define RK3399_RSB BIT(7)
40 #define RK3399_PD BIT(5)
41 #define RK3399_PGENB BIT(3)
42 #define RK3399_LOAD BIT(2)
43 #define RK3399_STROBE BIT(1)
44 #define RK3399_CSB BIT(0)
46 #define REG_EFUSE_CTRL 0x0000
47 #define REG_EFUSE_DOUT 0x0004
49 struct rockchip_efuse_chip {
50 struct device *dev;
51 void __iomem *base;
52 struct clk *clk;
55 static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
56 void *val, size_t bytes)
58 struct rockchip_efuse_chip *efuse = context;
59 u8 *buf = val;
60 int ret;
62 ret = clk_prepare_enable(efuse->clk);
63 if (ret < 0) {
64 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
65 return ret;
68 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
69 udelay(1);
70 while (bytes--) {
71 writel(readl(efuse->base + REG_EFUSE_CTRL) &
72 (~(RK3288_A_MASK << RK3288_A_SHIFT)),
73 efuse->base + REG_EFUSE_CTRL);
74 writel(readl(efuse->base + REG_EFUSE_CTRL) |
75 ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
76 efuse->base + REG_EFUSE_CTRL);
77 udelay(1);
78 writel(readl(efuse->base + REG_EFUSE_CTRL) |
79 RK3288_STROBE, efuse->base + REG_EFUSE_CTRL);
80 udelay(1);
81 *buf++ = readb(efuse->base + REG_EFUSE_DOUT);
82 writel(readl(efuse->base + REG_EFUSE_CTRL) &
83 (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL);
84 udelay(1);
87 /* Switch to standby mode */
88 writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
90 clk_disable_unprepare(efuse->clk);
92 return 0;
95 static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
96 void *val, size_t bytes)
98 struct rockchip_efuse_chip *efuse = context;
99 unsigned int addr_start, addr_end, addr_offset, addr_len;
100 u32 out_value;
101 u8 *buf;
102 int ret, i = 0;
104 ret = clk_prepare_enable(efuse->clk);
105 if (ret < 0) {
106 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
107 return ret;
110 addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
111 addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
112 addr_offset = offset % RK3399_NBYTES;
113 addr_len = addr_end - addr_start;
115 buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
116 if (!buf) {
117 clk_disable_unprepare(efuse->clk);
118 return -ENOMEM;
121 writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
122 efuse->base + REG_EFUSE_CTRL);
123 udelay(1);
124 while (addr_len--) {
125 writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
126 ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
127 efuse->base + REG_EFUSE_CTRL);
128 udelay(1);
129 out_value = readl(efuse->base + REG_EFUSE_DOUT);
130 writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
131 efuse->base + REG_EFUSE_CTRL);
132 udelay(1);
134 memcpy(&buf[i], &out_value, RK3399_NBYTES);
135 i += RK3399_NBYTES;
138 /* Switch to standby mode */
139 writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
141 memcpy(val, buf + addr_offset, bytes);
143 kfree(buf);
145 clk_disable_unprepare(efuse->clk);
147 return 0;
150 static struct nvmem_config econfig = {
151 .name = "rockchip-efuse",
152 .stride = 1,
153 .word_size = 1,
154 .read_only = true,
157 static const struct of_device_id rockchip_efuse_match[] = {
158 /* deprecated but kept around for dts binding compatibility */
160 .compatible = "rockchip,rockchip-efuse",
161 .data = (void *)&rockchip_rk3288_efuse_read,
164 .compatible = "rockchip,rk3066a-efuse",
165 .data = (void *)&rockchip_rk3288_efuse_read,
168 .compatible = "rockchip,rk3188-efuse",
169 .data = (void *)&rockchip_rk3288_efuse_read,
172 .compatible = "rockchip,rk3228-efuse",
173 .data = (void *)&rockchip_rk3288_efuse_read,
176 .compatible = "rockchip,rk3288-efuse",
177 .data = (void *)&rockchip_rk3288_efuse_read,
180 .compatible = "rockchip,rk3368-efuse",
181 .data = (void *)&rockchip_rk3288_efuse_read,
184 .compatible = "rockchip,rk3399-efuse",
185 .data = (void *)&rockchip_rk3399_efuse_read,
187 { /* sentinel */},
189 MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
191 static int rockchip_efuse_probe(struct platform_device *pdev)
193 struct resource *res;
194 struct nvmem_device *nvmem;
195 struct rockchip_efuse_chip *efuse;
196 const struct of_device_id *match;
197 struct device *dev = &pdev->dev;
199 match = of_match_device(dev->driver->of_match_table, dev);
200 if (!match || !match->data) {
201 dev_err(dev, "failed to get match data\n");
202 return -EINVAL;
205 efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
206 GFP_KERNEL);
207 if (!efuse)
208 return -ENOMEM;
210 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
211 efuse->base = devm_ioremap_resource(&pdev->dev, res);
212 if (IS_ERR(efuse->base))
213 return PTR_ERR(efuse->base);
215 efuse->clk = devm_clk_get(&pdev->dev, "pclk_efuse");
216 if (IS_ERR(efuse->clk))
217 return PTR_ERR(efuse->clk);
219 efuse->dev = &pdev->dev;
220 econfig.size = resource_size(res);
221 econfig.reg_read = match->data;
222 econfig.priv = efuse;
223 econfig.dev = efuse->dev;
224 nvmem = nvmem_register(&econfig);
225 if (IS_ERR(nvmem))
226 return PTR_ERR(nvmem);
228 platform_set_drvdata(pdev, nvmem);
230 return 0;
233 static int rockchip_efuse_remove(struct platform_device *pdev)
235 struct nvmem_device *nvmem = platform_get_drvdata(pdev);
237 return nvmem_unregister(nvmem);
240 static struct platform_driver rockchip_efuse_driver = {
241 .probe = rockchip_efuse_probe,
242 .remove = rockchip_efuse_remove,
243 .driver = {
244 .name = "rockchip-efuse",
245 .of_match_table = rockchip_efuse_match,
249 module_platform_driver(rockchip_efuse_driver);
250 MODULE_DESCRIPTION("rockchip_efuse driver");
251 MODULE_LICENSE("GPL v2");