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Every file should #include the headers containing the prototypes for
[linux/fpc-iii.git] / drivers / serial / sa1100.c
blob0e3daf6d7b502575f05baf78d90bb7f37919f2d2
1 /*
2 * linux/drivers/char/sa1100.c
3 *
4 * Driver for SA11x0 serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Copyright (C) 2000 Deep Blue Solutions Ltd.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * $Id: sa1100.c,v 1.50 2002/07/29 14:41:04 rmk Exp $
25 *
26 */
27 #include <linux/config.h>
28
29 #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30 #define SUPPORT_SYSRQ
31 #endif
32
33 #include <linux/module.h>
34 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38 #include <linux/platform_device.h>
39 #include <linux/tty.h>
40 #include <linux/tty_flip.h>
41 #include <linux/serial_core.h>
42 #include <linux/serial.h>
43
44 #include <asm/io.h>
45 #include <asm/irq.h>
46 #include <asm/hardware.h>
47 #include <asm/mach/serial_sa1100.h>
48
49 /* We've been assigned a range on the "Low-density serial ports" major */
50 #define SERIAL_SA1100_MAJOR 204
51 #define MINOR_START 5
52
53 #define NR_PORTS 3
54
55 #define SA1100_ISR_PASS_LIMIT 256
56
57 /*
58 * Convert from ignore_status_mask or read_status_mask to UTSR[01]
59 */
60 #define SM_TO_UTSR0(x) ((x) & 0xff)
61 #define SM_TO_UTSR1(x) ((x) >> 8)
62 #define UTSR0_TO_SM(x) ((x))
63 #define UTSR1_TO_SM(x) ((x) << 8)
64
65 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
66 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
67 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
68 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
69 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
70 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
71 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
72
73 #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
74 #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
75 #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
76 #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
77 #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
78 #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
79 #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
80
81 /*
82 * This is the size of our serial port register set.
83 */
84 #define UART_PORT_SIZE 0x24
85
86 /*
87 * This determines how often we check the modem status signals
88 * for any change. They generally aren't connected to an IRQ
89 * so we have to poll them. We also check immediately before
90 * filling the TX fifo incase CTS has been dropped.
91 */
92 #define MCTRL_TIMEOUT (250*HZ/1000)
93
94 struct sa1100_port {
95 struct uart_port port;
96 struct timer_list timer;
97 unsigned int old_status;
98 };
99
100 /*
101 * Handle any change of modem status signal since we were last called.
102 */
103 static void sa1100_mctrl_check(struct sa1100_port *sport)
104 {
105 unsigned int status, changed;
106
107 status = sport->port.ops->get_mctrl(&sport->port);
108 changed = status ^ sport->old_status;
109
110 if (changed == 0)
111 return;
112
113 sport->old_status = status;
114
115 if (changed & TIOCM_RI)
116 sport->port.icount.rng++;
117 if (changed & TIOCM_DSR)
118 sport->port.icount.dsr++;
119 if (changed & TIOCM_CAR)
120 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
121 if (changed & TIOCM_CTS)
122 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
123
124 wake_up_interruptible(&sport->port.info->delta_msr_wait);
125 }
126
127 /*
128 * This is our per-port timeout handler, for checking the
129 * modem status signals.
130 */
131 static void sa1100_timeout(unsigned long data)
132 {
133 struct sa1100_port *sport = (struct sa1100_port *)data;
134 unsigned long flags;
135
136 if (sport->port.info) {
137 spin_lock_irqsave(&sport->port.lock, flags);
138 sa1100_mctrl_check(sport);
139 spin_unlock_irqrestore(&sport->port.lock, flags);
140
141 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
142 }
143 }
144
145 /*
146 * interrupts disabled on entry
147 */
148 static void sa1100_stop_tx(struct uart_port *port)
149 {
150 struct sa1100_port *sport = (struct sa1100_port *)port;
151 u32 utcr3;
152
153 utcr3 = UART_GET_UTCR3(sport);
154 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
155 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
156 }
157
158 /*
159 * port locked and interrupts disabled
160 */
161 static void sa1100_start_tx(struct uart_port *port)
162 {
163 struct sa1100_port *sport = (struct sa1100_port *)port;
164 unsigned long flags;
165 u32 utcr3;
166
167 utcr3 = UART_GET_UTCR3(sport);
168 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
169 UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
170 }
171
172 /*
173 * Interrupts enabled
174 */
175 static void sa1100_stop_rx(struct uart_port *port)
176 {
177 struct sa1100_port *sport = (struct sa1100_port *)port;
178 u32 utcr3;
179
180 utcr3 = UART_GET_UTCR3(sport);
181 UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
182 }
183
184 /*
185 * Set the modem control timer to fire immediately.
186 */
187 static void sa1100_enable_ms(struct uart_port *port)
188 {
189 struct sa1100_port *sport = (struct sa1100_port *)port;
190
191 mod_timer(&sport->timer, jiffies);
192 }
193
194 static void
195 sa1100_rx_chars(struct sa1100_port *sport, struct pt_regs *regs)
196 {
197 struct tty_struct *tty = sport->port.info->tty;
198 unsigned int status, ch, flg;
199
200 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
201 UTSR0_TO_SM(UART_GET_UTSR0(sport));
202 while (status & UTSR1_TO_SM(UTSR1_RNE)) {
203 ch = UART_GET_CHAR(sport);
204
205 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
206 goto ignore_char;
207 sport->port.icount.rx++;
208
209 flg = TTY_NORMAL;
210
211 /*
212 * note that the error handling code is
213 * out of the main execution path
214 */
215 if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
216 if (status & UTSR1_TO_SM(UTSR1_PRE))
217 sport->port.icount.parity++;
218 else if (status & UTSR1_TO_SM(UTSR1_FRE))
219 sport->port.icount.frame++;
220 if (status & UTSR1_TO_SM(UTSR1_ROR))
221 sport->port.icount.overrun++;
222
223 status &= sport->port.read_status_mask;
224
225 if (status & UTSR1_TO_SM(UTSR1_PRE))
226 flg = TTY_PARITY;
227 else if (status & UTSR1_TO_SM(UTSR1_FRE))
228 flg = TTY_FRAME;
229
230 #ifdef SUPPORT_SYSRQ
231 sport->port.sysrq = 0;
232 #endif
233 }
234
235 if (uart_handle_sysrq_char(&sport->port, ch, regs))
236 goto ignore_char;
237
238 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
239
240 ignore_char:
241 status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
242 UTSR0_TO_SM(UART_GET_UTSR0(sport));
243 }
244 tty_flip_buffer_push(tty);
245 }
246
247 static void sa1100_tx_chars(struct sa1100_port *sport)
248 {
249 struct circ_buf *xmit = &sport->port.info->xmit;
250
251 if (sport->port.x_char) {
252 UART_PUT_CHAR(sport, sport->port.x_char);
253 sport->port.icount.tx++;
254 sport->port.x_char = 0;
255 return;
256 }
257
258 /*
259 * Check the modem control lines before
260 * transmitting anything.
261 */
262 sa1100_mctrl_check(sport);
263
264 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
265 sa1100_stop_tx(&sport->port);
266 return;
267 }
268
269 /*
270 * Tried using FIFO (not checking TNF) for fifo fill:
271 * still had the '4 bytes repeated' problem.
272 */
273 while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
274 UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
275 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
276 sport->port.icount.tx++;
277 if (uart_circ_empty(xmit))
278 break;
279 }
280
281 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
282 uart_write_wakeup(&sport->port);
283
284 if (uart_circ_empty(xmit))
285 sa1100_stop_tx(&sport->port);
286 }
287
288 static irqreturn_t sa1100_int(int irq, void *dev_id, struct pt_regs *regs)
289 {
290 struct sa1100_port *sport = dev_id;
291 unsigned int status, pass_counter = 0;
292
293 spin_lock(&sport->port.lock);
294 status = UART_GET_UTSR0(sport);
295 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
296 do {
297 if (status & (UTSR0_RFS | UTSR0_RID)) {
298 /* Clear the receiver idle bit, if set */
299 if (status & UTSR0_RID)
300 UART_PUT_UTSR0(sport, UTSR0_RID);
301 sa1100_rx_chars(sport, regs);
302 }
303
304 /* Clear the relevant break bits */
305 if (status & (UTSR0_RBB | UTSR0_REB))
306 UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
307
308 if (status & UTSR0_RBB)
309 sport->port.icount.brk++;
310
311 if (status & UTSR0_REB)
312 uart_handle_break(&sport->port);
313
314 if (status & UTSR0_TFS)
315 sa1100_tx_chars(sport);
316 if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
317 break;
318 status = UART_GET_UTSR0(sport);
319 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
320 ~UTSR0_TFS;
321 } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
322 spin_unlock(&sport->port.lock);
323
324 return IRQ_HANDLED;
325 }
326
327 /*
328 * Return TIOCSER_TEMT when transmitter is not busy.
329 */
330 static unsigned int sa1100_tx_empty(struct uart_port *port)
331 {
332 struct sa1100_port *sport = (struct sa1100_port *)port;
333
334 return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
335 }
336
337 static unsigned int sa1100_get_mctrl(struct uart_port *port)
338 {
339 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
340 }
341
342 static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
343 {
344 }
345
346 /*
347 * Interrupts always disabled.
348 */
349 static void sa1100_break_ctl(struct uart_port *port, int break_state)
350 {
351 struct sa1100_port *sport = (struct sa1100_port *)port;
352 unsigned long flags;
353 unsigned int utcr3;
354
355 spin_lock_irqsave(&sport->port.lock, flags);
356 utcr3 = UART_GET_UTCR3(sport);
357 if (break_state == -1)
358 utcr3 |= UTCR3_BRK;
359 else
360 utcr3 &= ~UTCR3_BRK;
361 UART_PUT_UTCR3(sport, utcr3);
362 spin_unlock_irqrestore(&sport->port.lock, flags);
363 }
364
365 static int sa1100_startup(struct uart_port *port)
366 {
367 struct sa1100_port *sport = (struct sa1100_port *)port;
368 int retval;
369
370 /*
371 * Allocate the IRQ
372 */
373 retval = request_irq(sport->port.irq, sa1100_int, 0,
374 "sa11x0-uart", sport);
375 if (retval)
376 return retval;
377
378 /*
379 * Finally, clear and enable interrupts
380 */
381 UART_PUT_UTSR0(sport, -1);
382 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
383
384 /*
385 * Enable modem status interrupts
386 */
387 spin_lock_irq(&sport->port.lock);
388 sa1100_enable_ms(&sport->port);
389 spin_unlock_irq(&sport->port.lock);
390
391 return 0;
392 }
393
394 static void sa1100_shutdown(struct uart_port *port)
395 {
396 struct sa1100_port *sport = (struct sa1100_port *)port;
397
398 /*
399 * Stop our timer.
400 */
401 del_timer_sync(&sport->timer);
402
403 /*
404 * Free the interrupt
405 */
406 free_irq(sport->port.irq, sport);
407
408 /*
409 * Disable all interrupts, port and break condition.
410 */
411 UART_PUT_UTCR3(sport, 0);
412 }
413
414 static void
415 sa1100_set_termios(struct uart_port *port, struct termios *termios,
416 struct termios *old)
417 {
418 struct sa1100_port *sport = (struct sa1100_port *)port;
419 unsigned long flags;
420 unsigned int utcr0, old_utcr3, baud, quot;
421 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
422
423 /*
424 * We only support CS7 and CS8.
425 */
426 while ((termios->c_cflag & CSIZE) != CS7 &&
427 (termios->c_cflag & CSIZE) != CS8) {
428 termios->c_cflag &= ~CSIZE;
429 termios->c_cflag |= old_csize;
430 old_csize = CS8;
431 }
432
433 if ((termios->c_cflag & CSIZE) == CS8)
434 utcr0 = UTCR0_DSS;
435 else
436 utcr0 = 0;
437
438 if (termios->c_cflag & CSTOPB)
439 utcr0 |= UTCR0_SBS;
440 if (termios->c_cflag & PARENB) {
441 utcr0 |= UTCR0_PE;
442 if (!(termios->c_cflag & PARODD))
443 utcr0 |= UTCR0_OES;
444 }
445
446 /*
447 * Ask the core to calculate the divisor for us.
448 */
449 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
450 quot = uart_get_divisor(port, baud);
451
452 spin_lock_irqsave(&sport->port.lock, flags);
453
454 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
455 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
456 if (termios->c_iflag & INPCK)
457 sport->port.read_status_mask |=
458 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
459 if (termios->c_iflag & (BRKINT | PARMRK))
460 sport->port.read_status_mask |=
461 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
462
463 /*
464 * Characters to ignore
465 */
466 sport->port.ignore_status_mask = 0;
467 if (termios->c_iflag & IGNPAR)
468 sport->port.ignore_status_mask |=
469 UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
470 if (termios->c_iflag & IGNBRK) {
471 sport->port.ignore_status_mask |=
472 UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
473 /*
474 * If we're ignoring parity and break indicators,
475 * ignore overruns too (for real raw support).
476 */
477 if (termios->c_iflag & IGNPAR)
478 sport->port.ignore_status_mask |=
479 UTSR1_TO_SM(UTSR1_ROR);
480 }
481
482 del_timer_sync(&sport->timer);
483
484 /*
485 * Update the per-port timeout.
486 */
487 uart_update_timeout(port, termios->c_cflag, baud);
488
489 /*
490 * disable interrupts and drain transmitter
491 */
492 old_utcr3 = UART_GET_UTCR3(sport);
493 UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
494
495 while (UART_GET_UTSR1(sport) & UTSR1_TBY)
496 barrier();
497
498 /* then, disable everything */
499 UART_PUT_UTCR3(sport, 0);
500
501 /* set the parity, stop bits and data size */
502 UART_PUT_UTCR0(sport, utcr0);
503
504 /* set the baud rate */
505 quot -= 1;
506 UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
507 UART_PUT_UTCR2(sport, (quot & 0xff));
508
509 UART_PUT_UTSR0(sport, -1);
510
511 UART_PUT_UTCR3(sport, old_utcr3);
512
513 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
514 sa1100_enable_ms(&sport->port);
515
516 spin_unlock_irqrestore(&sport->port.lock, flags);
517 }
518
519 static const char *sa1100_type(struct uart_port *port)
520 {
521 struct sa1100_port *sport = (struct sa1100_port *)port;
522
523 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
524 }
525
526 /*
527 * Release the memory region(s) being used by 'port'.
528 */
529 static void sa1100_release_port(struct uart_port *port)
530 {
531 struct sa1100_port *sport = (struct sa1100_port *)port;
532
533 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
534 }
535
536 /*
537 * Request the memory region(s) being used by 'port'.
538 */
539 static int sa1100_request_port(struct uart_port *port)
540 {
541 struct sa1100_port *sport = (struct sa1100_port *)port;
542
543 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
544 "sa11x0-uart") != NULL ? 0 : -EBUSY;
545 }
546
547 /*
548 * Configure/autoconfigure the port.
549 */
550 static void sa1100_config_port(struct uart_port *port, int flags)
551 {
552 struct sa1100_port *sport = (struct sa1100_port *)port;
553
554 if (flags & UART_CONFIG_TYPE &&
555 sa1100_request_port(&sport->port) == 0)
556 sport->port.type = PORT_SA1100;
557 }
558
559 /*
560 * Verify the new serial_struct (for TIOCSSERIAL).
561 * The only change we allow are to the flags and type, and
562 * even then only between PORT_SA1100 and PORT_UNKNOWN
563 */
564 static int
565 sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
566 {
567 struct sa1100_port *sport = (struct sa1100_port *)port;
568 int ret = 0;
569
570 if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
571 ret = -EINVAL;
572 if (sport->port.irq != ser->irq)
573 ret = -EINVAL;
574 if (ser->io_type != SERIAL_IO_MEM)
575 ret = -EINVAL;
576 if (sport->port.uartclk / 16 != ser->baud_base)
577 ret = -EINVAL;
578 if ((void *)sport->port.mapbase != ser->iomem_base)
579 ret = -EINVAL;
580 if (sport->port.iobase != ser->port)
581 ret = -EINVAL;
582 if (ser->hub6 != 0)
583 ret = -EINVAL;
584 return ret;
585 }
586
587 static struct uart_ops sa1100_pops = {
588 .tx_empty = sa1100_tx_empty,
589 .set_mctrl = sa1100_set_mctrl,
590 .get_mctrl = sa1100_get_mctrl,
591 .stop_tx = sa1100_stop_tx,
592 .start_tx = sa1100_start_tx,
593 .stop_rx = sa1100_stop_rx,
594 .enable_ms = sa1100_enable_ms,
595 .break_ctl = sa1100_break_ctl,
596 .startup = sa1100_startup,
597 .shutdown = sa1100_shutdown,
598 .set_termios = sa1100_set_termios,
599 .type = sa1100_type,
600 .release_port = sa1100_release_port,
601 .request_port = sa1100_request_port,
602 .config_port = sa1100_config_port,
603 .verify_port = sa1100_verify_port,
604 };
605
606 static struct sa1100_port sa1100_ports[NR_PORTS];
607
608 /*
609 * Setup the SA1100 serial ports. Note that we don't include the IrDA
610 * port here since we have our own SIR/FIR driver (see drivers/net/irda)
611 *
612 * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
613 * Which serial port this ends up being depends on the machine you're
614 * running this kernel on. I'm not convinced that this is a good idea,
615 * but that's the way it traditionally works.
616 *
617 * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
618 * used here.
619 */
620 static void __init sa1100_init_ports(void)
621 {
622 static int first = 1;
623 int i;
624
625 if (!first)
626 return;
627 first = 0;
628
629 for (i = 0; i < NR_PORTS; i++) {
630 sa1100_ports[i].port.uartclk = 3686400;
631 sa1100_ports[i].port.ops = &sa1100_pops;
632 sa1100_ports[i].port.fifosize = 8;
633 sa1100_ports[i].port.line = i;
634 sa1100_ports[i].port.iotype = SERIAL_IO_MEM;
635 init_timer(&sa1100_ports[i].timer);
636 sa1100_ports[i].timer.function = sa1100_timeout;
637 sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
638 }
639
640 /*
641 * make transmit lines outputs, so that when the port
642 * is closed, the output is in the MARK state.
643 */
644 PPDR |= PPC_TXD1 | PPC_TXD3;
645 PPSR |= PPC_TXD1 | PPC_TXD3;
646 }
647
648 void __init sa1100_register_uart_fns(struct sa1100_port_fns *fns)
649 {
650 if (fns->get_mctrl)
651 sa1100_pops.get_mctrl = fns->get_mctrl;
652 if (fns->set_mctrl)
653 sa1100_pops.set_mctrl = fns->set_mctrl;
654
655 sa1100_pops.pm = fns->pm;
656 sa1100_pops.set_wake = fns->set_wake;
657 }
658
659 void __init sa1100_register_uart(int idx, int port)
660 {
661 if (idx >= NR_PORTS) {
662 printk(KERN_ERR "%s: bad index number %d\n", __FUNCTION__, idx);
663 return;
664 }
665
666 switch (port) {
667 case 1:
668 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
669 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
670 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
671 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
672 break;
673
674 case 2:
675 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
676 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
677 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
678 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
679 break;
680
681 case 3:
682 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
683 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
684 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
685 sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF;
686 break;
687
688 default:
689 printk(KERN_ERR "%s: bad port number %d\n", __FUNCTION__, port);
690 }
691 }
692
693
694 #ifdef CONFIG_SERIAL_SA1100_CONSOLE
695
696 /*
697 * Interrupts are disabled on entering
698 */
699 static void
700 sa1100_console_write(struct console *co, const char *s, unsigned int count)
701 {
702 struct sa1100_port *sport = &sa1100_ports[co->index];
703 unsigned int old_utcr3, status, i;
704
705 /*
706 * First, save UTCR3 and then disable interrupts
707 */
708 old_utcr3 = UART_GET_UTCR3(sport);
709 UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
710 UTCR3_TXE);
711
712 /*
713 * Now, do each character
714 */
715 for (i = 0; i < count; i++) {
716 do {
717 status = UART_GET_UTSR1(sport);
718 } while (!(status & UTSR1_TNF));
719 UART_PUT_CHAR(sport, s[i]);
720 if (s[i] == '\n') {
721 do {
722 status = UART_GET_UTSR1(sport);
723 } while (!(status & UTSR1_TNF));
724 UART_PUT_CHAR(sport, '\r');
725 }
726 }
727
728 /*
729 * Finally, wait for transmitter to become empty
730 * and restore UTCR3
731 */
732 do {
733 status = UART_GET_UTSR1(sport);
734 } while (status & UTSR1_TBY);
735 UART_PUT_UTCR3(sport, old_utcr3);
736 }
737
738 /*
739 * If the port was already initialised (eg, by a boot loader),
740 * try to determine the current setup.
741 */
742 static void __init
743 sa1100_console_get_options(struct sa1100_port *sport, int *baud,
744 int *parity, int *bits)
745 {
746 unsigned int utcr3;
747
748 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
749 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
750 /* ok, the port was enabled */
751 unsigned int utcr0, quot;
752
753 utcr0 = UART_GET_UTCR0(sport);
754
755 *parity = 'n';
756 if (utcr0 & UTCR0_PE) {
757 if (utcr0 & UTCR0_OES)
758 *parity = 'e';
759 else
760 *parity = 'o';
761 }
762
763 if (utcr0 & UTCR0_DSS)
764 *bits = 8;
765 else
766 *bits = 7;
767
768 quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
769 quot &= 0xfff;
770 *baud = sport->port.uartclk / (16 * (quot + 1));
771 }
772 }
773
774 static int __init
775 sa1100_console_setup(struct console *co, char *options)
776 {
777 struct sa1100_port *sport;
778 int baud = 9600;
779 int bits = 8;
780 int parity = 'n';
781 int flow = 'n';
782
783 /*
784 * Check whether an invalid uart number has been specified, and
785 * if so, search for the first available port that does have
786 * console support.
787 */
788 if (co->index == -1 || co->index >= NR_PORTS)
789 co->index = 0;
790 sport = &sa1100_ports[co->index];
791
792 if (options)
793 uart_parse_options(options, &baud, &parity, &bits, &flow);
794 else
795 sa1100_console_get_options(sport, &baud, &parity, &bits);
796
797 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
798 }
799
800 static struct uart_driver sa1100_reg;
801 static struct console sa1100_console = {
802 .name = "ttySA",
803 .write = sa1100_console_write,
804 .device = uart_console_device,
805 .setup = sa1100_console_setup,
806 .flags = CON_PRINTBUFFER,
807 .index = -1,
808 .data = &sa1100_reg,
809 };
810
811 static int __init sa1100_rs_console_init(void)
812 {
813 sa1100_init_ports();
814 register_console(&sa1100_console);
815 return 0;
816 }
817 console_initcall(sa1100_rs_console_init);
818
819 #define SA1100_CONSOLE &sa1100_console
820 #else
821 #define SA1100_CONSOLE NULL
822 #endif
823
824 static struct uart_driver sa1100_reg = {
825 .owner = THIS_MODULE,
826 .driver_name = "ttySA",
827 .dev_name = "ttySA",
828 .devfs_name = "ttySA",
829 .major = SERIAL_SA1100_MAJOR,
830 .minor = MINOR_START,
831 .nr = NR_PORTS,
832 .cons = SA1100_CONSOLE,
833 };
834
835 static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
836 {
837 struct sa1100_port *sport = platform_get_drvdata(dev);
838
839 if (sport)
840 uart_suspend_port(&sa1100_reg, &sport->port);
841
842 return 0;
843 }
844
845 static int sa1100_serial_resume(struct platform_device *dev)
846 {
847 struct sa1100_port *sport = platform_get_drvdata(dev);
848
849 if (sport)
850 uart_resume_port(&sa1100_reg, &sport->port);
851
852 return 0;
853 }
854
855 static int sa1100_serial_probe(struct platform_device *dev)
856 {
857 struct resource *res = dev->resource;
858 int i;
859
860 for (i = 0; i < dev->num_resources; i++, res++)
861 if (res->flags & IORESOURCE_MEM)
862 break;
863
864 if (i < dev->num_resources) {
865 for (i = 0; i < NR_PORTS; i++) {
866 if (sa1100_ports[i].port.mapbase != res->start)
867 continue;
868
869 sa1100_ports[i].port.dev = &dev->dev;
870 uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
871 platform_set_drvdata(dev, &sa1100_ports[i]);
872 break;
873 }
874 }
875
876 return 0;
877 }
878
879 static int sa1100_serial_remove(struct platform_device *pdev)
880 {
881 struct sa1100_port *sport = platform_get_drvdata(pdev);
882
883 platform_set_drvdata(pdev, NULL);
884
885 if (sport)
886 uart_remove_one_port(&sa1100_reg, &sport->port);
887
888 return 0;
889 }
890
891 static struct platform_driver sa11x0_serial_driver = {
892 .probe = sa1100_serial_probe,
893 .remove = sa1100_serial_remove,
894 .suspend = sa1100_serial_suspend,
895 .resume = sa1100_serial_resume,
896 .driver = {
897 .name = "sa11x0-uart",
898 },
899 };
900
901 static int __init sa1100_serial_init(void)
902 {
903 int ret;
904
905 printk(KERN_INFO "Serial: SA11x0 driver $Revision: 1.50 $\n");
906
907 sa1100_init_ports();
908
909 ret = uart_register_driver(&sa1100_reg);
910 if (ret == 0) {
911 ret = platform_driver_register(&sa11x0_serial_driver);
912 if (ret)
913 uart_unregister_driver(&sa1100_reg);
914 }
915 return ret;
916 }
917
918 static void __exit sa1100_serial_exit(void)
919 {
920 platform_driver_unregister(&sa11x0_serial_driver);
921 uart_unregister_driver(&sa1100_reg);
922 }
923
924 module_init(sa1100_serial_init);
925 module_exit(sa1100_serial_exit);
926
927 MODULE_AUTHOR("Deep Blue Solutions Ltd");
928 MODULE_DESCRIPTION("SA1100 generic serial port driver $Revision: 1.50 $");
929 MODULE_LICENSE("GPL");
930 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
Linux with added FPC-III support