1 # SPDX-License-Identifier: GPL-2.0
6 select HAVE_ARCH_TRACEHOOK
7 select HAVE_PERF_EVENTS
10 select GENERIC_IRQ_SHOW
11 select HAVE_DEBUG_BUGVERBOSE
12 select ARCH_HAVE_NMI_SAFE_CMPXCHG
13 select GENERIC_CPU_DEVICES
14 select ARCH_HAS_DEVMEM_IS_ALLOWED
15 select ARCH_WANT_IPC_PARSE_VERSION
16 select OLD_SIGSUSPEND3
18 select HAVE_DEBUG_STACKOVERFLOW
19 select ARCH_NO_COHERENT_DMA_MMAP
28 config RWSEM_GENERIC_SPINLOCK
32 config RWSEM_XCHGADD_ALGORITHM
35 config GENERIC_HWEIGHT
39 config GENERIC_CALIBRATE_DELAY
51 config ARCH_HAS_ILOG2_U32
55 config ARCH_HAS_ILOG2_U64
65 source "kernel/Kconfig.freezer"
68 menu "Fujitsu FR-V system setup"
73 This options switches on and off support for the FR-V MMU
74 (effectively switching between vmlinux and uClinux). Not all FR-V
75 CPUs support this. Currently only the FR451 has a sufficiently
78 config FRV_OUTOFLINE_ATOMIC_OPS
79 bool "Out-of-line the FRV atomic operations"
82 Setting this option causes the FR-V atomic operations to be mostly
83 implemented out-of-line.
85 See Documentation/frv/atomic-ops.txt for more information.
88 bool "High memory support"
92 If you wish to use more than 256MB of memory with your MMU based
93 system, you will need to select this option. The kernel can only see
94 the memory between 0xC0000000 and 0xD0000000 directly... everything
97 The arch is, however, capable of supporting up to 3GB of SDRAM.
100 bool "Allocate page tables in highmem"
104 The VM uses one page of memory for each page table. For systems
105 with a lot of RAM, this can be wasteful of precious low memory.
106 Setting this option will put user-space page tables in high memory.
111 prompt "uClinux kernel load address"
113 default UCPAGE_OFFSET_C0000000
115 This option sets the base address for the uClinux kernel. The kernel
116 will rearrange the SDRAM layout to start at this address, and move
117 itself to start there. It must be greater than 0, and it must be
118 sufficiently less than 0xE0000000 that the SDRAM does not intersect
121 The base address must also be aligned such that the SDRAM controller
122 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
124 config UCPAGE_OFFSET_20000000
127 config UCPAGE_OFFSET_40000000
130 config UCPAGE_OFFSET_60000000
133 config UCPAGE_OFFSET_80000000
136 config UCPAGE_OFFSET_A0000000
139 config UCPAGE_OFFSET_C0000000
140 bool "0xC0000000 (Recommended)"
146 default 0x20000000 if UCPAGE_OFFSET_20000000
147 default 0x40000000 if UCPAGE_OFFSET_40000000
148 default 0x60000000 if UCPAGE_OFFSET_60000000
149 default 0x80000000 if UCPAGE_OFFSET_80000000
150 default 0xA0000000 if UCPAGE_OFFSET_A0000000
153 config PROTECT_KERNEL
154 bool "Protect core kernel against userspace"
158 Selecting this option causes the uClinux kernel to change the
159 permittivity of DAMPR register covering the core kernel image to
160 prevent userspace accessing the underlying memory directly.
163 prompt "CPU Caching mode"
164 default FRV_DEFL_CACHE_WBACK
166 This option determines the default caching mode for the kernel.
168 Write-Back caching mode involves the all reads and writes causing
169 the affected cacheline to be read into the cache first before being
170 operated upon. Memory is not then updated by a write until the cache
171 is filled and a cacheline needs to be displaced from the cache to
172 make room. Only at that point is it written back.
174 Write-Behind caching is similar to Write-Back caching, except that a
175 write won't fetch a cacheline into the cache if there isn't already
176 one there; it will write directly to memory instead.
178 Write-Through caching only fetches cachelines from memory on a
179 read. Writes always get written directly to memory. If the affected
180 cacheline is also in cache, it will be updated too.
182 The final option is to turn of caching entirely.
184 Note that not all CPUs support Write-Behind caching. If the CPU on
185 which the kernel is running doesn't, it'll fall back to Write-Back
188 config FRV_DEFL_CACHE_WBACK
191 config FRV_DEFL_CACHE_WBEHIND
194 config FRV_DEFL_CACHE_WTHRU
197 config FRV_DEFL_CACHE_DISABLED
202 menu "CPU core support"
205 bool "Include FR401 core support"
209 This enables support for the FR401, FR401A and FR403 CPUs
212 bool "Include FR405 core support"
216 This enables support for the FR405 CPU
219 bool "Include FR451 core support"
222 This enables support for the FR451 CPU
224 config CPU_FR451_COMPILE
225 bool "Specifically compile for FR451 core"
226 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
229 This causes appropriate flags to be passed to the compiler to
230 optimise for the FR451 CPU
233 bool "Include FR551 core support"
237 This enables support for the FR555 CPU
239 config CPU_FR551_COMPILE
240 bool "Specifically compile for FR551 core"
241 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
244 This causes appropriate flags to be passed to the compiler to
245 optimise for the FR555 CPU
247 config FRV_L1_CACHE_SHIFT
249 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
250 default "6" if CPU_FR551
255 prompt "System support"
259 bool "MB93091 CPU board with or without motherboard"
262 bool "MB93093 PDK unit"
268 prompt "Motherboard support"
272 bool "Use the MB93090-MB00 motherboard"
274 Select this option if the MB93091 CPU board is going to be used with
275 a MB93090-MB00 VDK motherboard
278 bool "Use standalone"
280 Select this option if the MB93091 CPU board is going to be used
281 without a motherboard
286 config FUJITSU_MB93493
287 bool "MB93493 Multimedia chip"
289 Select this option if the MB93493 multimedia chip is going to be
293 prompt "GP-Relative data support"
296 This option controls what data, if any, should be placed in the GP
297 relative data sections. Using this means that the compiler can
298 generate accesses to the data using GR16-relative addressing which
299 is faster than absolute instructions and saves space (2 instructions
302 However, the GPREL region is limited in size because the immediate
303 value used in the load and store instructions is limited to a 12-bit
306 So if the linker starts complaining that accesses to GPREL data are
307 out of range, try changing this option from the default.
309 Note that modules will always be compiled with this feature disabled
310 as the module data will not be in range of the GP base address.
313 bool "Put data objects of up to 8 bytes into GP-REL"
316 bool "Put data objects of up to 4 bytes into GP-REL"
318 config GPREL_DATA_NONE
319 bool "Don't use GP-REL"
323 config FRV_ONCPU_SERIAL
324 bool "Use on-CPU serial ports"
330 depends on MB93090_MB00
332 select GENERIC_PCI_IOMAP
334 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
335 onboard. If you have one of these boards and you wish to use the PCI
336 facilities, say Y here.
338 config RESERVE_DMA_COHERENT
339 bool "Reserve DMA coherent memory"
340 depends on PCI && !MMU
343 Many PCI drivers require access to uncached memory for DMA device
344 communications (such as is done with some Ethernet buffer rings). If
345 a fully featured MMU is available, this can be done through page
346 table settings, but if not, a region has to be set aside and marked
347 with a special DAMPR register.
349 Setting this option causes uClinux to set aside a portion of the
350 available memory for use in this manner. The memory will then be
351 unavailable for normal kernel use.
353 source "drivers/pci/Kconfig"
355 source "drivers/pcmcia/Kconfig"
357 menu "Power management options"
359 config ARCH_SUSPEND_POSSIBLE
362 source kernel/power/Kconfig
368 menu "Executable formats"
370 source "fs/Kconfig.binfmt"
376 source "drivers/Kconfig"
380 source "arch/frv/Kconfig.debug"
382 source "security/Kconfig"
384 source "crypto/Kconfig"