arch/microblaze/include/asm/system.h

   1 /*
   2  * Copyright (C) 2006 Atmark Techno, Inc.
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License. See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  */
   8
   9 #ifndef _ASM_MICROBLAZE_SYSTEM_H
  10 #define _ASM_MICROBLAZE_SYSTEM_H
  11
  12 #include <asm/registers.h>
  13 #include <asm/setup.h>
  14 #include <asm/irqflags.h>
  15 #include <asm/cache.h>
  16
  17 #include <asm-generic/cmpxchg.h>
  18 #include <asm-generic/cmpxchg-local.h>
  19
  20 #define __ARCH_WANT_INTERRUPTS_ON_CTXSW
  21
  22 struct task_struct;
  23 struct thread_info;
  24
  25 extern struct task_struct *_switch_to(struct thread_info *prev,
  26                                         struct thread_info *next);
  27
  28 #define switch_to(prev, next, last)                                     \
  29         do {                                                            \
  30                 (last) = _switch_to(task_thread_info(prev),             \
  31                                         task_thread_info(next));        \
  32         } while (0)
  33
  34 #define smp_read_barrier_depends()      do {} while (0)
  35 #define read_barrier_depends()          do {} while (0)
  36
  37 #define nop()                   asm volatile ("nop")
  38 #define mb()                    barrier()
  39 #define rmb()                   mb()
  40 #define wmb()                   mb()
  41 #define set_mb(var, value)      do { var = value; mb(); } while (0)
  42 #define set_wmb(var, value)     do { var = value; wmb(); } while (0)
  43
  44 #define smp_mb()                mb()
  45 #define smp_rmb()               rmb()
  46 #define smp_wmb()               wmb()
  47
  48 void show_trace(struct task_struct *task, unsigned long *stack);
  49 void __bad_xchg(volatile void *ptr, int size);
  50
  51 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
  52                                                                 int size)
  53 {
  54         unsigned long ret;
  55         unsigned long flags;
  56
  57         switch (size) {
  58         case 1:
  59                 local_irq_save(flags);
  60                 ret = *(volatile unsigned char *)ptr;
  61                 *(volatile unsigned char *)ptr = x;
  62                 local_irq_restore(flags);
  63                 break;
  64
  65         case 4:
  66                 local_irq_save(flags);
  67                 ret = *(volatile unsigned long *)ptr;
  68                 *(volatile unsigned long *)ptr = x;
  69                 local_irq_restore(flags);
  70                 break;
  71         default:
  72                 __bad_xchg(ptr, size), ret = 0;
  73                 break;
  74         }
  75
  76         return ret;
  77 }
  78
  79 void disable_hlt(void);
  80 void enable_hlt(void);
  81 void default_idle(void);
  82
  83 #define xchg(ptr, x) \
  84         ((__typeof__(*(ptr))) __xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
  85
  86 void free_init_pages(char *what, unsigned long begin, unsigned long end);
  87 void free_initmem(void);
  88 extern char *klimit;
  89 extern void ret_from_fork(void);
  90
  91 extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
  92 extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
  93
  94 #ifdef CONFIG_DEBUG_FS
  95 extern struct dentry *of_debugfs_root;
  96 #endif
  97
  98 #define arch_align_stack(x) (x)
  99
 100 /*
 101  * MicroBlaze doesn't handle unaligned accesses in hardware.
 102  *
 103  * Based on this we force the IP header alignment in network drivers.
 104  * We also modify NET_SKB_PAD to be a cacheline in size, thus maintaining
 105  * cacheline alignment of buffers.
 106  */
 107 #define NET_IP_ALIGN    2
 108 #define NET_SKB_PAD     L1_CACHE_BYTES
 109
 110 #endif /* _ASM_MICROBLAZE_SYSTEM_H */