arch/s390/include/asm/ctl_reg.h

   1 /*
   2  * Copyright IBM Corp. 1999, 2009
   3  *
   4  * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
   5  */
   6
   7 #ifndef __ASM_CTL_REG_H
   8 #define __ASM_CTL_REG_H
   9
  10 #include <linux/bug.h>
  11
  12 #ifdef CONFIG_64BIT
  13 # define __CTL_LOAD     "lctlg"
  14 # define __CTL_STORE    "stctg"
  15 #else
  16 # define __CTL_LOAD     "lctl"
  17 # define __CTL_STORE    "stctl"
  18 #endif
  19
  20 #define __ctl_load(array, low, high) {                                  \
  21         typedef struct { char _[sizeof(array)]; } addrtype;             \
  22                                                                         \
  23         BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
  24         asm volatile(                                                   \
  25                 __CTL_LOAD " %1,%2,%0\n"                                \
  26                 : : "Q" (*(addrtype *)(&array)), "i" (low), "i" (high));\
  27 }
  28
  29 #define __ctl_store(array, low, high) {                                 \
  30         typedef struct { char _[sizeof(array)]; } addrtype;             \
  31                                                                         \
  32         BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
  33         asm volatile(                                                   \
  34                 __CTL_STORE " %1,%2,%0\n"                               \
  35                 : "=Q" (*(addrtype *)(&array))                          \
  36                 : "i" (low), "i" (high));                               \
  37 }
  38
  39 static inline void __ctl_set_bit(unsigned int cr, unsigned int bit)
  40 {
  41         unsigned long reg;
  42
  43         __ctl_store(reg, cr, cr);
  44         reg |= 1UL << bit;
  45         __ctl_load(reg, cr, cr);
  46 }
  47
  48 static inline void __ctl_clear_bit(unsigned int cr, unsigned int bit)
  49 {
  50         unsigned long reg;
  51
  52         __ctl_store(reg, cr, cr);
  53         reg &= ~(1UL << bit);
  54         __ctl_load(reg, cr, cr);
  55 }
  56
  57 void smp_ctl_set_bit(int cr, int bit);
  58 void smp_ctl_clear_bit(int cr, int bit);
  59
  60 union ctlreg0 {
  61         unsigned long val;
  62         struct {
  63 #ifdef CONFIG_64BIT
  64                 unsigned long      : 32;
  65 #endif
  66                 unsigned long      : 3;
  67                 unsigned long lap  : 1; /* Low-address-protection control */
  68                 unsigned long      : 4;
  69                 unsigned long edat : 1; /* Enhanced-DAT-enablement control */
  70                 unsigned long      : 23;
  71         };
  72 };
  73
  74 #ifdef CONFIG_SMP
  75 # define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
  76 # define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
  77 #else
  78 # define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
  79 # define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
  80 #endif
  81
  82 #endif /* __ASM_CTL_REG_H */