Merge branch 'for-3.18-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj...
[linux/fpc-iii.git] / arch / s390 / kernel / head.S
blobd62eee11f0b54240339d898fbf95d4299c011545
1 /*
2  * Copyright IBM Corp. 1999, 2010
3  *
4  *    Author(s): Hartmut Penner <hp@de.ibm.com>
5  *               Martin Schwidefsky <schwidefsky@de.ibm.com>
6  *               Rob van der Heij <rvdhei@iae.nl>
7  *               Heiko Carstens <heiko.carstens@de.ibm.com>
8  *
9  * There are 5 different IPL methods
10  *  1) load the image directly into ram at address 0 and do an PSW restart
11  *  2) linload will load the image from address 0x10000 to memory 0x10000
12  *     and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
13  *  3) generate the tape ipl header, store the generated image on a tape
14  *     and ipl from it
15  *     In case of SL tape you need to IPL 5 times to get past VOL1 etc
16  *  4) generate the vm reader ipl header, move the generated image to the
17  *     VM reader (use option NOH!) and do a ipl from reader (VM only)
18  *  5) direct call of start by the SALIPL loader
19  *  We use the cpuid to distinguish between VM and native ipl
20  *  params for kernel are pushed to 0x10400 (see setup.h)
21  *
22  */
24 #include <linux/init.h>
25 #include <linux/linkage.h>
26 #include <asm/asm-offsets.h>
27 #include <asm/thread_info.h>
28 #include <asm/page.h>
30 #ifdef CONFIG_64BIT
31 #define ARCH_OFFSET     4
32 #else
33 #define ARCH_OFFSET     0
34 #endif
36 __HEAD
38 #define IPL_BS  0x730
39         .org    0
40         .long   0x00080000,0x80000000+iplstart  # The first 24 bytes are loaded
41         .long   0x02000018,0x60000050           # by ipl to addresses 0-23.
42         .long   0x02000068,0x60000050           # (a PSW and two CCWs).
43         .fill   80-24,1,0x40                    # bytes 24-79 are discarded !!
44         .long   0x020000f0,0x60000050           # The next 160 byte are loaded
45         .long   0x02000140,0x60000050           # to addresses 0x18-0xb7
46         .long   0x02000190,0x60000050           # They form the continuation
47         .long   0x020001e0,0x60000050           # of the CCW program started
48         .long   0x02000230,0x60000050           # by ipl and load the range
49         .long   0x02000280,0x60000050           # 0x0f0-0x730 from the image
50         .long   0x020002d0,0x60000050           # to the range 0x0f0-0x730
51         .long   0x02000320,0x60000050           # in memory. At the end of
52         .long   0x02000370,0x60000050           # the channel program the PSW
53         .long   0x020003c0,0x60000050           # at location 0 is loaded.
54         .long   0x02000410,0x60000050           # Initial processing starts
55         .long   0x02000460,0x60000050           # at 0x200 = iplstart.
56         .long   0x020004b0,0x60000050
57         .long   0x02000500,0x60000050
58         .long   0x02000550,0x60000050
59         .long   0x020005a0,0x60000050
60         .long   0x020005f0,0x60000050
61         .long   0x02000640,0x60000050
62         .long   0x02000690,0x60000050
63         .long   0x020006e0,0x20000050
65         .org    0x200
67 # subroutine to set architecture mode
69 .Lsetmode:
70 #ifdef CONFIG_64BIT
71         mvi     __LC_AR_MODE_ID,1       # set esame flag
72         slr     %r0,%r0                 # set cpuid to zero
73         lhi     %r1,2                   # mode 2 = esame (dump)
74         sigp    %r1,%r0,0x12            # switch to esame mode
75         bras    %r13,0f
76         .fill   16,4,0x0
77 0:      lmh     %r0,%r15,0(%r13)        # clear high-order half of gprs
78         sam31                           # switch to 31 bit addressing mode
79 #else
80         mvi     __LC_AR_MODE_ID,0       # set ESA flag (mode 0)
81 #endif
82         br      %r14
85 # subroutine to wait for end I/O
87 .Lirqwait:
88 #ifdef CONFIG_64BIT
89         mvc     0x1f0(16),.Lnewpsw      # set up IO interrupt psw
90         lpsw    .Lwaitpsw
91 .Lioint:
92         br      %r14
93         .align  8
94 .Lnewpsw:
95         .quad   0x0000000080000000,.Lioint
96 #else
97         mvc     0x78(8),.Lnewpsw        # set up IO interrupt psw
98         lpsw    .Lwaitpsw
99 .Lioint:
100         br      %r14
101         .align  8
102 .Lnewpsw:
103         .long   0x00080000,0x80000000+.Lioint
104 #endif
105 .Lwaitpsw:
106         .long   0x020a0000,0x80000000+.Lioint
109 # subroutine for loading cards from the reader
111 .Lloader:
112         la      %r4,0(%r14)
113         la      %r3,.Lorb               # r2 = address of orb into r2
114         la      %r5,.Lirb               # r4 = address of irb
115         la      %r6,.Lccws
116         la      %r7,20
117 .Linit:
118         st      %r2,4(%r6)              # initialize CCW data addresses
119         la      %r2,0x50(%r2)
120         la      %r6,8(%r6)
121         bct     7,.Linit
123         lctl    %c6,%c6,.Lcr6           # set IO subclass mask
124         slr     %r2,%r2
125 .Lldlp:
126         ssch    0(%r3)                  # load chunk of 1600 bytes
127         bnz     .Llderr
128 .Lwait4irq:
129         bas     %r14,.Lirqwait
130         c       %r1,0xb8                # compare subchannel number
131         bne     .Lwait4irq
132         tsch    0(%r5)
134         slr     %r0,%r0
135         ic      %r0,8(%r5)              # get device status
136         chi     %r0,8                   # channel end ?
137         be      .Lcont
138         chi     %r0,12                  # channel end + device end ?
139         be      .Lcont
141         l       %r0,4(%r5)
142         s       %r0,8(%r3)              # r0/8 = number of ccws executed
143         mhi     %r0,10                  # *10 = number of bytes in ccws
144         lh      %r3,10(%r5)             # get residual count
145         sr      %r0,%r3                 # #ccws*80-residual=#bytes read
146         ar      %r2,%r0
148         br      %r4                     # r2 contains the total size
150 .Lcont:
151         ahi     %r2,0x640               # add 0x640 to total size
152         la      %r6,.Lccws
153         la      %r7,20
154 .Lincr:
155         l       %r0,4(%r6)              # update CCW data addresses
156         ahi     %r0,0x640
157         st      %r0,4(%r6)
158         ahi     %r6,8
159         bct     7,.Lincr
161         b       .Lldlp
162 .Llderr:
163         lpsw    .Lcrash
165         .align  8
166 .Lorb:  .long   0x00000000,0x0080ff00,.Lccws
167 .Lirb:  .long   0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
168 .Lcr6:  .long   0xff000000
169 .Lloadp:.long   0,0
170         .align  8
171 .Lcrash:.long   0x000a0000,0x00000000
173         .align  8
174 .Lccws: .rept   19
175         .long   0x02600050,0x00000000
176         .endr
177         .long   0x02200050,0x00000000
179 iplstart:
180         bas     %r14,.Lsetmode          # Immediately switch to 64 bit mode
181         lh      %r1,0xb8                # test if subchannel number
182         bct     %r1,.Lnoload            #  is valid
183         l       %r1,0xb8                # load ipl subchannel number
184         la      %r2,IPL_BS              # load start address
185         bas     %r14,.Lloader           # load rest of ipl image
186         l       %r12,.Lparm             # pointer to parameter area
187         st      %r1,IPL_DEVICE+ARCH_OFFSET-PARMAREA(%r12) # save ipl device number
190 # load parameter file from ipl device
192 .Lagain1:
193         l       %r2,.Linitrd            # ramdisk loc. is temp
194         bas     %r14,.Lloader           # load parameter file
195         ltr     %r2,%r2                 # got anything ?
196         bz      .Lnopf
197         chi     %r2,895
198         bnh     .Lnotrunc
199         la      %r2,895
200 .Lnotrunc:
201         l       %r4,.Linitrd
202         clc     0(3,%r4),.L_hdr         # if it is HDRx
203         bz      .Lagain1                # skip dataset header
204         clc     0(3,%r4),.L_eof         # if it is EOFx
205         bz      .Lagain1                # skip dateset trailer
206         la      %r5,0(%r4,%r2)
207         lr      %r3,%r2
208         la      %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
209         mvc     0(256,%r3),0(%r4)
210         mvc     256(256,%r3),256(%r4)
211         mvc     512(256,%r3),512(%r4)
212         mvc     768(122,%r3),768(%r4)
213         slr     %r0,%r0
214         b       .Lcntlp
215 .Ldelspc:
216         ic      %r0,0(%r2,%r3)
217         chi     %r0,0x20                # is it a space ?
218         be      .Lcntlp
219         ahi     %r2,1
220         b       .Leolp
221 .Lcntlp:
222         brct    %r2,.Ldelspc
223 .Leolp:
224         slr     %r0,%r0
225         stc     %r0,0(%r2,%r3)          # terminate buffer
226 .Lnopf:
229 # load ramdisk from ipl device
231 .Lagain2:
232         l       %r2,.Linitrd            # addr of ramdisk
233         st      %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12)
234         bas     %r14,.Lloader           # load ramdisk
235         st      %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd
236         ltr     %r2,%r2
237         bnz     .Lrdcont
238         st      %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found
239 .Lrdcont:
240         l       %r2,.Linitrd
242         clc     0(3,%r2),.L_hdr         # skip HDRx and EOFx
243         bz      .Lagain2
244         clc     0(3,%r2),.L_eof
245         bz      .Lagain2
248 # reset files in VM reader
250         stidp   .Lcpuid                 # store cpuid
251         tm      .Lcpuid,0xff            # running VM ?
252         bno     .Lnoreset
253         la      %r2,.Lreset
254         lhi     %r3,26
255         diag    %r2,%r3,8
256         la      %r5,.Lirb
257         stsch   0(%r5)                  # check if irq is pending
258         tm      30(%r5),0x0f            # by verifying if any of the
259         bnz     .Lwaitforirq            # activity or status control
260         tm      31(%r5),0xff            # bits is set in the schib
261         bz      .Lnoreset
262 .Lwaitforirq:
263         bas     %r14,.Lirqwait          # wait for IO interrupt
264         c       %r1,0xb8                # compare subchannel number
265         bne     .Lwaitforirq
266         la      %r5,.Lirb
267         tsch    0(%r5)
268 .Lnoreset:
269         b       .Lnoload
272 # everything loaded, go for it
274 .Lnoload:
275         l       %r1,.Lstartup
276         br      %r1
278 .Linitrd:.long _end                     # default address of initrd
279 .Lparm: .long  PARMAREA
280 .Lstartup: .long startup
281 .Lreset:.byte   0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
282         .byte   0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
283         .byte   0xc8,0xd6,0xd3,0xc4     # "change rdr all keep nohold"
284 .L_eof: .long   0xc5d6c600       /* C'EOF' */
285 .L_hdr: .long   0xc8c4d900       /* C'HDR' */
286         .align  8
287 .Lcpuid:.fill   8,1,0
290 # SALIPL loader support. Based on a patch by Rob van der Heij.
291 # This entry point is called directly from the SALIPL loader and
292 # doesn't need a builtin ipl record.
294         .org    0x800
295 ENTRY(start)
296         stm     %r0,%r15,0x07b0         # store registers
297         bas     %r14,.Lsetmode          # Immediately switch to 64 bit mode
298         basr    %r12,%r0
299 .base:
300         l       %r11,.parm
301         l       %r8,.cmd                # pointer to command buffer
303         ltr     %r9,%r9                 # do we have SALIPL parameters?
304         bp      .sk8x8
306         mvc     0(64,%r8),0x00b0        # copy saved registers
307         xc      64(240-64,%r8),0(%r8)   # remainder of buffer
308         tr      0(64,%r8),.lowcase
309         b       .gotr
310 .sk8x8:
311         mvc     0(240,%r8),0(%r9)       # copy iplparms into buffer
312 .gotr:
313         slr     %r0,%r0
314         st      %r0,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r11)
315         st      %r0,INITRD_START+ARCH_OFFSET-PARMAREA(%r11)
316         j       startup                 # continue with startup
317 .cmd:   .long   COMMAND_LINE            # address of command line buffer
318 .parm:  .long   PARMAREA
319 .lowcase:
320         .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
321         .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
322         .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
323         .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
324         .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
325         .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
326         .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
327         .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
328         .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
329         .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
330         .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
331         .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
332         .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
333         .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
334         .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
335         .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
337         .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
338         .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
339         .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
340         .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
341         .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
342         .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
343         .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
344         .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
345         .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87   # .abcdefg
346         .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf   # hi
347         .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97   # .jklmnop
348         .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf   # qr
349         .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7   # ..stuvwx
350         .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef   # yz
351         .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
352         .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
355 # startup-code at 0x10000, running in absolute addressing mode
356 # this is called either by the ipl loader or directly by PSW restart
357 # or linload or SALIPL
359         .org    0x10000
360 ENTRY(startup)
361         j       .Lep_startup_normal
362         .org    0x10008
364 # This is a list of s390 kernel entry points. At address 0x1000f the number of
365 # valid entry points is stored.
367 # IMPORTANT: Do not change this table, it is s390 kernel ABI!
369         .ascii  "S390EP"
370         .byte   0x00,0x01
372 # kdump startup-code at 0x10010, running in 64 bit absolute addressing mode
374         .org    0x10010
375 ENTRY(startup_kdump)
376         j       .Lep_startup_kdump
377 .Lep_startup_normal:
378 #ifdef CONFIG_64BIT
379         mvi     __LC_AR_MODE_ID,1       # set esame flag
380         slr     %r0,%r0                 # set cpuid to zero
381         lhi     %r1,2                   # mode 2 = esame (dump)
382         sigp    %r1,%r0,0x12            # switch to esame mode
383         bras    %r13,0f
384         .fill   16,4,0x0
385 0:      lmh     %r0,%r15,0(%r13)        # clear high-order half of gprs
386         sam31                           # switch to 31 bit addressing mode
387 #else
388         mvi     __LC_AR_MODE_ID,0       # set ESA flag (mode 0)
389 #endif
390         basr    %r13,0                  # get base
391 .LPG0:
392         xc      0x200(256),0x200        # partially clear lowcore
393         xc      0x300(256),0x300
394         xc      0xe00(256),0xe00
395         stck    __LC_LAST_UPDATE_CLOCK
396         spt     6f-.LPG0(%r13)
397         mvc     __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
398         xc      __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST
399 #ifndef CONFIG_MARCH_G5
400         # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10}
401         .insn   s,0xb2b10000,0          # store facilities @ __LC_STFL_FAC_LIST
402         tm      __LC_STFL_FAC_LIST,0x01 # stfle available ?
403         jz      0f
404         la      %r0,1
405         .insn   s,0xb2b00000,__LC_STFL_FAC_LIST # store facility list extended
406         # verify if all required facilities are supported by the machine
407 0:      la      %r1,__LC_STFL_FAC_LIST
408         la      %r2,3f+8-.LPG0(%r13)
409         l       %r3,0(%r2)
410 1:      l       %r0,0(%r1)
411         n       %r0,4(%r2)
412         cl      %r0,4(%r2)
413         jne     2f
414         la      %r1,4(%r1)
415         la      %r2,4(%r2)
416         ahi     %r3,-1
417         jnz     1b
418         j       4f
419 2:      l       %r15,.Lstack-.LPG0(%r13)
420         ahi     %r15,-96
421         la      %r2,.Lals_string-.LPG0(%r13)
422         l       %r3,.Lsclp_print-.LPG0(%r13)
423         basr    %r14,%r3
424         lpsw    3f-.LPG0(%r13)          # machine type not good enough, crash
425 .Lals_string:
426         .asciz  "The Linux kernel requires more recent processor hardware"
427 .Lsclp_print:
428         .long   _sclp_print_early
429 .Lstack:
430         .long   0x8000 + (1<<(PAGE_SHIFT+THREAD_ORDER))
431         .align 16
432 3:      .long   0x000a0000,0x8badcccc
434 # List of facilities that are required. If not all facilities are present
435 # the kernel will crash. Format is number of facility words with bits set,
436 # followed by the facility words.
438 #if defined(CONFIG_64BIT)
439 #if defined(CONFIG_MARCH_ZEC12)
440         .long 3, 0xc100eff2, 0xf46ce800, 0x00400000
441 #elif defined(CONFIG_MARCH_Z196)
442         .long 2, 0xc100eff2, 0xf46c0000
443 #elif defined(CONFIG_MARCH_Z10)
444         .long 2, 0xc100eff2, 0xf0680000
445 #elif defined(CONFIG_MARCH_Z9_109)
446         .long 1, 0xc100efc2
447 #elif defined(CONFIG_MARCH_Z990)
448         .long 1, 0xc0002000
449 #elif defined(CONFIG_MARCH_Z900)
450         .long 1, 0xc0000000
451 #endif
452 #else
453 #if defined(CONFIG_MARCH_ZEC12)
454         .long 1, 0x8100c880
455 #elif defined(CONFIG_MARCH_Z196)
456         .long 1, 0x8100c880
457 #elif defined(CONFIG_MARCH_Z10)
458         .long 1, 0x8100c880
459 #elif defined(CONFIG_MARCH_Z9_109)
460         .long 1, 0x8100c880
461 #elif defined(CONFIG_MARCH_Z990)
462         .long 1, 0x80002000
463 #elif defined(CONFIG_MARCH_Z900)
464         .long 1, 0x80000000
465 #endif
466 #endif
468 #endif
470 #ifdef CONFIG_64BIT
471         /* Continue with 64bit startup code in head64.S */
472         sam64                           # switch to 64 bit mode
473         jg      startup_continue
474 #else
475         /* Continue with 31bit startup code in head31.S */
476         l       %r13,5f-.LPG0(%r13)
477         b       0(%r13)
478         .align  8
479 5:      .long   startup_continue
480 #endif
482         .align  8
483 6:      .long   0x7fffffff,0xffffffff
485 #include "head_kdump.S"
488 # params at 10400 (setup.h)
490         .org    PARMAREA
491         .long   0,0                     # IPL_DEVICE
492         .long   0,0                     # INITRD_START
493         .long   0,0                     # INITRD_SIZE
494         .long   0,0                     # OLDMEM_BASE
495         .long   0,0                     # OLDMEM_SIZE
497         .org    COMMAND_LINE
498         .byte   "root=/dev/ram0 ro"
499         .byte   0
501         .org    0x11000