2 * Copyright IBM Corp. 2005, 2010
4 * Author(s): Hartmut Penner <hp@de.ibm.com>
5 * Martin Schwidefsky <schwidefsky@de.ibm.com>
6 * Rob van der Heij <rvdhei@iae.nl>
7 * Heiko Carstens <heiko.carstens@de.ibm.com>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/asm-offsets.h>
14 #include <asm/thread_info.h>
18 ENTRY(startup_continue)
19 basr %r13,0 # get base
22 l %r1,.Lbase_cc-.LPG1(%r13)
23 mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
24 lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
25 l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
26 # move IPL device to lowcore
30 l %r15,.Linittu-.LPG1(%r13)
31 st %r15,__LC_THREAD_INFO # cache thread info in lowcore
32 mvc __LC_CURRENT(4),__TI_task(%r15)
33 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
34 st %r15,__LC_KERNEL_STACK # set end of kernel stack
37 # Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
38 # and create a kernel NSS if the SAVESYS= parm is defined
40 l %r14,.Lstartup_init-.LPG1(%r13)
42 lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
43 # virtual and never return ...
45 .Lentry:.long 0x00080000,0x80000000 + _stext
46 .Lctl: .long 0x04b50000 # cr0: various things
47 .long 0 # cr1: primary space segment table
48 .long .Lduct # cr2: dispatchable unit control table
49 .long 0 # cr3: instruction authorization
50 .long 0 # cr4: instruction authorization
51 .long .Lduct # cr5: primary-aste origin
52 .long 0 # cr6: I/O interrupts
53 .long 0 # cr7: secondary space segment table
54 .long 0 # cr8: access registers translation
55 .long 0 # cr9: tracing off
56 .long 0 # cr10: tracing off
57 .long 0 # cr11: tracing off
58 .long 0 # cr12: tracing off
59 .long 0 # cr13: home space segment table
60 .long 0xc0000000 # cr14: machine check handling off
61 .long 0 # cr15: linkage stack operations
62 .Lbss_bgn: .long __bss_start
64 .Lparmaddr: .long PARMAREA
65 .Linittu: .long init_thread_union
69 .Lduct: .long 0,0,0,0,.Lduald,0,0,0
73 .long 0x80000000,0,0,0 # invalid access-list entries
76 .long sched_clock_base_cc
80 .org 0x100000 - 0x11000 # head.o ends at 0x11000
82 # startup-code, running in absolute addressing mode
85 basr %r13,0 # get base
87 # check control registers
88 stctl %c0,%c15,0(%r15)
89 oi 2(%r15),0x60 # enable sigp emergency & external call
90 oi 0(%r15),0x10 # switch on low address protection
94 lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
95 l %r14,.Lstart-.LPG3(%r13)
96 basr %r14,%r14 # call start_kernel
98 # We returned from start_kernel ?!? PANIK
101 lpsw .Ldw-.(%r13) # load disabled wait psw
104 .Ldw: .long 0x000a0000,0x00000000
105 .Lstart:.long start_kernel
106 .Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0