arch/s390/kernel/irq.c

   1 /*
   2  *    Copyright IBM Corp. 2004, 2011
   3  *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
   4  *               Holger Smolinski <Holger.Smolinski@de.ibm.com>,
   5  *               Thomas Spatzier <tspat@de.ibm.com>,
   6  *
   7  * This file contains interrupt related functions.
   8  */
   9
  10 #include <linux/kernel_stat.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/seq_file.h>
  13 #include <linux/proc_fs.h>
  14 #include <linux/profile.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/ftrace.h>
  18 #include <linux/errno.h>
  19 #include <linux/slab.h>
  20 #include <linux/cpu.h>
  21 #include <linux/irq.h>
  22 #include <asm/irq_regs.h>
  23 #include <asm/cputime.h>
  24 #include <asm/lowcore.h>
  25 #include <asm/irq.h>
  26 #include <asm/hw_irq.h>
  27 #include "entry.h"
  28
  29 DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
  30 EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
  31
  32 struct irq_class {
  33         int irq;
  34         char *name;
  35         char *desc;
  36 };
  37
  38 /*
  39  * The list of "main" irq classes on s390. This is the list of interrupts
  40  * that appear both in /proc/stat ("intr" line) and /proc/interrupts.
  41  * Historically only external and I/O interrupts have been part of /proc/stat.
  42  * We can't add the split external and I/O sub classes since the first field
  43  * in the "intr" line in /proc/stat is supposed to be the sum of all other
  44  * fields.
  45  * Since the external and I/O interrupt fields are already sums we would end
  46  * up with having a sum which accounts each interrupt twice.
  47  */
  48 static const struct irq_class irqclass_main_desc[NR_IRQS_BASE] = {
  49         {.irq = EXT_INTERRUPT,  .name = "EXT"},
  50         {.irq = IO_INTERRUPT,   .name = "I/O"},
  51         {.irq = THIN_INTERRUPT, .name = "AIO"},
  52 };
  53
  54 /*
  55  * The list of split external and I/O interrupts that appear only in
  56  * /proc/interrupts.
  57  * In addition this list contains non external / I/O events like NMIs.
  58  */
  59 static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
  60         {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
  61         {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
  62         {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
  63         {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
  64         {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
  65         {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
  66         {.irq = IRQEXT_DSD, .name = "DSD", .desc = "[EXT] DASD Diag"},
  67         {.irq = IRQEXT_VRT, .name = "VRT", .desc = "[EXT] Virtio"},
  68         {.irq = IRQEXT_SCP, .name = "SCP", .desc = "[EXT] Service Call"},
  69         {.irq = IRQEXT_IUC, .name = "IUC", .desc = "[EXT] IUCV"},
  70         {.irq = IRQEXT_CMS, .name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
  71         {.irq = IRQEXT_CMC, .name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
  72         {.irq = IRQEXT_CMR, .name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
  73         {.irq = IRQEXT_FTP, .name = "FTP", .desc = "[EXT] HMC FTP Service"},
  74         {.irq = IRQIO_CIO,  .name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
  75         {.irq = IRQIO_QAI,  .name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
  76         {.irq = IRQIO_DAS,  .name = "DAS", .desc = "[I/O] DASD"},
  77         {.irq = IRQIO_C15,  .name = "C15", .desc = "[I/O] 3215"},
  78         {.irq = IRQIO_C70,  .name = "C70", .desc = "[I/O] 3270"},
  79         {.irq = IRQIO_TAP,  .name = "TAP", .desc = "[I/O] Tape"},
  80         {.irq = IRQIO_VMR,  .name = "VMR", .desc = "[I/O] Unit Record Devices"},
  81         {.irq = IRQIO_LCS,  .name = "LCS", .desc = "[I/O] LCS"},
  82         {.irq = IRQIO_CLW,  .name = "CLW", .desc = "[I/O] CLAW"},
  83         {.irq = IRQIO_CTC,  .name = "CTC", .desc = "[I/O] CTC"},
  84         {.irq = IRQIO_APB,  .name = "APB", .desc = "[I/O] AP Bus"},
  85         {.irq = IRQIO_ADM,  .name = "ADM", .desc = "[I/O] EADM Subchannel"},
  86         {.irq = IRQIO_CSC,  .name = "CSC", .desc = "[I/O] CHSC Subchannel"},
  87         {.irq = IRQIO_PCI,  .name = "PCI", .desc = "[I/O] PCI Interrupt" },
  88         {.irq = IRQIO_MSI,  .name = "MSI", .desc = "[I/O] MSI Interrupt" },
  89         {.irq = IRQIO_VIR,  .name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
  90         {.irq = IRQIO_VAI,  .name = "VAI", .desc = "[I/O] Virtual I/O Devices AI"},
  91         {.irq = NMI_NMI,    .name = "NMI", .desc = "[NMI] Machine Check"},
  92         {.irq = CPU_RST,    .name = "RST", .desc = "[CPU] CPU Restart"},
  93 };
  94
  95 void __init init_IRQ(void)
  96 {
  97         init_cio_interrupts();
  98         init_airq_interrupts();
  99         init_ext_interrupts();
 100 }
 101
 102 void do_IRQ(struct pt_regs *regs, int irq)
 103 {
 104         struct pt_regs *old_regs;
 105
 106         old_regs = set_irq_regs(regs);
 107         irq_enter();
 108         if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
 109                 /* Serve timer interrupts first. */
 110                 clock_comparator_work();
 111         generic_handle_irq(irq);
 112         irq_exit();
 113         set_irq_regs(old_regs);
 114 }
 115
 116 /*
 117  * show_interrupts is needed by /proc/interrupts.
 118  */
 119 int show_interrupts(struct seq_file *p, void *v)
 120 {
 121         int index = *(loff_t *) v;
 122         int cpu, irq;
 123
 124         get_online_cpus();
 125         if (index == 0) {
 126                 seq_puts(p, "           ");
 127                 for_each_online_cpu(cpu)
 128                         seq_printf(p, "CPU%d       ", cpu);
 129                 seq_putc(p, '\n');
 130                 goto out;
 131         }
 132         if (index < NR_IRQS) {
 133                 if (index >= NR_IRQS_BASE)
 134                         goto out;
 135                 /* Adjust index to process irqclass_main_desc array entries */
 136                 index--;
 137                 seq_printf(p, "%s: ", irqclass_main_desc[index].name);
 138                 irq = irqclass_main_desc[index].irq;
 139                 for_each_online_cpu(cpu)
 140                         seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
 141                 seq_putc(p, '\n');
 142                 goto out;
 143         }
 144         for (index = 0; index < NR_ARCH_IRQS; index++) {
 145                 seq_printf(p, "%s: ", irqclass_sub_desc[index].name);
 146                 irq = irqclass_sub_desc[index].irq;
 147                 for_each_online_cpu(cpu)
 148                         seq_printf(p, "%10u ",
 149                                    per_cpu(irq_stat, cpu).irqs[irq]);
 150                 if (irqclass_sub_desc[index].desc)
 151                         seq_printf(p, "  %s", irqclass_sub_desc[index].desc);
 152                 seq_putc(p, '\n');
 153         }
 154 out:
 155         put_online_cpus();
 156         return 0;
 157 }
 158
 159 unsigned int arch_dynirq_lower_bound(unsigned int from)
 160 {
 161         return from < THIN_INTERRUPT ? THIN_INTERRUPT : from;
 162 }
 163
 164 /*
 165  * Switch to the asynchronous interrupt stack for softirq execution.
 166  */
 167 void do_softirq_own_stack(void)
 168 {
 169         unsigned long old, new;
 170
 171         /* Get current stack pointer. */
 172         asm volatile("la %0,0(15)" : "=a" (old));
 173         /* Check against async. stack address range. */
 174         new = S390_lowcore.async_stack;
 175         if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
 176                 /* Need to switch to the async. stack. */
 177                 new -= STACK_FRAME_OVERHEAD;
 178                 ((struct stack_frame *) new)->back_chain = old;
 179                 asm volatile("   la    15,0(%0)\n"
 180                              "   basr  14,%2\n"
 181                              "   la    15,0(%1)\n"
 182                              : : "a" (new), "a" (old),
 183                                  "a" (__do_softirq)
 184                              : "0", "1", "2", "3", "4", "5", "14",
 185                                "cc", "memory" );
 186         } else {
 187                 /* We are already on the async stack. */
 188                 __do_softirq();
 189         }
 190 }
 191
 192 /*
 193  * ext_int_hash[index] is the list head for all external interrupts that hash
 194  * to this index.
 195  */
 196 static struct hlist_head ext_int_hash[32] ____cacheline_aligned;
 197
 198 struct ext_int_info {
 199         ext_int_handler_t handler;
 200         struct hlist_node entry;
 201         struct rcu_head rcu;
 202         u16 code;
 203 };
 204
 205 /* ext_int_hash_lock protects the handler lists for external interrupts */
 206 static DEFINE_SPINLOCK(ext_int_hash_lock);
 207
 208 static inline int ext_hash(u16 code)
 209 {
 210         BUILD_BUG_ON(!is_power_of_2(ARRAY_SIZE(ext_int_hash)));
 211
 212         return (code + (code >> 9)) & (ARRAY_SIZE(ext_int_hash) - 1);
 213 }
 214
 215 int register_external_irq(u16 code, ext_int_handler_t handler)
 216 {
 217         struct ext_int_info *p;
 218         unsigned long flags;
 219         int index;
 220
 221         p = kmalloc(sizeof(*p), GFP_ATOMIC);
 222         if (!p)
 223                 return -ENOMEM;
 224         p->code = code;
 225         p->handler = handler;
 226         index = ext_hash(code);
 227
 228         spin_lock_irqsave(&ext_int_hash_lock, flags);
 229         hlist_add_head_rcu(&p->entry, &ext_int_hash[index]);
 230         spin_unlock_irqrestore(&ext_int_hash_lock, flags);
 231         return 0;
 232 }
 233 EXPORT_SYMBOL(register_external_irq);
 234
 235 int unregister_external_irq(u16 code, ext_int_handler_t handler)
 236 {
 237         struct ext_int_info *p;
 238         unsigned long flags;
 239         int index = ext_hash(code);
 240
 241         spin_lock_irqsave(&ext_int_hash_lock, flags);
 242         hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
 243                 if (p->code == code && p->handler == handler) {
 244                         hlist_del_rcu(&p->entry);
 245                         kfree_rcu(p, rcu);
 246                 }
 247         }
 248         spin_unlock_irqrestore(&ext_int_hash_lock, flags);
 249         return 0;
 250 }
 251 EXPORT_SYMBOL(unregister_external_irq);
 252
 253 static irqreturn_t do_ext_interrupt(int irq, void *dummy)
 254 {
 255         struct pt_regs *regs = get_irq_regs();
 256         struct ext_code ext_code;
 257         struct ext_int_info *p;
 258         int index;
 259
 260         ext_code = *(struct ext_code *) &regs->int_code;
 261         if (ext_code.code != EXT_IRQ_CLK_COMP)
 262                 set_cpu_flag(CIF_NOHZ_DELAY);
 263
 264         index = ext_hash(ext_code.code);
 265         rcu_read_lock();
 266         hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
 267                 if (unlikely(p->code != ext_code.code))
 268                         continue;
 269                 p->handler(ext_code, regs->int_parm, regs->int_parm_long);
 270         }
 271         rcu_read_unlock();
 272         return IRQ_HANDLED;
 273 }
 274
 275 static struct irqaction external_interrupt = {
 276         .name    = "EXT",
 277         .handler = do_ext_interrupt,
 278 };
 279
 280 void __init init_ext_interrupts(void)
 281 {
 282         int idx;
 283
 284         for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
 285                 INIT_HLIST_HEAD(&ext_int_hash[idx]);
 286
 287         irq_set_chip_and_handler(EXT_INTERRUPT,
 288                                  &dummy_irq_chip, handle_percpu_irq);
 289         setup_irq(EXT_INTERRUPT, &external_interrupt);
 290 }
 291
 292 static DEFINE_SPINLOCK(irq_subclass_lock);
 293 static unsigned char irq_subclass_refcount[64];
 294
 295 void irq_subclass_register(enum irq_subclass subclass)
 296 {
 297         spin_lock(&irq_subclass_lock);
 298         if (!irq_subclass_refcount[subclass])
 299                 ctl_set_bit(0, subclass);
 300         irq_subclass_refcount[subclass]++;
 301         spin_unlock(&irq_subclass_lock);
 302 }
 303 EXPORT_SYMBOL(irq_subclass_register);
 304
 305 void irq_subclass_unregister(enum irq_subclass subclass)
 306 {
 307         spin_lock(&irq_subclass_lock);
 308         irq_subclass_refcount[subclass]--;
 309         if (!irq_subclass_refcount[subclass])
 310                 ctl_clear_bit(0, subclass);
 311         spin_unlock(&irq_subclass_lock);
 312 }
 313 EXPORT_SYMBOL(irq_subclass_unregister);