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Staging: netwave: delete the driver
[linux/fpc-iii.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
blobbdff56583e114ea6120a21976be0dd9559bdc765
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/slab.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/sched.h>
38 #include <linux/skbuff.h>
39 #include <linux/netdevice.h>
40 #include <linux/wireless.h>
41 #include <linux/firmware.h>
42 #include <linux/etherdevice.h>
43 #include <linux/if_arp.h>
44
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwlagn"
50
51 #include "iwl-eeprom.h"
52 #include "iwl-dev.h"
53 #include "iwl-core.h"
54 #include "iwl-io.h"
55 #include "iwl-helpers.h"
56 #include "iwl-sta.h"
57 #include "iwl-calib.h"
58
59
60 /******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66 /*
67 * module name, copyright, version, etc.
68 */
69 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
70
71 #ifdef CONFIG_IWLWIFI_DEBUG
72 #define VD "d"
73 #else
74 #define VD
75 #endif
76
77 #define DRV_VERSION IWLWIFI_VERSION VD
78
79
80 MODULE_DESCRIPTION(DRV_DESCRIPTION);
81 MODULE_VERSION(DRV_VERSION);
82 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
83 MODULE_LICENSE("GPL");
84 MODULE_ALIAS("iwl4965");
85
86 /*************** STATION TABLE MANAGEMENT ****
87 * mac80211 should be examined to determine if sta_info is duplicating
88 * the functionality provided here
89 */
90
91 /**************************************************************/
92
93 /**
94 * iwl_commit_rxon - commit staging_rxon to hardware
95 *
96 * The RXON command in staging_rxon is committed to the hardware and
97 * the active_rxon structure is updated with the new data. This
98 * function correctly transitions out of the RXON_ASSOC_MSK state if
99 * a HW tune is required based on the RXON structure changes.
100 */
101 int iwl_commit_rxon(struct iwl_priv *priv)
102 {
103 /* cast away the const for active_rxon in this function */
104 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
105 int ret;
106 bool new_assoc =
107 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
108
109 if (!iwl_is_alive(priv))
110 return -EBUSY;
111
112 /* always get timestamp with Rx frame */
113 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
114
115 ret = iwl_check_rxon_cmd(priv);
116 if (ret) {
117 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
118 return -EINVAL;
119 }
120
121 /*
122 * receive commit_rxon request
123 * abort any previous channel switch if still in process
124 */
125 if (priv->switch_rxon.switch_in_progress &&
126 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
127 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
128 le16_to_cpu(priv->switch_rxon.channel));
129 priv->switch_rxon.switch_in_progress = false;
130 }
131
132 /* If we don't need to send a full RXON, we can use
133 * iwl_rxon_assoc_cmd which is used to reconfigure filter
134 * and other flags for the current radio configuration. */
135 if (!iwl_full_rxon_required(priv)) {
136 ret = iwl_send_rxon_assoc(priv);
137 if (ret) {
138 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
139 return ret;
140 }
141
142 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
143 iwl_print_rx_config_cmd(priv);
144 return 0;
145 }
146
147 /* station table will be cleared */
148 priv->assoc_station_added = 0;
149
150 /* If we are currently associated and the new config requires
151 * an RXON_ASSOC and the new config wants the associated mask enabled,
152 * we must clear the associated from the active configuration
153 * before we apply the new config */
154 if (iwl_is_associated(priv) && new_assoc) {
155 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
156 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
157
158 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
159 sizeof(struct iwl_rxon_cmd),
160 &priv->active_rxon);
161
162 /* If the mask clearing failed then we set
163 * active_rxon back to what it was previously */
164 if (ret) {
165 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
166 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
167 return ret;
168 }
169 }
170
171 IWL_DEBUG_INFO(priv, "Sending RXON\n"
172 "* with%s RXON_FILTER_ASSOC_MSK\n"
173 "* channel = %d\n"
174 "* bssid = %pM\n",
175 (new_assoc ? "" : "out"),
176 le16_to_cpu(priv->staging_rxon.channel),
177 priv->staging_rxon.bssid_addr);
178
179 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
180
181 /* Apply the new configuration
182 * RXON unassoc clears the station table in uCode, send it before
183 * we add the bcast station. If assoc bit is set, we will send RXON
184 * after having added the bcast and bssid station.
185 */
186 if (!new_assoc) {
187 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
188 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
189 if (ret) {
190 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
191 return ret;
192 }
193 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
194 }
195
196 iwl_clear_stations_table(priv);
197
198 priv->start_calib = 0;
199
200 /* Add the broadcast address so we can send broadcast frames */
201 priv->cfg->ops->lib->add_bcast_station(priv);
202
203
204 /* If we have set the ASSOC_MSK and we are in BSS mode then
205 * add the IWL_AP_ID to the station rate table */
206 if (new_assoc) {
207 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
208 ret = iwl_rxon_add_station(priv,
209 priv->active_rxon.bssid_addr, 1);
210 if (ret == IWL_INVALID_STATION) {
211 IWL_ERR(priv,
212 "Error adding AP address for TX.\n");
213 return -EIO;
214 }
215 priv->assoc_station_added = 1;
216 if (priv->default_wep_key &&
217 iwl_send_static_wepkey_cmd(priv, 0))
218 IWL_ERR(priv,
219 "Could not send WEP static key.\n");
220 }
221
222 /*
223 * allow CTS-to-self if possible for new association.
224 * this is relevant only for 5000 series and up,
225 * but will not damage 4965
226 */
227 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
228
229 /* Apply the new configuration
230 * RXON assoc doesn't clear the station table in uCode,
231 */
232 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
233 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
234 if (ret) {
235 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
236 return ret;
237 }
238 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
239 }
240 iwl_print_rx_config_cmd(priv);
241
242 iwl_init_sensitivity(priv);
243
244 /* If we issue a new RXON command which required a tune then we must
245 * send a new TXPOWER command or we won't be able to Tx any frames */
246 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
247 if (ret) {
248 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
249 return ret;
250 }
251
252 return 0;
253 }
254
255 void iwl_update_chain_flags(struct iwl_priv *priv)
256 {
257
258 if (priv->cfg->ops->hcmd->set_rxon_chain)
259 priv->cfg->ops->hcmd->set_rxon_chain(priv);
260 iwlcore_commit_rxon(priv);
261 }
262
263 static void iwl_clear_free_frames(struct iwl_priv *priv)
264 {
265 struct list_head *element;
266
267 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
268 priv->frames_count);
269
270 while (!list_empty(&priv->free_frames)) {
271 element = priv->free_frames.next;
272 list_del(element);
273 kfree(list_entry(element, struct iwl_frame, list));
274 priv->frames_count--;
275 }
276
277 if (priv->frames_count) {
278 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
279 priv->frames_count);
280 priv->frames_count = 0;
281 }
282 }
283
284 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
285 {
286 struct iwl_frame *frame;
287 struct list_head *element;
288 if (list_empty(&priv->free_frames)) {
289 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
290 if (!frame) {
291 IWL_ERR(priv, "Could not allocate frame!\n");
292 return NULL;
293 }
294
295 priv->frames_count++;
296 return frame;
297 }
298
299 element = priv->free_frames.next;
300 list_del(element);
301 return list_entry(element, struct iwl_frame, list);
302 }
303
304 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
305 {
306 memset(frame, 0, sizeof(*frame));
307 list_add(&frame->list, &priv->free_frames);
308 }
309
310 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
311 struct ieee80211_hdr *hdr,
312 int left)
313 {
314 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
315 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
316 (priv->iw_mode != NL80211_IFTYPE_AP)))
317 return 0;
318
319 if (priv->ibss_beacon->len > left)
320 return 0;
321
322 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
323
324 return priv->ibss_beacon->len;
325 }
326
327 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
328 static void iwl_set_beacon_tim(struct iwl_priv *priv,
329 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
330 u8 *beacon, u32 frame_size)
331 {
332 u16 tim_idx;
333 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
334
335 /*
336 * The index is relative to frame start but we start looking at the
337 * variable-length part of the beacon.
338 */
339 tim_idx = mgmt->u.beacon.variable - beacon;
340
341 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
342 while ((tim_idx < (frame_size - 2)) &&
343 (beacon[tim_idx] != WLAN_EID_TIM))
344 tim_idx += beacon[tim_idx+1] + 2;
345
346 /* If TIM field was found, set variables */
347 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
348 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
349 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
350 } else
351 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
352 }
353
354 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
355 struct iwl_frame *frame)
356 {
357 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
358 u32 frame_size;
359 u32 rate_flags;
360 u32 rate;
361 /*
362 * We have to set up the TX command, the TX Beacon command, and the
363 * beacon contents.
364 */
365
366 /* Initialize memory */
367 tx_beacon_cmd = &frame->u.beacon;
368 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
369
370 /* Set up TX beacon contents */
371 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
372 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
373 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
374 return 0;
375
376 /* Set up TX command fields */
377 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
378 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
379 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
380 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
381 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
382
383 /* Set up TX beacon command fields */
384 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
385 frame_size);
386
387 /* Set up packet rate and flags */
388 rate = iwl_rate_get_lowest_plcp(priv);
389 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
390 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
391 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
392 rate_flags |= RATE_MCS_CCK_MSK;
393 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
394 rate_flags);
395
396 return sizeof(*tx_beacon_cmd) + frame_size;
397 }
398 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
399 {
400 struct iwl_frame *frame;
401 unsigned int frame_size;
402 int rc;
403
404 frame = iwl_get_free_frame(priv);
405 if (!frame) {
406 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
407 "command.\n");
408 return -ENOMEM;
409 }
410
411 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
412 if (!frame_size) {
413 IWL_ERR(priv, "Error configuring the beacon command\n");
414 iwl_free_frame(priv, frame);
415 return -EINVAL;
416 }
417
418 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
419 &frame->u.cmd[0]);
420
421 iwl_free_frame(priv, frame);
422
423 return rc;
424 }
425
426 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
427 {
428 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
429
430 dma_addr_t addr = get_unaligned_le32(&tb->lo);
431 if (sizeof(dma_addr_t) > sizeof(u32))
432 addr |=
433 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
434
435 return addr;
436 }
437
438 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
439 {
440 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
441
442 return le16_to_cpu(tb->hi_n_len) >> 4;
443 }
444
445 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
446 dma_addr_t addr, u16 len)
447 {
448 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
449 u16 hi_n_len = len << 4;
450
451 put_unaligned_le32(addr, &tb->lo);
452 if (sizeof(dma_addr_t) > sizeof(u32))
453 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
454
455 tb->hi_n_len = cpu_to_le16(hi_n_len);
456
457 tfd->num_tbs = idx + 1;
458 }
459
460 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
461 {
462 return tfd->num_tbs & 0x1f;
463 }
464
465 /**
466 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
467 * @priv - driver private data
468 * @txq - tx queue
469 *
470 * Does NOT advance any TFD circular buffer read/write indexes
471 * Does NOT free the TFD itself (which is within circular buffer)
472 */
473 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
474 {
475 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
476 struct iwl_tfd *tfd;
477 struct pci_dev *dev = priv->pci_dev;
478 int index = txq->q.read_ptr;
479 int i;
480 int num_tbs;
481
482 tfd = &tfd_tmp[index];
483
484 /* Sanity check on number of chunks */
485 num_tbs = iwl_tfd_get_num_tbs(tfd);
486
487 if (num_tbs >= IWL_NUM_OF_TBS) {
488 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
489 /* @todo issue fatal error, it is quite serious situation */
490 return;
491 }
492
493 /* Unmap tx_cmd */
494 if (num_tbs)
495 pci_unmap_single(dev,
496 pci_unmap_addr(&txq->meta[index], mapping),
497 pci_unmap_len(&txq->meta[index], len),
498 PCI_DMA_BIDIRECTIONAL);
499
500 /* Unmap chunks, if any. */
501 for (i = 1; i < num_tbs; i++) {
502 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
503 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
504
505 if (txq->txb) {
506 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
507 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
508 }
509 }
510 }
511
512 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
513 struct iwl_tx_queue *txq,
514 dma_addr_t addr, u16 len,
515 u8 reset, u8 pad)
516 {
517 struct iwl_queue *q;
518 struct iwl_tfd *tfd, *tfd_tmp;
519 u32 num_tbs;
520
521 q = &txq->q;
522 tfd_tmp = (struct iwl_tfd *)txq->tfds;
523 tfd = &tfd_tmp[q->write_ptr];
524
525 if (reset)
526 memset(tfd, 0, sizeof(*tfd));
527
528 num_tbs = iwl_tfd_get_num_tbs(tfd);
529
530 /* Each TFD can point to a maximum 20 Tx buffers */
531 if (num_tbs >= IWL_NUM_OF_TBS) {
532 IWL_ERR(priv, "Error can not send more than %d chunks\n",
533 IWL_NUM_OF_TBS);
534 return -EINVAL;
535 }
536
537 BUG_ON(addr & ~DMA_BIT_MASK(36));
538 if (unlikely(addr & ~IWL_TX_DMA_MASK))
539 IWL_ERR(priv, "Unaligned address = %llx\n",
540 (unsigned long long)addr);
541
542 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
543
544 return 0;
545 }
546
547 /*
548 * Tell nic where to find circular buffer of Tx Frame Descriptors for
549 * given Tx queue, and enable the DMA channel used for that queue.
550 *
551 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
552 * channels supported in hardware.
553 */
554 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
555 struct iwl_tx_queue *txq)
556 {
557 int txq_id = txq->q.id;
558
559 /* Circular buffer (TFD queue in DRAM) physical base address */
560 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
561 txq->q.dma_addr >> 8);
562
563 return 0;
564 }
565
566 /******************************************************************************
567 *
568 * Generic RX handler implementations
569 *
570 ******************************************************************************/
571 static void iwl_rx_reply_alive(struct iwl_priv *priv,
572 struct iwl_rx_mem_buffer *rxb)
573 {
574 struct iwl_rx_packet *pkt = rxb_addr(rxb);
575 struct iwl_alive_resp *palive;
576 struct delayed_work *pwork;
577
578 palive = &pkt->u.alive_frame;
579
580 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
581 "0x%01X 0x%01X\n",
582 palive->is_valid, palive->ver_type,
583 palive->ver_subtype);
584
585 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
586 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
587 memcpy(&priv->card_alive_init,
588 &pkt->u.alive_frame,
589 sizeof(struct iwl_init_alive_resp));
590 pwork = &priv->init_alive_start;
591 } else {
592 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
593 memcpy(&priv->card_alive, &pkt->u.alive_frame,
594 sizeof(struct iwl_alive_resp));
595 pwork = &priv->alive_start;
596 }
597
598 /* We delay the ALIVE response by 5ms to
599 * give the HW RF Kill time to activate... */
600 if (palive->is_valid == UCODE_VALID_OK)
601 queue_delayed_work(priv->workqueue, pwork,
602 msecs_to_jiffies(5));
603 else
604 IWL_WARN(priv, "uCode did not respond OK.\n");
605 }
606
607 static void iwl_bg_beacon_update(struct work_struct *work)
608 {
609 struct iwl_priv *priv =
610 container_of(work, struct iwl_priv, beacon_update);
611 struct sk_buff *beacon;
612
613 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
614 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
615
616 if (!beacon) {
617 IWL_ERR(priv, "update beacon failed\n");
618 return;
619 }
620
621 mutex_lock(&priv->mutex);
622 /* new beacon skb is allocated every time; dispose previous.*/
623 if (priv->ibss_beacon)
624 dev_kfree_skb(priv->ibss_beacon);
625
626 priv->ibss_beacon = beacon;
627 mutex_unlock(&priv->mutex);
628
629 iwl_send_beacon_cmd(priv);
630 }
631
632 /**
633 * iwl_bg_statistics_periodic - Timer callback to queue statistics
634 *
635 * This callback is provided in order to send a statistics request.
636 *
637 * This timer function is continually reset to execute within
638 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
639 * was received. We need to ensure we receive the statistics in order
640 * to update the temperature used for calibrating the TXPOWER.
641 */
642 static void iwl_bg_statistics_periodic(unsigned long data)
643 {
644 struct iwl_priv *priv = (struct iwl_priv *)data;
645
646 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
647 return;
648
649 /* dont send host command if rf-kill is on */
650 if (!iwl_is_ready_rf(priv))
651 return;
652
653 iwl_send_statistics_request(priv, CMD_ASYNC, false);
654 }
655
656
657 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
658 u32 start_idx, u32 num_events,
659 u32 mode)
660 {
661 u32 i;
662 u32 ptr; /* SRAM byte address of log data */
663 u32 ev, time, data; /* event log data */
664 unsigned long reg_flags;
665
666 if (mode == 0)
667 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
668 else
669 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
670
671 /* Make sure device is powered up for SRAM reads */
672 spin_lock_irqsave(&priv->reg_lock, reg_flags);
673 if (iwl_grab_nic_access(priv)) {
674 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
675 return;
676 }
677
678 /* Set starting address; reads will auto-increment */
679 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
680 rmb();
681
682 /*
683 * "time" is actually "data" for mode 0 (no timestamp).
684 * place event id # at far right for easier visual parsing.
685 */
686 for (i = 0; i < num_events; i++) {
687 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
688 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
689 if (mode == 0) {
690 trace_iwlwifi_dev_ucode_cont_event(priv,
691 0, time, ev);
692 } else {
693 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
694 trace_iwlwifi_dev_ucode_cont_event(priv,
695 time, data, ev);
696 }
697 }
698 /* Allow device to power down */
699 iwl_release_nic_access(priv);
700 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
701 }
702
703 static void iwl_continuous_event_trace(struct iwl_priv *priv)
704 {
705 u32 capacity; /* event log capacity in # entries */
706 u32 base; /* SRAM byte address of event log header */
707 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
708 u32 num_wraps; /* # times uCode wrapped to top of log */
709 u32 next_entry; /* index of next entry to be written by uCode */
710
711 if (priv->ucode_type == UCODE_INIT)
712 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
713 else
714 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
715 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
716 capacity = iwl_read_targ_mem(priv, base);
717 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
718 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
719 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
720 } else
721 return;
722
723 if (num_wraps == priv->event_log.num_wraps) {
724 iwl_print_cont_event_trace(priv,
725 base, priv->event_log.next_entry,
726 next_entry - priv->event_log.next_entry,
727 mode);
728 priv->event_log.non_wraps_count++;
729 } else {
730 if ((num_wraps - priv->event_log.num_wraps) > 1)
731 priv->event_log.wraps_more_count++;
732 else
733 priv->event_log.wraps_once_count++;
734 trace_iwlwifi_dev_ucode_wrap_event(priv,
735 num_wraps - priv->event_log.num_wraps,
736 next_entry, priv->event_log.next_entry);
737 if (next_entry < priv->event_log.next_entry) {
738 iwl_print_cont_event_trace(priv, base,
739 priv->event_log.next_entry,
740 capacity - priv->event_log.next_entry,
741 mode);
742
743 iwl_print_cont_event_trace(priv, base, 0,
744 next_entry, mode);
745 } else {
746 iwl_print_cont_event_trace(priv, base,
747 next_entry, capacity - next_entry,
748 mode);
749
750 iwl_print_cont_event_trace(priv, base, 0,
751 next_entry, mode);
752 }
753 }
754 priv->event_log.num_wraps = num_wraps;
755 priv->event_log.next_entry = next_entry;
756 }
757
758 /**
759 * iwl_bg_ucode_trace - Timer callback to log ucode event
760 *
761 * The timer is continually set to execute every
762 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
763 * this function is to perform continuous uCode event logging operation
764 * if enabled
765 */
766 static void iwl_bg_ucode_trace(unsigned long data)
767 {
768 struct iwl_priv *priv = (struct iwl_priv *)data;
769
770 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
771 return;
772
773 if (priv->event_log.ucode_trace) {
774 iwl_continuous_event_trace(priv);
775 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
776 mod_timer(&priv->ucode_trace,
777 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
778 }
779 }
780
781 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
782 struct iwl_rx_mem_buffer *rxb)
783 {
784 #ifdef CONFIG_IWLWIFI_DEBUG
785 struct iwl_rx_packet *pkt = rxb_addr(rxb);
786 struct iwl4965_beacon_notif *beacon =
787 (struct iwl4965_beacon_notif *)pkt->u.raw;
788 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
789
790 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
791 "tsf %d %d rate %d\n",
792 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
793 beacon->beacon_notify_hdr.failure_frame,
794 le32_to_cpu(beacon->ibss_mgr_status),
795 le32_to_cpu(beacon->high_tsf),
796 le32_to_cpu(beacon->low_tsf), rate);
797 #endif
798
799 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
800 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
801 queue_work(priv->workqueue, &priv->beacon_update);
802 }
803
804 /* Handle notification from uCode that card's power state is changing
805 * due to software, hardware, or critical temperature RFKILL */
806 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
807 struct iwl_rx_mem_buffer *rxb)
808 {
809 struct iwl_rx_packet *pkt = rxb_addr(rxb);
810 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
811 unsigned long status = priv->status;
812
813 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
814 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
815 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
816 (flags & CT_CARD_DISABLED) ?
817 "Reached" : "Not reached");
818
819 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
820 CT_CARD_DISABLED)) {
821
822 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
823 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
824
825 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
826 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
827
828 if (!(flags & RXON_CARD_DISABLED)) {
829 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
830 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
831 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
832 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
833 }
834 if (flags & CT_CARD_DISABLED)
835 iwl_tt_enter_ct_kill(priv);
836 }
837 if (!(flags & CT_CARD_DISABLED))
838 iwl_tt_exit_ct_kill(priv);
839
840 if (flags & HW_CARD_DISABLED)
841 set_bit(STATUS_RF_KILL_HW, &priv->status);
842 else
843 clear_bit(STATUS_RF_KILL_HW, &priv->status);
844
845
846 if (!(flags & RXON_CARD_DISABLED))
847 iwl_scan_cancel(priv);
848
849 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
850 test_bit(STATUS_RF_KILL_HW, &priv->status)))
851 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
852 test_bit(STATUS_RF_KILL_HW, &priv->status));
853 else
854 wake_up_interruptible(&priv->wait_command_queue);
855 }
856
857 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
858 {
859 if (src == IWL_PWR_SRC_VAUX) {
860 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
861 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
862 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
863 ~APMG_PS_CTRL_MSK_PWR_SRC);
864 } else {
865 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
866 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
867 ~APMG_PS_CTRL_MSK_PWR_SRC);
868 }
869
870 return 0;
871 }
872
873 /**
874 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
875 *
876 * Setup the RX handlers for each of the reply types sent from the uCode
877 * to the host.
878 *
879 * This function chains into the hardware specific files for them to setup
880 * any hardware specific handlers as well.
881 */
882 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
883 {
884 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
885 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
886 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
887 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
888 iwl_rx_spectrum_measure_notif;
889 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
890 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
891 iwl_rx_pm_debug_statistics_notif;
892 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
893
894 /*
895 * The same handler is used for both the REPLY to a discrete
896 * statistics request from the host as well as for the periodic
897 * statistics notifications (after received beacons) from the uCode.
898 */
899 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
900 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
901
902 iwl_setup_rx_scan_handlers(priv);
903
904 /* status change handler */
905 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
906
907 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
908 iwl_rx_missed_beacon_notif;
909 /* Rx handlers */
910 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
911 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
912 /* block ack */
913 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
914 /* Set up hardware specific Rx handlers */
915 priv->cfg->ops->lib->rx_handler_setup(priv);
916 }
917
918 /**
919 * iwl_rx_handle - Main entry function for receiving responses from uCode
920 *
921 * Uses the priv->rx_handlers callback function array to invoke
922 * the appropriate handlers, including command responses,
923 * frame-received notifications, and other notifications.
924 */
925 void iwl_rx_handle(struct iwl_priv *priv)
926 {
927 struct iwl_rx_mem_buffer *rxb;
928 struct iwl_rx_packet *pkt;
929 struct iwl_rx_queue *rxq = &priv->rxq;
930 u32 r, i;
931 int reclaim;
932 unsigned long flags;
933 u8 fill_rx = 0;
934 u32 count = 8;
935 int total_empty;
936
937 /* uCode's read index (stored in shared DRAM) indicates the last Rx
938 * buffer that the driver may process (last buffer filled by ucode). */
939 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
940 i = rxq->read;
941
942 /* Rx interrupt, but nothing sent from uCode */
943 if (i == r)
944 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
945
946 /* calculate total frames need to be restock after handling RX */
947 total_empty = r - rxq->write_actual;
948 if (total_empty < 0)
949 total_empty += RX_QUEUE_SIZE;
950
951 if (total_empty > (RX_QUEUE_SIZE / 2))
952 fill_rx = 1;
953
954 while (i != r) {
955 rxb = rxq->queue[i];
956
957 /* If an RXB doesn't have a Rx queue slot associated with it,
958 * then a bug has been introduced in the queue refilling
959 * routines -- catch it here */
960 BUG_ON(rxb == NULL);
961
962 rxq->queue[i] = NULL;
963
964 pci_unmap_page(priv->pci_dev, rxb->page_dma,
965 PAGE_SIZE << priv->hw_params.rx_page_order,
966 PCI_DMA_FROMDEVICE);
967 pkt = rxb_addr(rxb);
968
969 trace_iwlwifi_dev_rx(priv, pkt,
970 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
971
972 /* Reclaim a command buffer only if this packet is a response
973 * to a (driver-originated) command.
974 * If the packet (e.g. Rx frame) originated from uCode,
975 * there is no command buffer to reclaim.
976 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
977 * but apparently a few don't get set; catch them here. */
978 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
979 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
980 (pkt->hdr.cmd != REPLY_RX) &&
981 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
982 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
983 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
984 (pkt->hdr.cmd != REPLY_TX);
985
986 /* Based on type of command response or notification,
987 * handle those that need handling via function in
988 * rx_handlers table. See iwl_setup_rx_handlers() */
989 if (priv->rx_handlers[pkt->hdr.cmd]) {
990 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
991 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
992 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
993 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
994 } else {
995 /* No handling needed */
996 IWL_DEBUG_RX(priv,
997 "r %d i %d No handler needed for %s, 0x%02x\n",
998 r, i, get_cmd_string(pkt->hdr.cmd),
999 pkt->hdr.cmd);
1000 }
1001
1002 /*
1003 * XXX: After here, we should always check rxb->page
1004 * against NULL before touching it or its virtual
1005 * memory (pkt). Because some rx_handler might have
1006 * already taken or freed the pages.
1007 */
1008
1009 if (reclaim) {
1010 /* Invoke any callbacks, transfer the buffer to caller,
1011 * and fire off the (possibly) blocking iwl_send_cmd()
1012 * as we reclaim the driver command queue */
1013 if (rxb->page)
1014 iwl_tx_cmd_complete(priv, rxb);
1015 else
1016 IWL_WARN(priv, "Claim null rxb?\n");
1017 }
1018
1019 /* Reuse the page if possible. For notification packets and
1020 * SKBs that fail to Rx correctly, add them back into the
1021 * rx_free list for reuse later. */
1022 spin_lock_irqsave(&rxq->lock, flags);
1023 if (rxb->page != NULL) {
1024 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1025 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1026 PCI_DMA_FROMDEVICE);
1027 list_add_tail(&rxb->list, &rxq->rx_free);
1028 rxq->free_count++;
1029 } else
1030 list_add_tail(&rxb->list, &rxq->rx_used);
1031
1032 spin_unlock_irqrestore(&rxq->lock, flags);
1033
1034 i = (i + 1) & RX_QUEUE_MASK;
1035 /* If there are a lot of unused frames,
1036 * restock the Rx queue so ucode wont assert. */
1037 if (fill_rx) {
1038 count++;
1039 if (count >= 8) {
1040 rxq->read = i;
1041 iwl_rx_replenish_now(priv);
1042 count = 0;
1043 }
1044 }
1045 }
1046
1047 /* Backtrack one entry */
1048 rxq->read = i;
1049 if (fill_rx)
1050 iwl_rx_replenish_now(priv);
1051 else
1052 iwl_rx_queue_restock(priv);
1053 }
1054
1055 /* call this function to flush any scheduled tasklet */
1056 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1057 {
1058 /* wait to make sure we flush pending tasklet*/
1059 synchronize_irq(priv->pci_dev->irq);
1060 tasklet_kill(&priv->irq_tasklet);
1061 }
1062
1063 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1064 {
1065 u32 inta, handled = 0;
1066 u32 inta_fh;
1067 unsigned long flags;
1068 u32 i;
1069 #ifdef CONFIG_IWLWIFI_DEBUG
1070 u32 inta_mask;
1071 #endif
1072
1073 spin_lock_irqsave(&priv->lock, flags);
1074
1075 /* Ack/clear/reset pending uCode interrupts.
1076 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1077 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1078 inta = iwl_read32(priv, CSR_INT);
1079 iwl_write32(priv, CSR_INT, inta);
1080
1081 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1082 * Any new interrupts that happen after this, either while we're
1083 * in this tasklet, or later, will show up in next ISR/tasklet. */
1084 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1085 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1086
1087 #ifdef CONFIG_IWLWIFI_DEBUG
1088 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1089 /* just for debug */
1090 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1091 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1092 inta, inta_mask, inta_fh);
1093 }
1094 #endif
1095
1096 spin_unlock_irqrestore(&priv->lock, flags);
1097
1098 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1099 * atomic, make sure that inta covers all the interrupts that
1100 * we've discovered, even if FH interrupt came in just after
1101 * reading CSR_INT. */
1102 if (inta_fh & CSR49_FH_INT_RX_MASK)
1103 inta |= CSR_INT_BIT_FH_RX;
1104 if (inta_fh & CSR49_FH_INT_TX_MASK)
1105 inta |= CSR_INT_BIT_FH_TX;
1106
1107 /* Now service all interrupt bits discovered above. */
1108 if (inta & CSR_INT_BIT_HW_ERR) {
1109 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1110
1111 /* Tell the device to stop sending interrupts */
1112 iwl_disable_interrupts(priv);
1113
1114 priv->isr_stats.hw++;
1115 iwl_irq_handle_error(priv);
1116
1117 handled |= CSR_INT_BIT_HW_ERR;
1118
1119 return;
1120 }
1121
1122 #ifdef CONFIG_IWLWIFI_DEBUG
1123 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1124 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1125 if (inta & CSR_INT_BIT_SCD) {
1126 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1127 "the frame/frames.\n");
1128 priv->isr_stats.sch++;
1129 }
1130
1131 /* Alive notification via Rx interrupt will do the real work */
1132 if (inta & CSR_INT_BIT_ALIVE) {
1133 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1134 priv->isr_stats.alive++;
1135 }
1136 }
1137 #endif
1138 /* Safely ignore these bits for debug checks below */
1139 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1140
1141 /* HW RF KILL switch toggled */
1142 if (inta & CSR_INT_BIT_RF_KILL) {
1143 int hw_rf_kill = 0;
1144 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1145 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1146 hw_rf_kill = 1;
1147
1148 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1149 hw_rf_kill ? "disable radio" : "enable radio");
1150
1151 priv->isr_stats.rfkill++;
1152
1153 /* driver only loads ucode once setting the interface up.
1154 * the driver allows loading the ucode even if the radio
1155 * is killed. Hence update the killswitch state here. The
1156 * rfkill handler will care about restarting if needed.
1157 */
1158 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1159 if (hw_rf_kill)
1160 set_bit(STATUS_RF_KILL_HW, &priv->status);
1161 else
1162 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1163 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1164 }
1165
1166 handled |= CSR_INT_BIT_RF_KILL;
1167 }
1168
1169 /* Chip got too hot and stopped itself */
1170 if (inta & CSR_INT_BIT_CT_KILL) {
1171 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1172 priv->isr_stats.ctkill++;
1173 handled |= CSR_INT_BIT_CT_KILL;
1174 }
1175
1176 /* Error detected by uCode */
1177 if (inta & CSR_INT_BIT_SW_ERR) {
1178 IWL_ERR(priv, "Microcode SW error detected. "
1179 " Restarting 0x%X.\n", inta);
1180 priv->isr_stats.sw++;
1181 priv->isr_stats.sw_err = inta;
1182 iwl_irq_handle_error(priv);
1183 handled |= CSR_INT_BIT_SW_ERR;
1184 }
1185
1186 /*
1187 * uCode wakes up after power-down sleep.
1188 * Tell device about any new tx or host commands enqueued,
1189 * and about any Rx buffers made available while asleep.
1190 */
1191 if (inta & CSR_INT_BIT_WAKEUP) {
1192 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1193 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1194 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1195 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1196 priv->isr_stats.wakeup++;
1197 handled |= CSR_INT_BIT_WAKEUP;
1198 }
1199
1200 /* All uCode command responses, including Tx command responses,
1201 * Rx "responses" (frame-received notification), and other
1202 * notifications from uCode come through here*/
1203 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1204 iwl_rx_handle(priv);
1205 priv->isr_stats.rx++;
1206 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1207 }
1208
1209 /* This "Tx" DMA channel is used only for loading uCode */
1210 if (inta & CSR_INT_BIT_FH_TX) {
1211 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1212 priv->isr_stats.tx++;
1213 handled |= CSR_INT_BIT_FH_TX;
1214 /* Wake up uCode load routine, now that load is complete */
1215 priv->ucode_write_complete = 1;
1216 wake_up_interruptible(&priv->wait_command_queue);
1217 }
1218
1219 if (inta & ~handled) {
1220 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1221 priv->isr_stats.unhandled++;
1222 }
1223
1224 if (inta & ~(priv->inta_mask)) {
1225 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1226 inta & ~priv->inta_mask);
1227 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1228 }
1229
1230 /* Re-enable all interrupts */
1231 /* only Re-enable if diabled by irq */
1232 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1233 iwl_enable_interrupts(priv);
1234
1235 #ifdef CONFIG_IWLWIFI_DEBUG
1236 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1237 inta = iwl_read32(priv, CSR_INT);
1238 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1239 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1240 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1241 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1242 }
1243 #endif
1244 }
1245
1246 /* tasklet for iwlagn interrupt */
1247 static void iwl_irq_tasklet(struct iwl_priv *priv)
1248 {
1249 u32 inta = 0;
1250 u32 handled = 0;
1251 unsigned long flags;
1252 u32 i;
1253 #ifdef CONFIG_IWLWIFI_DEBUG
1254 u32 inta_mask;
1255 #endif
1256
1257 spin_lock_irqsave(&priv->lock, flags);
1258
1259 /* Ack/clear/reset pending uCode interrupts.
1260 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1261 */
1262 /* There is a hardware bug in the interrupt mask function that some
1263 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1264 * they are disabled in the CSR_INT_MASK register. Furthermore the
1265 * ICT interrupt handling mechanism has another bug that might cause
1266 * these unmasked interrupts fail to be detected. We workaround the
1267 * hardware bugs here by ACKing all the possible interrupts so that
1268 * interrupt coalescing can still be achieved.
1269 */
1270 iwl_write32(priv, CSR_INT, priv->inta | ~priv->inta_mask);
1271
1272 inta = priv->inta;
1273
1274 #ifdef CONFIG_IWLWIFI_DEBUG
1275 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1276 /* just for debug */
1277 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1278 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1279 inta, inta_mask);
1280 }
1281 #endif
1282
1283 spin_unlock_irqrestore(&priv->lock, flags);
1284
1285 /* saved interrupt in inta variable now we can reset priv->inta */
1286 priv->inta = 0;
1287
1288 /* Now service all interrupt bits discovered above. */
1289 if (inta & CSR_INT_BIT_HW_ERR) {
1290 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1291
1292 /* Tell the device to stop sending interrupts */
1293 iwl_disable_interrupts(priv);
1294
1295 priv->isr_stats.hw++;
1296 iwl_irq_handle_error(priv);
1297
1298 handled |= CSR_INT_BIT_HW_ERR;
1299
1300 return;
1301 }
1302
1303 #ifdef CONFIG_IWLWIFI_DEBUG
1304 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1305 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1306 if (inta & CSR_INT_BIT_SCD) {
1307 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1308 "the frame/frames.\n");
1309 priv->isr_stats.sch++;
1310 }
1311
1312 /* Alive notification via Rx interrupt will do the real work */
1313 if (inta & CSR_INT_BIT_ALIVE) {
1314 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1315 priv->isr_stats.alive++;
1316 }
1317 }
1318 #endif
1319 /* Safely ignore these bits for debug checks below */
1320 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1321
1322 /* HW RF KILL switch toggled */
1323 if (inta & CSR_INT_BIT_RF_KILL) {
1324 int hw_rf_kill = 0;
1325 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1326 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1327 hw_rf_kill = 1;
1328
1329 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1330 hw_rf_kill ? "disable radio" : "enable radio");
1331
1332 priv->isr_stats.rfkill++;
1333
1334 /* driver only loads ucode once setting the interface up.
1335 * the driver allows loading the ucode even if the radio
1336 * is killed. Hence update the killswitch state here. The
1337 * rfkill handler will care about restarting if needed.
1338 */
1339 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1340 if (hw_rf_kill)
1341 set_bit(STATUS_RF_KILL_HW, &priv->status);
1342 else
1343 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1344 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1345 }
1346
1347 handled |= CSR_INT_BIT_RF_KILL;
1348 }
1349
1350 /* Chip got too hot and stopped itself */
1351 if (inta & CSR_INT_BIT_CT_KILL) {
1352 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1353 priv->isr_stats.ctkill++;
1354 handled |= CSR_INT_BIT_CT_KILL;
1355 }
1356
1357 /* Error detected by uCode */
1358 if (inta & CSR_INT_BIT_SW_ERR) {
1359 IWL_ERR(priv, "Microcode SW error detected. "
1360 " Restarting 0x%X.\n", inta);
1361 priv->isr_stats.sw++;
1362 priv->isr_stats.sw_err = inta;
1363 iwl_irq_handle_error(priv);
1364 handled |= CSR_INT_BIT_SW_ERR;
1365 }
1366
1367 /* uCode wakes up after power-down sleep */
1368 if (inta & CSR_INT_BIT_WAKEUP) {
1369 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1370 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1371 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1372 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1373
1374 priv->isr_stats.wakeup++;
1375
1376 handled |= CSR_INT_BIT_WAKEUP;
1377 }
1378
1379 /* All uCode command responses, including Tx command responses,
1380 * Rx "responses" (frame-received notification), and other
1381 * notifications from uCode come through here*/
1382 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1383 CSR_INT_BIT_RX_PERIODIC)) {
1384 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1385 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1386 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1387 iwl_write32(priv, CSR_FH_INT_STATUS,
1388 CSR49_FH_INT_RX_MASK);
1389 }
1390 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1391 handled |= CSR_INT_BIT_RX_PERIODIC;
1392 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1393 }
1394 /* Sending RX interrupt require many steps to be done in the
1395 * the device:
1396 * 1- write interrupt to current index in ICT table.
1397 * 2- dma RX frame.
1398 * 3- update RX shared data to indicate last write index.
1399 * 4- send interrupt.
1400 * This could lead to RX race, driver could receive RX interrupt
1401 * but the shared data changes does not reflect this;
1402 * periodic interrupt will detect any dangling Rx activity.
1403 */
1404
1405 /* Disable periodic interrupt; we use it as just a one-shot. */
1406 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1407 CSR_INT_PERIODIC_DIS);
1408 iwl_rx_handle(priv);
1409
1410 /*
1411 * Enable periodic interrupt in 8 msec only if we received
1412 * real RX interrupt (instead of just periodic int), to catch
1413 * any dangling Rx interrupt. If it was just the periodic
1414 * interrupt, there was no dangling Rx activity, and no need
1415 * to extend the periodic interrupt; one-shot is enough.
1416 */
1417 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1418 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1419 CSR_INT_PERIODIC_ENA);
1420
1421 priv->isr_stats.rx++;
1422 }
1423
1424 /* This "Tx" DMA channel is used only for loading uCode */
1425 if (inta & CSR_INT_BIT_FH_TX) {
1426 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1427 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1428 priv->isr_stats.tx++;
1429 handled |= CSR_INT_BIT_FH_TX;
1430 /* Wake up uCode load routine, now that load is complete */
1431 priv->ucode_write_complete = 1;
1432 wake_up_interruptible(&priv->wait_command_queue);
1433 }
1434
1435 if (inta & ~handled) {
1436 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1437 priv->isr_stats.unhandled++;
1438 }
1439
1440 if (inta & ~(priv->inta_mask)) {
1441 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1442 inta & ~priv->inta_mask);
1443 }
1444
1445 /* Re-enable all interrupts */
1446 /* only Re-enable if diabled by irq */
1447 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1448 iwl_enable_interrupts(priv);
1449 }
1450
1451
1452 /******************************************************************************
1453 *
1454 * uCode download functions
1455 *
1456 ******************************************************************************/
1457
1458 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1459 {
1460 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1461 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1462 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1463 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1464 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1465 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1466 }
1467
1468 static void iwl_nic_start(struct iwl_priv *priv)
1469 {
1470 /* Remove all resets to allow NIC to operate */
1471 iwl_write32(priv, CSR_RESET, 0);
1472 }
1473
1474
1475 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1476 static int iwl_mac_setup_register(struct iwl_priv *priv);
1477
1478 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1479 {
1480 const char *name_pre = priv->cfg->fw_name_pre;
1481
1482 if (first)
1483 priv->fw_index = priv->cfg->ucode_api_max;
1484 else
1485 priv->fw_index--;
1486
1487 if (priv->fw_index < priv->cfg->ucode_api_min) {
1488 IWL_ERR(priv, "no suitable firmware found!\n");
1489 return -ENOENT;
1490 }
1491
1492 sprintf(priv->firmware_name, "%s%d%s",
1493 name_pre, priv->fw_index, ".ucode");
1494
1495 IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1496 priv->firmware_name);
1497
1498 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1499 &priv->pci_dev->dev, GFP_KERNEL, priv,
1500 iwl_ucode_callback);
1501 }
1502
1503 /**
1504 * iwl_ucode_callback - callback when firmware was loaded
1505 *
1506 * If loaded successfully, copies the firmware into buffers
1507 * for the card to fetch (via DMA).
1508 */
1509 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1510 {
1511 struct iwl_priv *priv = context;
1512 struct iwl_ucode_header *ucode;
1513 const unsigned int api_max = priv->cfg->ucode_api_max;
1514 const unsigned int api_min = priv->cfg->ucode_api_min;
1515 u8 *src;
1516 size_t len;
1517 u32 api_ver, build;
1518 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1519 int err;
1520 u16 eeprom_ver;
1521
1522 if (!ucode_raw) {
1523 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1524 priv->firmware_name);
1525 goto try_again;
1526 }
1527
1528 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1529 priv->firmware_name, ucode_raw->size);
1530
1531 /* Make sure that we got at least the v1 header! */
1532 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1533 IWL_ERR(priv, "File size way too small!\n");
1534 goto try_again;
1535 }
1536
1537 /* Data from ucode file: header followed by uCode images */
1538 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1539
1540 priv->ucode_ver = le32_to_cpu(ucode->ver);
1541 api_ver = IWL_UCODE_API(priv->ucode_ver);
1542 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1543 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1544 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1545 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1546 init_data_size =
1547 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1548 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1549 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1550
1551 /* api_ver should match the api version forming part of the
1552 * firmware filename ... but we don't check for that and only rely
1553 * on the API version read from firmware header from here on forward */
1554
1555 if (api_ver < api_min || api_ver > api_max) {
1556 IWL_ERR(priv, "Driver unable to support your firmware API. "
1557 "Driver supports v%u, firmware is v%u.\n",
1558 api_max, api_ver);
1559 goto try_again;
1560 }
1561
1562 if (api_ver != api_max)
1563 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1564 "got v%u. New firmware can be obtained "
1565 "from http://www.intellinuxwireless.org.\n",
1566 api_max, api_ver);
1567
1568 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1569 IWL_UCODE_MAJOR(priv->ucode_ver),
1570 IWL_UCODE_MINOR(priv->ucode_ver),
1571 IWL_UCODE_API(priv->ucode_ver),
1572 IWL_UCODE_SERIAL(priv->ucode_ver));
1573
1574 snprintf(priv->hw->wiphy->fw_version,
1575 sizeof(priv->hw->wiphy->fw_version),
1576 "%u.%u.%u.%u",
1577 IWL_UCODE_MAJOR(priv->ucode_ver),
1578 IWL_UCODE_MINOR(priv->ucode_ver),
1579 IWL_UCODE_API(priv->ucode_ver),
1580 IWL_UCODE_SERIAL(priv->ucode_ver));
1581
1582 if (build)
1583 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1584
1585 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1586 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1587 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1588 ? "OTP" : "EEPROM", eeprom_ver);
1589
1590 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1591 priv->ucode_ver);
1592 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1593 inst_size);
1594 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1595 data_size);
1596 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1597 init_size);
1598 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1599 init_data_size);
1600 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1601 boot_size);
1602
1603 /*
1604 * For any of the failures below (before allocating pci memory)
1605 * we will try to load a version with a smaller API -- maybe the
1606 * user just got a corrupted version of the latest API.
1607 */
1608
1609 /* Verify size of file vs. image size info in file's header */
1610 if (ucode_raw->size !=
1611 priv->cfg->ops->ucode->get_header_size(api_ver) +
1612 inst_size + data_size + init_size +
1613 init_data_size + boot_size) {
1614
1615 IWL_DEBUG_INFO(priv,
1616 "uCode file size %d does not match expected size\n",
1617 (int)ucode_raw->size);
1618 goto try_again;
1619 }
1620
1621 /* Verify that uCode images will fit in card's SRAM */
1622 if (inst_size > priv->hw_params.max_inst_size) {
1623 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1624 inst_size);
1625 goto try_again;
1626 }
1627
1628 if (data_size > priv->hw_params.max_data_size) {
1629 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1630 data_size);
1631 goto try_again;
1632 }
1633 if (init_size > priv->hw_params.max_inst_size) {
1634 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1635 init_size);
1636 goto try_again;
1637 }
1638 if (init_data_size > priv->hw_params.max_data_size) {
1639 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1640 init_data_size);
1641 goto try_again;
1642 }
1643 if (boot_size > priv->hw_params.max_bsm_size) {
1644 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1645 boot_size);
1646 goto try_again;
1647 }
1648
1649 /* Allocate ucode buffers for card's bus-master loading ... */
1650
1651 /* Runtime instructions and 2 copies of data:
1652 * 1) unmodified from disk
1653 * 2) backup cache for save/restore during power-downs */
1654 priv->ucode_code.len = inst_size;
1655 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1656
1657 priv->ucode_data.len = data_size;
1658 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1659
1660 priv->ucode_data_backup.len = data_size;
1661 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1662
1663 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1664 !priv->ucode_data_backup.v_addr)
1665 goto err_pci_alloc;
1666
1667 /* Initialization instructions and data */
1668 if (init_size && init_data_size) {
1669 priv->ucode_init.len = init_size;
1670 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1671
1672 priv->ucode_init_data.len = init_data_size;
1673 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1674
1675 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1676 goto err_pci_alloc;
1677 }
1678
1679 /* Bootstrap (instructions only, no data) */
1680 if (boot_size) {
1681 priv->ucode_boot.len = boot_size;
1682 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1683
1684 if (!priv->ucode_boot.v_addr)
1685 goto err_pci_alloc;
1686 }
1687
1688 /* Copy images into buffers for card's bus-master reads ... */
1689
1690 /* Runtime instructions (first block of data in file) */
1691 len = inst_size;
1692 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1693 memcpy(priv->ucode_code.v_addr, src, len);
1694 src += len;
1695
1696 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1697 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1698
1699 /* Runtime data (2nd block)
1700 * NOTE: Copy into backup buffer will be done in iwl_up() */
1701 len = data_size;
1702 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1703 memcpy(priv->ucode_data.v_addr, src, len);
1704 memcpy(priv->ucode_data_backup.v_addr, src, len);
1705 src += len;
1706
1707 /* Initialization instructions (3rd block) */
1708 if (init_size) {
1709 len = init_size;
1710 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1711 len);
1712 memcpy(priv->ucode_init.v_addr, src, len);
1713 src += len;
1714 }
1715
1716 /* Initialization data (4th block) */
1717 if (init_data_size) {
1718 len = init_data_size;
1719 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1720 len);
1721 memcpy(priv->ucode_init_data.v_addr, src, len);
1722 src += len;
1723 }
1724
1725 /* Bootstrap instructions (5th block) */
1726 len = boot_size;
1727 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1728 memcpy(priv->ucode_boot.v_addr, src, len);
1729
1730 /**************************************************
1731 * This is still part of probe() in a sense...
1732 *
1733 * 9. Setup and register with mac80211 and debugfs
1734 **************************************************/
1735 err = iwl_mac_setup_register(priv);
1736 if (err)
1737 goto out_unbind;
1738
1739 err = iwl_dbgfs_register(priv, DRV_NAME);
1740 if (err)
1741 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1742
1743 /* We have our copies now, allow OS release its copies */
1744 release_firmware(ucode_raw);
1745 return;
1746
1747 try_again:
1748 /* try next, if any */
1749 if (iwl_request_firmware(priv, false))
1750 goto out_unbind;
1751 release_firmware(ucode_raw);
1752 return;
1753
1754 err_pci_alloc:
1755 IWL_ERR(priv, "failed to allocate pci memory\n");
1756 iwl_dealloc_ucode_pci(priv);
1757 out_unbind:
1758 device_release_driver(&priv->pci_dev->dev);
1759 release_firmware(ucode_raw);
1760 }
1761
1762 static const char *desc_lookup_text[] = {
1763 "OK",
1764 "FAIL",
1765 "BAD_PARAM",
1766 "BAD_CHECKSUM",
1767 "NMI_INTERRUPT_WDG",
1768 "SYSASSERT",
1769 "FATAL_ERROR",
1770 "BAD_COMMAND",
1771 "HW_ERROR_TUNE_LOCK",
1772 "HW_ERROR_TEMPERATURE",
1773 "ILLEGAL_CHAN_FREQ",
1774 "VCC_NOT_STABLE",
1775 "FH_ERROR",
1776 "NMI_INTERRUPT_HOST",
1777 "NMI_INTERRUPT_ACTION_PT",
1778 "NMI_INTERRUPT_UNKNOWN",
1779 "UCODE_VERSION_MISMATCH",
1780 "HW_ERROR_ABS_LOCK",
1781 "HW_ERROR_CAL_LOCK_FAIL",
1782 "NMI_INTERRUPT_INST_ACTION_PT",
1783 "NMI_INTERRUPT_DATA_ACTION_PT",
1784 "NMI_TRM_HW_ER",
1785 "NMI_INTERRUPT_TRM",
1786 "NMI_INTERRUPT_BREAK_POINT"
1787 "DEBUG_0",
1788 "DEBUG_1",
1789 "DEBUG_2",
1790 "DEBUG_3",
1791 "ADVANCED SYSASSERT"
1792 };
1793
1794 static const char *desc_lookup(int i)
1795 {
1796 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1797
1798 if (i < 0 || i > max)
1799 i = max;
1800
1801 return desc_lookup_text[i];
1802 }
1803
1804 #define ERROR_START_OFFSET (1 * sizeof(u32))
1805 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1806
1807 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1808 {
1809 u32 data2, line;
1810 u32 desc, time, count, base, data1;
1811 u32 blink1, blink2, ilink1, ilink2;
1812
1813 if (priv->ucode_type == UCODE_INIT)
1814 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1815 else
1816 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1817
1818 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1819 IWL_ERR(priv,
1820 "Not valid error log pointer 0x%08X for %s uCode\n",
1821 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1822 return;
1823 }
1824
1825 count = iwl_read_targ_mem(priv, base);
1826
1827 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1828 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1829 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1830 priv->status, count);
1831 }
1832
1833 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1834 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1835 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1836 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1837 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1838 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1839 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1840 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1841 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1842
1843 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1844 blink1, blink2, ilink1, ilink2);
1845
1846 IWL_ERR(priv, "Desc Time "
1847 "data1 data2 line\n");
1848 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1849 desc_lookup(desc), desc, time, data1, data2, line);
1850 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1851 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1852 ilink1, ilink2);
1853
1854 }
1855
1856 #define EVENT_START_OFFSET (4 * sizeof(u32))
1857
1858 /**
1859 * iwl_print_event_log - Dump error event log to syslog
1860 *
1861 */
1862 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1863 u32 num_events, u32 mode,
1864 int pos, char **buf, size_t bufsz)
1865 {
1866 u32 i;
1867 u32 base; /* SRAM byte address of event log header */
1868 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1869 u32 ptr; /* SRAM byte address of log data */
1870 u32 ev, time, data; /* event log data */
1871 unsigned long reg_flags;
1872
1873 if (num_events == 0)
1874 return pos;
1875 if (priv->ucode_type == UCODE_INIT)
1876 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1877 else
1878 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1879
1880 if (mode == 0)
1881 event_size = 2 * sizeof(u32);
1882 else
1883 event_size = 3 * sizeof(u32);
1884
1885 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1886
1887 /* Make sure device is powered up for SRAM reads */
1888 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1889 iwl_grab_nic_access(priv);
1890
1891 /* Set starting address; reads will auto-increment */
1892 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1893 rmb();
1894
1895 /* "time" is actually "data" for mode 0 (no timestamp).
1896 * place event id # at far right for easier visual parsing. */
1897 for (i = 0; i < num_events; i++) {
1898 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1899 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1900 if (mode == 0) {
1901 /* data, ev */
1902 if (bufsz) {
1903 pos += scnprintf(*buf + pos, bufsz - pos,
1904 "EVT_LOG:0x%08x:%04u\n",
1905 time, ev);
1906 } else {
1907 trace_iwlwifi_dev_ucode_event(priv, 0,
1908 time, ev);
1909 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1910 time, ev);
1911 }
1912 } else {
1913 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1914 if (bufsz) {
1915 pos += scnprintf(*buf + pos, bufsz - pos,
1916 "EVT_LOGT:%010u:0x%08x:%04u\n",
1917 time, data, ev);
1918 } else {
1919 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1920 time, data, ev);
1921 trace_iwlwifi_dev_ucode_event(priv, time,
1922 data, ev);
1923 }
1924 }
1925 }
1926
1927 /* Allow device to power down */
1928 iwl_release_nic_access(priv);
1929 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1930 return pos;
1931 }
1932
1933 /**
1934 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1935 */
1936 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1937 u32 num_wraps, u32 next_entry,
1938 u32 size, u32 mode,
1939 int pos, char **buf, size_t bufsz)
1940 {
1941 /*
1942 * display the newest DEFAULT_LOG_ENTRIES entries
1943 * i.e the entries just before the next ont that uCode would fill.
1944 */
1945 if (num_wraps) {
1946 if (next_entry < size) {
1947 pos = iwl_print_event_log(priv,
1948 capacity - (size - next_entry),
1949 size - next_entry, mode,
1950 pos, buf, bufsz);
1951 pos = iwl_print_event_log(priv, 0,
1952 next_entry, mode,
1953 pos, buf, bufsz);
1954 } else
1955 pos = iwl_print_event_log(priv, next_entry - size,
1956 size, mode, pos, buf, bufsz);
1957 } else {
1958 if (next_entry < size) {
1959 pos = iwl_print_event_log(priv, 0, next_entry,
1960 mode, pos, buf, bufsz);
1961 } else {
1962 pos = iwl_print_event_log(priv, next_entry - size,
1963 size, mode, pos, buf, bufsz);
1964 }
1965 }
1966 return pos;
1967 }
1968
1969 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1970 #define MAX_EVENT_LOG_SIZE (512)
1971
1972 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1973
1974 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1975 char **buf, bool display)
1976 {
1977 u32 base; /* SRAM byte address of event log header */
1978 u32 capacity; /* event log capacity in # entries */
1979 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1980 u32 num_wraps; /* # times uCode wrapped to top of log */
1981 u32 next_entry; /* index of next entry to be written by uCode */
1982 u32 size; /* # entries that we'll print */
1983 int pos = 0;
1984 size_t bufsz = 0;
1985
1986 if (priv->ucode_type == UCODE_INIT)
1987 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1988 else
1989 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1990
1991 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1992 IWL_ERR(priv,
1993 "Invalid event log pointer 0x%08X for %s uCode\n",
1994 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1995 return -EINVAL;
1996 }
1997
1998 /* event log header */
1999 capacity = iwl_read_targ_mem(priv, base);
2000 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2001 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2002 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2003
2004 if (capacity > MAX_EVENT_LOG_SIZE) {
2005 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2006 capacity, MAX_EVENT_LOG_SIZE);
2007 capacity = MAX_EVENT_LOG_SIZE;
2008 }
2009
2010 if (next_entry > MAX_EVENT_LOG_SIZE) {
2011 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2012 next_entry, MAX_EVENT_LOG_SIZE);
2013 next_entry = MAX_EVENT_LOG_SIZE;
2014 }
2015
2016 size = num_wraps ? capacity : next_entry;
2017
2018 /* bail out if nothing in log */
2019 if (size == 0) {
2020 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2021 return pos;
2022 }
2023
2024 #ifdef CONFIG_IWLWIFI_DEBUG
2025 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2026 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2027 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2028 #else
2029 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2030 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2031 #endif
2032 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2033 size);
2034
2035 #ifdef CONFIG_IWLWIFI_DEBUG
2036 if (display) {
2037 if (full_log)
2038 bufsz = capacity * 48;
2039 else
2040 bufsz = size * 48;
2041 *buf = kmalloc(bufsz, GFP_KERNEL);
2042 if (!*buf)
2043 return -ENOMEM;
2044 }
2045 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2046 /*
2047 * if uCode has wrapped back to top of log,
2048 * start at the oldest entry,
2049 * i.e the next one that uCode would fill.
2050 */
2051 if (num_wraps)
2052 pos = iwl_print_event_log(priv, next_entry,
2053 capacity - next_entry, mode,
2054 pos, buf, bufsz);
2055 /* (then/else) start at top of log */
2056 pos = iwl_print_event_log(priv, 0,
2057 next_entry, mode, pos, buf, bufsz);
2058 } else
2059 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2060 next_entry, size, mode,
2061 pos, buf, bufsz);
2062 #else
2063 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2064 next_entry, size, mode,
2065 pos, buf, bufsz);
2066 #endif
2067 return pos;
2068 }
2069
2070 /**
2071 * iwl_alive_start - called after REPLY_ALIVE notification received
2072 * from protocol/runtime uCode (initialization uCode's
2073 * Alive gets handled by iwl_init_alive_start()).
2074 */
2075 static void iwl_alive_start(struct iwl_priv *priv)
2076 {
2077 int ret = 0;
2078
2079 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2080
2081 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2082 /* We had an error bringing up the hardware, so take it
2083 * all the way back down so we can try again */
2084 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2085 goto restart;
2086 }
2087
2088 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2089 * This is a paranoid check, because we would not have gotten the
2090 * "runtime" alive if code weren't properly loaded. */
2091 if (iwl_verify_ucode(priv)) {
2092 /* Runtime instruction load was bad;
2093 * take it all the way back down so we can try again */
2094 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2095 goto restart;
2096 }
2097
2098 iwl_clear_stations_table(priv);
2099 ret = priv->cfg->ops->lib->alive_notify(priv);
2100 if (ret) {
2101 IWL_WARN(priv,
2102 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2103 goto restart;
2104 }
2105
2106 /* After the ALIVE response, we can send host commands to the uCode */
2107 set_bit(STATUS_ALIVE, &priv->status);
2108
2109 if (iwl_is_rfkill(priv))
2110 return;
2111
2112 ieee80211_wake_queues(priv->hw);
2113
2114 priv->active_rate = priv->rates_mask;
2115 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2116
2117 /* Configure Tx antenna selection based on H/W config */
2118 if (priv->cfg->ops->hcmd->set_tx_ant)
2119 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2120
2121 if (iwl_is_associated(priv)) {
2122 struct iwl_rxon_cmd *active_rxon =
2123 (struct iwl_rxon_cmd *)&priv->active_rxon;
2124 /* apply any changes in staging */
2125 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2126 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2127 } else {
2128 /* Initialize our rx_config data */
2129 iwl_connection_init_rx_config(priv, priv->iw_mode);
2130
2131 if (priv->cfg->ops->hcmd->set_rxon_chain)
2132 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2133
2134 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2135 }
2136
2137 /* Configure Bluetooth device coexistence support */
2138 iwl_send_bt_config(priv);
2139
2140 iwl_reset_run_time_calib(priv);
2141
2142 /* Configure the adapter for unassociated operation */
2143 iwlcore_commit_rxon(priv);
2144
2145 /* At this point, the NIC is initialized and operational */
2146 iwl_rf_kill_ct_config(priv);
2147
2148 iwl_leds_init(priv);
2149
2150 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2151 set_bit(STATUS_READY, &priv->status);
2152 wake_up_interruptible(&priv->wait_command_queue);
2153
2154 iwl_power_update_mode(priv, true);
2155
2156 /* reassociate for ADHOC mode */
2157 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2158 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2159 priv->vif);
2160 if (beacon)
2161 iwl_mac_beacon_update(priv->hw, beacon);
2162 }
2163
2164
2165 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2166 iwl_set_mode(priv, priv->iw_mode);
2167
2168 return;
2169
2170 restart:
2171 queue_work(priv->workqueue, &priv->restart);
2172 }
2173
2174 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2175
2176 static void __iwl_down(struct iwl_priv *priv)
2177 {
2178 unsigned long flags;
2179 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2180
2181 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2182
2183 if (!exit_pending)
2184 set_bit(STATUS_EXIT_PENDING, &priv->status);
2185
2186 iwl_clear_stations_table(priv);
2187
2188 /* Unblock any waiting calls */
2189 wake_up_interruptible_all(&priv->wait_command_queue);
2190
2191 /* Wipe out the EXIT_PENDING status bit if we are not actually
2192 * exiting the module */
2193 if (!exit_pending)
2194 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2195
2196 /* stop and reset the on-board processor */
2197 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2198
2199 /* tell the device to stop sending interrupts */
2200 spin_lock_irqsave(&priv->lock, flags);
2201 iwl_disable_interrupts(priv);
2202 spin_unlock_irqrestore(&priv->lock, flags);
2203 iwl_synchronize_irq(priv);
2204
2205 if (priv->mac80211_registered)
2206 ieee80211_stop_queues(priv->hw);
2207
2208 /* If we have not previously called iwl_init() then
2209 * clear all bits but the RF Kill bit and return */
2210 if (!iwl_is_init(priv)) {
2211 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2212 STATUS_RF_KILL_HW |
2213 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2214 STATUS_GEO_CONFIGURED |
2215 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2216 STATUS_EXIT_PENDING;
2217 goto exit;
2218 }
2219
2220 /* ...otherwise clear out all the status bits but the RF Kill
2221 * bit and continue taking the NIC down. */
2222 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2223 STATUS_RF_KILL_HW |
2224 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2225 STATUS_GEO_CONFIGURED |
2226 test_bit(STATUS_FW_ERROR, &priv->status) <<
2227 STATUS_FW_ERROR |
2228 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2229 STATUS_EXIT_PENDING;
2230
2231 /* device going down, Stop using ICT table */
2232 iwl_disable_ict(priv);
2233
2234 iwl_txq_ctx_stop(priv);
2235 iwl_rxq_stop(priv);
2236
2237 /* Power-down device's busmaster DMA clocks */
2238 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2239 udelay(5);
2240
2241 /* Make sure (redundant) we've released our request to stay awake */
2242 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2243
2244 /* Stop the device, and put it in low power state */
2245 priv->cfg->ops->lib->apm_ops.stop(priv);
2246
2247 exit:
2248 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2249
2250 if (priv->ibss_beacon)
2251 dev_kfree_skb(priv->ibss_beacon);
2252 priv->ibss_beacon = NULL;
2253
2254 /* clear out any free frames */
2255 iwl_clear_free_frames(priv);
2256 }
2257
2258 static void iwl_down(struct iwl_priv *priv)
2259 {
2260 mutex_lock(&priv->mutex);
2261 __iwl_down(priv);
2262 mutex_unlock(&priv->mutex);
2263
2264 iwl_cancel_deferred_work(priv);
2265 }
2266
2267 #define HW_READY_TIMEOUT (50)
2268
2269 static int iwl_set_hw_ready(struct iwl_priv *priv)
2270 {
2271 int ret = 0;
2272
2273 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2274 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2275
2276 /* See if we got it */
2277 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2278 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2279 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2280 HW_READY_TIMEOUT);
2281 if (ret != -ETIMEDOUT)
2282 priv->hw_ready = true;
2283 else
2284 priv->hw_ready = false;
2285
2286 IWL_DEBUG_INFO(priv, "hardware %s\n",
2287 (priv->hw_ready == 1) ? "ready" : "not ready");
2288 return ret;
2289 }
2290
2291 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2292 {
2293 int ret = 0;
2294
2295 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2296
2297 ret = iwl_set_hw_ready(priv);
2298 if (priv->hw_ready)
2299 return ret;
2300
2301 /* If HW is not ready, prepare the conditions to check again */
2302 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2303 CSR_HW_IF_CONFIG_REG_PREPARE);
2304
2305 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2306 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2307 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2308
2309 /* HW should be ready by now, check again. */
2310 if (ret != -ETIMEDOUT)
2311 iwl_set_hw_ready(priv);
2312
2313 return ret;
2314 }
2315
2316 #define MAX_HW_RESTARTS 5
2317
2318 static int __iwl_up(struct iwl_priv *priv)
2319 {
2320 int i;
2321 int ret;
2322
2323 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2324 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2325 return -EIO;
2326 }
2327
2328 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2329 IWL_ERR(priv, "ucode not available for device bringup\n");
2330 return -EIO;
2331 }
2332
2333 iwl_prepare_card_hw(priv);
2334
2335 if (!priv->hw_ready) {
2336 IWL_WARN(priv, "Exit HW not ready\n");
2337 return -EIO;
2338 }
2339
2340 /* If platform's RF_KILL switch is NOT set to KILL */
2341 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2342 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2343 else
2344 set_bit(STATUS_RF_KILL_HW, &priv->status);
2345
2346 if (iwl_is_rfkill(priv)) {
2347 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2348
2349 iwl_enable_interrupts(priv);
2350 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2351 return 0;
2352 }
2353
2354 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2355
2356 ret = iwl_hw_nic_init(priv);
2357 if (ret) {
2358 IWL_ERR(priv, "Unable to init nic\n");
2359 return ret;
2360 }
2361
2362 /* make sure rfkill handshake bits are cleared */
2363 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2364 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2365 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2366
2367 /* clear (again), then enable host interrupts */
2368 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2369 iwl_enable_interrupts(priv);
2370
2371 /* really make sure rfkill handshake bits are cleared */
2372 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2373 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2374
2375 /* Copy original ucode data image from disk into backup cache.
2376 * This will be used to initialize the on-board processor's
2377 * data SRAM for a clean start when the runtime program first loads. */
2378 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2379 priv->ucode_data.len);
2380
2381 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2382
2383 iwl_clear_stations_table(priv);
2384
2385 /* load bootstrap state machine,
2386 * load bootstrap program into processor's memory,
2387 * prepare to load the "initialize" uCode */
2388 ret = priv->cfg->ops->lib->load_ucode(priv);
2389
2390 if (ret) {
2391 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2392 ret);
2393 continue;
2394 }
2395
2396 /* start card; "initialize" will load runtime ucode */
2397 iwl_nic_start(priv);
2398
2399 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2400
2401 return 0;
2402 }
2403
2404 set_bit(STATUS_EXIT_PENDING, &priv->status);
2405 __iwl_down(priv);
2406 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2407
2408 /* tried to restart and config the device for as long as our
2409 * patience could withstand */
2410 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2411 return -EIO;
2412 }
2413
2414
2415 /*****************************************************************************
2416 *
2417 * Workqueue callbacks
2418 *
2419 *****************************************************************************/
2420
2421 static void iwl_bg_init_alive_start(struct work_struct *data)
2422 {
2423 struct iwl_priv *priv =
2424 container_of(data, struct iwl_priv, init_alive_start.work);
2425
2426 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2427 return;
2428
2429 mutex_lock(&priv->mutex);
2430 priv->cfg->ops->lib->init_alive_start(priv);
2431 mutex_unlock(&priv->mutex);
2432 }
2433
2434 static void iwl_bg_alive_start(struct work_struct *data)
2435 {
2436 struct iwl_priv *priv =
2437 container_of(data, struct iwl_priv, alive_start.work);
2438
2439 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2440 return;
2441
2442 /* enable dram interrupt */
2443 iwl_reset_ict(priv);
2444
2445 mutex_lock(&priv->mutex);
2446 iwl_alive_start(priv);
2447 mutex_unlock(&priv->mutex);
2448 }
2449
2450 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2451 {
2452 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2453 run_time_calib_work);
2454
2455 mutex_lock(&priv->mutex);
2456
2457 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2458 test_bit(STATUS_SCANNING, &priv->status)) {
2459 mutex_unlock(&priv->mutex);
2460 return;
2461 }
2462
2463 if (priv->start_calib) {
2464 iwl_chain_noise_calibration(priv, &priv->statistics);
2465
2466 iwl_sensitivity_calibration(priv, &priv->statistics);
2467 }
2468
2469 mutex_unlock(&priv->mutex);
2470 return;
2471 }
2472
2473 static void iwl_bg_restart(struct work_struct *data)
2474 {
2475 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2476
2477 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2478 return;
2479
2480 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2481 mutex_lock(&priv->mutex);
2482 priv->vif = NULL;
2483 priv->is_open = 0;
2484 mutex_unlock(&priv->mutex);
2485 iwl_down(priv);
2486 ieee80211_restart_hw(priv->hw);
2487 } else {
2488 iwl_down(priv);
2489
2490 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2491 return;
2492
2493 mutex_lock(&priv->mutex);
2494 __iwl_up(priv);
2495 mutex_unlock(&priv->mutex);
2496 }
2497 }
2498
2499 static void iwl_bg_rx_replenish(struct work_struct *data)
2500 {
2501 struct iwl_priv *priv =
2502 container_of(data, struct iwl_priv, rx_replenish);
2503
2504 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2505 return;
2506
2507 mutex_lock(&priv->mutex);
2508 iwl_rx_replenish(priv);
2509 mutex_unlock(&priv->mutex);
2510 }
2511
2512 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2513
2514 void iwl_post_associate(struct iwl_priv *priv)
2515 {
2516 struct ieee80211_conf *conf = NULL;
2517 int ret = 0;
2518 unsigned long flags;
2519
2520 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2521 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2522 return;
2523 }
2524
2525 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2526 priv->assoc_id, priv->active_rxon.bssid_addr);
2527
2528
2529 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2530 return;
2531
2532
2533 if (!priv->vif || !priv->is_open)
2534 return;
2535
2536 iwl_scan_cancel_timeout(priv, 200);
2537
2538 conf = ieee80211_get_hw_conf(priv->hw);
2539
2540 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2541 iwlcore_commit_rxon(priv);
2542
2543 iwl_setup_rxon_timing(priv);
2544 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2545 sizeof(priv->rxon_timing), &priv->rxon_timing);
2546 if (ret)
2547 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2548 "Attempting to continue.\n");
2549
2550 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2551
2552 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2553
2554 if (priv->cfg->ops->hcmd->set_rxon_chain)
2555 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2556
2557 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2558
2559 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2560 priv->assoc_id, priv->beacon_int);
2561
2562 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2563 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2564 else
2565 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2566
2567 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2568 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2569 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2570 else
2571 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2572
2573 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2574 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2575
2576 }
2577
2578 iwlcore_commit_rxon(priv);
2579
2580 switch (priv->iw_mode) {
2581 case NL80211_IFTYPE_STATION:
2582 break;
2583
2584 case NL80211_IFTYPE_ADHOC:
2585
2586 /* assume default assoc id */
2587 priv->assoc_id = 1;
2588
2589 iwl_rxon_add_station(priv, priv->bssid, 0);
2590 iwl_send_beacon_cmd(priv);
2591
2592 break;
2593
2594 default:
2595 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2596 __func__, priv->iw_mode);
2597 break;
2598 }
2599
2600 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2601 priv->assoc_station_added = 1;
2602
2603 spin_lock_irqsave(&priv->lock, flags);
2604 iwl_activate_qos(priv, 0);
2605 spin_unlock_irqrestore(&priv->lock, flags);
2606
2607 /* the chain noise calibration will enabled PM upon completion
2608 * If chain noise has already been run, then we need to enable
2609 * power management here */
2610 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2611 iwl_power_update_mode(priv, false);
2612
2613 /* Enable Rx differential gain and sensitivity calibrations */
2614 iwl_chain_noise_reset(priv);
2615 priv->start_calib = 1;
2616
2617 }
2618
2619 /*****************************************************************************
2620 *
2621 * mac80211 entry point functions
2622 *
2623 *****************************************************************************/
2624
2625 #define UCODE_READY_TIMEOUT (4 * HZ)
2626
2627 /*
2628 * Not a mac80211 entry point function, but it fits in with all the
2629 * other mac80211 functions grouped here.
2630 */
2631 static int iwl_mac_setup_register(struct iwl_priv *priv)
2632 {
2633 int ret;
2634 struct ieee80211_hw *hw = priv->hw;
2635 hw->rate_control_algorithm = "iwl-agn-rs";
2636
2637 /* Tell mac80211 our characteristics */
2638 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2639 IEEE80211_HW_NOISE_DBM |
2640 IEEE80211_HW_AMPDU_AGGREGATION |
2641 IEEE80211_HW_SPECTRUM_MGMT;
2642
2643 if (!priv->cfg->broken_powersave)
2644 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2645 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2646
2647 if (priv->cfg->sku & IWL_SKU_N)
2648 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2649 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2650
2651 hw->sta_data_size = sizeof(struct iwl_station_priv);
2652 hw->wiphy->interface_modes =
2653 BIT(NL80211_IFTYPE_STATION) |
2654 BIT(NL80211_IFTYPE_ADHOC);
2655
2656 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2657 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2658
2659 /*
2660 * For now, disable PS by default because it affects
2661 * RX performance significantly.
2662 */
2663 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2664
2665 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2666 /* we create the 802.11 header and a zero-length SSID element */
2667 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2668
2669 /* Default value; 4 EDCA QOS priorities */
2670 hw->queues = 4;
2671
2672 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2673
2674 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2675 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2676 &priv->bands[IEEE80211_BAND_2GHZ];
2677 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2678 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2679 &priv->bands[IEEE80211_BAND_5GHZ];
2680
2681 ret = ieee80211_register_hw(priv->hw);
2682 if (ret) {
2683 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2684 return ret;
2685 }
2686 priv->mac80211_registered = 1;
2687
2688 return 0;
2689 }
2690
2691
2692 static int iwl_mac_start(struct ieee80211_hw *hw)
2693 {
2694 struct iwl_priv *priv = hw->priv;
2695 int ret;
2696
2697 IWL_DEBUG_MAC80211(priv, "enter\n");
2698
2699 /* we should be verifying the device is ready to be opened */
2700 mutex_lock(&priv->mutex);
2701 ret = __iwl_up(priv);
2702 mutex_unlock(&priv->mutex);
2703
2704 if (ret)
2705 return ret;
2706
2707 if (iwl_is_rfkill(priv))
2708 goto out;
2709
2710 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2711
2712 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2713 * mac80211 will not be run successfully. */
2714 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2715 test_bit(STATUS_READY, &priv->status),
2716 UCODE_READY_TIMEOUT);
2717 if (!ret) {
2718 if (!test_bit(STATUS_READY, &priv->status)) {
2719 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2720 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2721 return -ETIMEDOUT;
2722 }
2723 }
2724
2725 iwl_led_start(priv);
2726
2727 out:
2728 priv->is_open = 1;
2729 IWL_DEBUG_MAC80211(priv, "leave\n");
2730 return 0;
2731 }
2732
2733 static void iwl_mac_stop(struct ieee80211_hw *hw)
2734 {
2735 struct iwl_priv *priv = hw->priv;
2736
2737 IWL_DEBUG_MAC80211(priv, "enter\n");
2738
2739 if (!priv->is_open)
2740 return;
2741
2742 priv->is_open = 0;
2743
2744 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2745 /* stop mac, cancel any scan request and clear
2746 * RXON_FILTER_ASSOC_MSK BIT
2747 */
2748 mutex_lock(&priv->mutex);
2749 iwl_scan_cancel_timeout(priv, 100);
2750 mutex_unlock(&priv->mutex);
2751 }
2752
2753 iwl_down(priv);
2754
2755 flush_workqueue(priv->workqueue);
2756
2757 /* enable interrupts again in order to receive rfkill changes */
2758 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2759 iwl_enable_interrupts(priv);
2760
2761 IWL_DEBUG_MAC80211(priv, "leave\n");
2762 }
2763
2764 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2765 {
2766 struct iwl_priv *priv = hw->priv;
2767
2768 IWL_DEBUG_MACDUMP(priv, "enter\n");
2769
2770 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2771 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2772
2773 if (iwl_tx_skb(priv, skb))
2774 dev_kfree_skb_any(skb);
2775
2776 IWL_DEBUG_MACDUMP(priv, "leave\n");
2777 return NETDEV_TX_OK;
2778 }
2779
2780 void iwl_config_ap(struct iwl_priv *priv)
2781 {
2782 int ret = 0;
2783 unsigned long flags;
2784
2785 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2786 return;
2787
2788 /* The following should be done only at AP bring up */
2789 if (!iwl_is_associated(priv)) {
2790
2791 /* RXON - unassoc (to set timing command) */
2792 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2793 iwlcore_commit_rxon(priv);
2794
2795 /* RXON Timing */
2796 iwl_setup_rxon_timing(priv);
2797 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2798 sizeof(priv->rxon_timing), &priv->rxon_timing);
2799 if (ret)
2800 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2801 "Attempting to continue.\n");
2802
2803 /* AP has all antennas */
2804 priv->chain_noise_data.active_chains =
2805 priv->hw_params.valid_rx_ant;
2806 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2807 if (priv->cfg->ops->hcmd->set_rxon_chain)
2808 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2809
2810 /* FIXME: what should be the assoc_id for AP? */
2811 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2812 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2813 priv->staging_rxon.flags |=
2814 RXON_FLG_SHORT_PREAMBLE_MSK;
2815 else
2816 priv->staging_rxon.flags &=
2817 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2818
2819 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2820 if (priv->assoc_capability &
2821 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2822 priv->staging_rxon.flags |=
2823 RXON_FLG_SHORT_SLOT_MSK;
2824 else
2825 priv->staging_rxon.flags &=
2826 ~RXON_FLG_SHORT_SLOT_MSK;
2827
2828 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2829 priv->staging_rxon.flags &=
2830 ~RXON_FLG_SHORT_SLOT_MSK;
2831 }
2832 /* restore RXON assoc */
2833 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2834 iwlcore_commit_rxon(priv);
2835 iwl_reset_qos(priv);
2836 spin_lock_irqsave(&priv->lock, flags);
2837 iwl_activate_qos(priv, 1);
2838 spin_unlock_irqrestore(&priv->lock, flags);
2839 iwl_add_bcast_station(priv);
2840 }
2841 iwl_send_beacon_cmd(priv);
2842
2843 /* FIXME - we need to add code here to detect a totally new
2844 * configuration, reset the AP, unassoc, rxon timing, assoc,
2845 * clear sta table, add BCAST sta... */
2846 }
2847
2848 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2849 struct ieee80211_vif *vif,
2850 struct ieee80211_key_conf *keyconf,
2851 struct ieee80211_sta *sta,
2852 u32 iv32, u16 *phase1key)
2853 {
2854
2855 struct iwl_priv *priv = hw->priv;
2856 IWL_DEBUG_MAC80211(priv, "enter\n");
2857
2858 iwl_update_tkip_key(priv, keyconf,
2859 sta ? sta->addr : iwl_bcast_addr,
2860 iv32, phase1key);
2861
2862 IWL_DEBUG_MAC80211(priv, "leave\n");
2863 }
2864
2865 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2866 struct ieee80211_vif *vif,
2867 struct ieee80211_sta *sta,
2868 struct ieee80211_key_conf *key)
2869 {
2870 struct iwl_priv *priv = hw->priv;
2871 const u8 *addr;
2872 int ret;
2873 u8 sta_id;
2874 bool is_default_wep_key = false;
2875
2876 IWL_DEBUG_MAC80211(priv, "enter\n");
2877
2878 if (priv->cfg->mod_params->sw_crypto) {
2879 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2880 return -EOPNOTSUPP;
2881 }
2882 addr = sta ? sta->addr : iwl_bcast_addr;
2883 sta_id = iwl_find_station(priv, addr);
2884 if (sta_id == IWL_INVALID_STATION) {
2885 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2886 addr);
2887 return -EINVAL;
2888
2889 }
2890
2891 mutex_lock(&priv->mutex);
2892 iwl_scan_cancel_timeout(priv, 100);
2893 mutex_unlock(&priv->mutex);
2894
2895 /* If we are getting WEP group key and we didn't receive any key mapping
2896 * so far, we are in legacy wep mode (group key only), otherwise we are
2897 * in 1X mode.
2898 * In legacy wep mode, we use another host command to the uCode */
2899 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2900 priv->iw_mode != NL80211_IFTYPE_AP) {
2901 if (cmd == SET_KEY)
2902 is_default_wep_key = !priv->key_mapping_key;
2903 else
2904 is_default_wep_key =
2905 (key->hw_key_idx == HW_KEY_DEFAULT);
2906 }
2907
2908 switch (cmd) {
2909 case SET_KEY:
2910 if (is_default_wep_key)
2911 ret = iwl_set_default_wep_key(priv, key);
2912 else
2913 ret = iwl_set_dynamic_key(priv, key, sta_id);
2914
2915 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2916 break;
2917 case DISABLE_KEY:
2918 if (is_default_wep_key)
2919 ret = iwl_remove_default_wep_key(priv, key);
2920 else
2921 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2922
2923 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2924 break;
2925 default:
2926 ret = -EINVAL;
2927 }
2928
2929 IWL_DEBUG_MAC80211(priv, "leave\n");
2930
2931 return ret;
2932 }
2933
2934 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2935 struct ieee80211_vif *vif,
2936 enum ieee80211_ampdu_mlme_action action,
2937 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2938 {
2939 struct iwl_priv *priv = hw->priv;
2940 int ret;
2941
2942 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2943 sta->addr, tid);
2944
2945 if (!(priv->cfg->sku & IWL_SKU_N))
2946 return -EACCES;
2947
2948 switch (action) {
2949 case IEEE80211_AMPDU_RX_START:
2950 IWL_DEBUG_HT(priv, "start Rx\n");
2951 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2952 case IEEE80211_AMPDU_RX_STOP:
2953 IWL_DEBUG_HT(priv, "stop Rx\n");
2954 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2955 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2956 return 0;
2957 else
2958 return ret;
2959 case IEEE80211_AMPDU_TX_START:
2960 IWL_DEBUG_HT(priv, "start Tx\n");
2961 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2962 case IEEE80211_AMPDU_TX_STOP:
2963 IWL_DEBUG_HT(priv, "stop Tx\n");
2964 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2965 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2966 return 0;
2967 else
2968 return ret;
2969 case IEEE80211_AMPDU_TX_OPERATIONAL:
2970 /* do nothing */
2971 return -EOPNOTSUPP;
2972 default:
2973 IWL_DEBUG_HT(priv, "unknown\n");
2974 return -EINVAL;
2975 break;
2976 }
2977 return 0;
2978 }
2979
2980 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2981 struct ieee80211_low_level_stats *stats)
2982 {
2983 struct iwl_priv *priv = hw->priv;
2984
2985 priv = hw->priv;
2986 IWL_DEBUG_MAC80211(priv, "enter\n");
2987 IWL_DEBUG_MAC80211(priv, "leave\n");
2988
2989 return 0;
2990 }
2991
2992 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2993 struct ieee80211_vif *vif,
2994 enum sta_notify_cmd cmd,
2995 struct ieee80211_sta *sta)
2996 {
2997 struct iwl_priv *priv = hw->priv;
2998 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2999 int sta_id;
3000
3001 /*
3002 * TODO: We really should use this callback to
3003 * actually maintain the station table in
3004 * the device.
3005 */
3006
3007 switch (cmd) {
3008 case STA_NOTIFY_ADD:
3009 atomic_set(&sta_priv->pending_frames, 0);
3010 if (vif->type == NL80211_IFTYPE_AP)
3011 sta_priv->client = true;
3012 break;
3013 case STA_NOTIFY_SLEEP:
3014 WARN_ON(!sta_priv->client);
3015 sta_priv->asleep = true;
3016 if (atomic_read(&sta_priv->pending_frames) > 0)
3017 ieee80211_sta_block_awake(hw, sta, true);
3018 break;
3019 case STA_NOTIFY_AWAKE:
3020 WARN_ON(!sta_priv->client);
3021 if (!sta_priv->asleep)
3022 break;
3023 sta_priv->asleep = false;
3024 sta_id = iwl_find_station(priv, sta->addr);
3025 if (sta_id != IWL_INVALID_STATION)
3026 iwl_sta_modify_ps_wake(priv, sta_id);
3027 break;
3028 default:
3029 break;
3030 }
3031 }
3032
3033 /*****************************************************************************
3034 *
3035 * sysfs attributes
3036 *
3037 *****************************************************************************/
3038
3039 #ifdef CONFIG_IWLWIFI_DEBUG
3040
3041 /*
3042 * The following adds a new attribute to the sysfs representation
3043 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3044 * used for controlling the debug level.
3045 *
3046 * See the level definitions in iwl for details.
3047 *
3048 * The debug_level being managed using sysfs below is a per device debug
3049 * level that is used instead of the global debug level if it (the per
3050 * device debug level) is set.
3051 */
3052 static ssize_t show_debug_level(struct device *d,
3053 struct device_attribute *attr, char *buf)
3054 {
3055 struct iwl_priv *priv = dev_get_drvdata(d);
3056 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3057 }
3058 static ssize_t store_debug_level(struct device *d,
3059 struct device_attribute *attr,
3060 const char *buf, size_t count)
3061 {
3062 struct iwl_priv *priv = dev_get_drvdata(d);
3063 unsigned long val;
3064 int ret;
3065
3066 ret = strict_strtoul(buf, 0, &val);
3067 if (ret)
3068 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3069 else {
3070 priv->debug_level = val;
3071 if (iwl_alloc_traffic_mem(priv))
3072 IWL_ERR(priv,
3073 "Not enough memory to generate traffic log\n");
3074 }
3075 return strnlen(buf, count);
3076 }
3077
3078 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3079 show_debug_level, store_debug_level);
3080
3081
3082 #endif /* CONFIG_IWLWIFI_DEBUG */
3083
3084
3085 static ssize_t show_temperature(struct device *d,
3086 struct device_attribute *attr, char *buf)
3087 {
3088 struct iwl_priv *priv = dev_get_drvdata(d);
3089
3090 if (!iwl_is_alive(priv))
3091 return -EAGAIN;
3092
3093 return sprintf(buf, "%d\n", priv->temperature);
3094 }
3095
3096 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3097
3098 static ssize_t show_tx_power(struct device *d,
3099 struct device_attribute *attr, char *buf)
3100 {
3101 struct iwl_priv *priv = dev_get_drvdata(d);
3102
3103 if (!iwl_is_ready_rf(priv))
3104 return sprintf(buf, "off\n");
3105 else
3106 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3107 }
3108
3109 static ssize_t store_tx_power(struct device *d,
3110 struct device_attribute *attr,
3111 const char *buf, size_t count)
3112 {
3113 struct iwl_priv *priv = dev_get_drvdata(d);
3114 unsigned long val;
3115 int ret;
3116
3117 ret = strict_strtoul(buf, 10, &val);
3118 if (ret)
3119 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3120 else {
3121 ret = iwl_set_tx_power(priv, val, false);
3122 if (ret)
3123 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3124 ret);
3125 else
3126 ret = count;
3127 }
3128 return ret;
3129 }
3130
3131 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3132
3133 static ssize_t show_flags(struct device *d,
3134 struct device_attribute *attr, char *buf)
3135 {
3136 struct iwl_priv *priv = dev_get_drvdata(d);
3137
3138 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3139 }
3140
3141 static ssize_t store_flags(struct device *d,
3142 struct device_attribute *attr,
3143 const char *buf, size_t count)
3144 {
3145 struct iwl_priv *priv = dev_get_drvdata(d);
3146 unsigned long val;
3147 u32 flags;
3148 int ret = strict_strtoul(buf, 0, &val);
3149 if (ret)
3150 return ret;
3151 flags = (u32)val;
3152
3153 mutex_lock(&priv->mutex);
3154 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3155 /* Cancel any currently running scans... */
3156 if (iwl_scan_cancel_timeout(priv, 100))
3157 IWL_WARN(priv, "Could not cancel scan.\n");
3158 else {
3159 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
3160 priv->staging_rxon.flags = cpu_to_le32(flags);
3161 iwlcore_commit_rxon(priv);
3162 }
3163 }
3164 mutex_unlock(&priv->mutex);
3165
3166 return count;
3167 }
3168
3169 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3170
3171 static ssize_t show_filter_flags(struct device *d,
3172 struct device_attribute *attr, char *buf)
3173 {
3174 struct iwl_priv *priv = dev_get_drvdata(d);
3175
3176 return sprintf(buf, "0x%04X\n",
3177 le32_to_cpu(priv->active_rxon.filter_flags));
3178 }
3179
3180 static ssize_t store_filter_flags(struct device *d,
3181 struct device_attribute *attr,
3182 const char *buf, size_t count)
3183 {
3184 struct iwl_priv *priv = dev_get_drvdata(d);
3185 unsigned long val;
3186 u32 filter_flags;
3187 int ret = strict_strtoul(buf, 0, &val);
3188 if (ret)
3189 return ret;
3190 filter_flags = (u32)val;
3191
3192 mutex_lock(&priv->mutex);
3193 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3194 /* Cancel any currently running scans... */
3195 if (iwl_scan_cancel_timeout(priv, 100))
3196 IWL_WARN(priv, "Could not cancel scan.\n");
3197 else {
3198 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3199 "0x%04X\n", filter_flags);
3200 priv->staging_rxon.filter_flags =
3201 cpu_to_le32(filter_flags);
3202 iwlcore_commit_rxon(priv);
3203 }
3204 }
3205 mutex_unlock(&priv->mutex);
3206
3207 return count;
3208 }
3209
3210 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3211 store_filter_flags);
3212
3213
3214 static ssize_t show_statistics(struct device *d,
3215 struct device_attribute *attr, char *buf)
3216 {
3217 struct iwl_priv *priv = dev_get_drvdata(d);
3218 u32 size = sizeof(struct iwl_notif_statistics);
3219 u32 len = 0, ofs = 0;
3220 u8 *data = (u8 *)&priv->statistics;
3221 int rc = 0;
3222
3223 if (!iwl_is_alive(priv))
3224 return -EAGAIN;
3225
3226 mutex_lock(&priv->mutex);
3227 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3228 mutex_unlock(&priv->mutex);
3229
3230 if (rc) {
3231 len = sprintf(buf,
3232 "Error sending statistics request: 0x%08X\n", rc);
3233 return len;
3234 }
3235
3236 while (size && (PAGE_SIZE - len)) {
3237 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3238 PAGE_SIZE - len, 1);
3239 len = strlen(buf);
3240 if (PAGE_SIZE - len)
3241 buf[len++] = '\n';
3242
3243 ofs += 16;
3244 size -= min(size, 16U);
3245 }
3246
3247 return len;
3248 }
3249
3250 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3251
3252 static ssize_t show_rts_ht_protection(struct device *d,
3253 struct device_attribute *attr, char *buf)
3254 {
3255 struct iwl_priv *priv = dev_get_drvdata(d);
3256
3257 return sprintf(buf, "%s\n",
3258 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3259 }
3260
3261 static ssize_t store_rts_ht_protection(struct device *d,
3262 struct device_attribute *attr,
3263 const char *buf, size_t count)
3264 {
3265 struct iwl_priv *priv = dev_get_drvdata(d);
3266 unsigned long val;
3267 int ret;
3268
3269 ret = strict_strtoul(buf, 10, &val);
3270 if (ret)
3271 IWL_INFO(priv, "Input is not in decimal form.\n");
3272 else {
3273 if (!iwl_is_associated(priv))
3274 priv->cfg->use_rts_for_ht = val ? true : false;
3275 else
3276 IWL_ERR(priv, "Sta associated with AP - "
3277 "Change protection mechanism is not allowed\n");
3278 ret = count;
3279 }
3280 return ret;
3281 }
3282
3283 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3284 show_rts_ht_protection, store_rts_ht_protection);
3285
3286
3287 /*****************************************************************************
3288 *
3289 * driver setup and teardown
3290 *
3291 *****************************************************************************/
3292
3293 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3294 {
3295 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3296
3297 init_waitqueue_head(&priv->wait_command_queue);
3298
3299 INIT_WORK(&priv->restart, iwl_bg_restart);
3300 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3301 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3302 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3303 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3304 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3305
3306 iwl_setup_scan_deferred_work(priv);
3307
3308 if (priv->cfg->ops->lib->setup_deferred_work)
3309 priv->cfg->ops->lib->setup_deferred_work(priv);
3310
3311 init_timer(&priv->statistics_periodic);
3312 priv->statistics_periodic.data = (unsigned long)priv;
3313 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3314
3315 init_timer(&priv->ucode_trace);
3316 priv->ucode_trace.data = (unsigned long)priv;
3317 priv->ucode_trace.function = iwl_bg_ucode_trace;
3318
3319 if (!priv->cfg->use_isr_legacy)
3320 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3321 iwl_irq_tasklet, (unsigned long)priv);
3322 else
3323 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3324 iwl_irq_tasklet_legacy, (unsigned long)priv);
3325 }
3326
3327 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3328 {
3329 if (priv->cfg->ops->lib->cancel_deferred_work)
3330 priv->cfg->ops->lib->cancel_deferred_work(priv);
3331
3332 cancel_delayed_work_sync(&priv->init_alive_start);
3333 cancel_delayed_work(&priv->scan_check);
3334 cancel_work_sync(&priv->start_internal_scan);
3335 cancel_delayed_work(&priv->alive_start);
3336 cancel_work_sync(&priv->beacon_update);
3337 del_timer_sync(&priv->statistics_periodic);
3338 del_timer_sync(&priv->ucode_trace);
3339 }
3340
3341 static void iwl_init_hw_rates(struct iwl_priv *priv,
3342 struct ieee80211_rate *rates)
3343 {
3344 int i;
3345
3346 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3347 rates[i].bitrate = iwl_rates[i].ieee * 5;
3348 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3349 rates[i].hw_value_short = i;
3350 rates[i].flags = 0;
3351 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3352 /*
3353 * If CCK != 1M then set short preamble rate flag.
3354 */
3355 rates[i].flags |=
3356 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3357 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3358 }
3359 }
3360 }
3361
3362 static int iwl_init_drv(struct iwl_priv *priv)
3363 {
3364 int ret;
3365
3366 priv->ibss_beacon = NULL;
3367
3368 spin_lock_init(&priv->sta_lock);
3369 spin_lock_init(&priv->hcmd_lock);
3370
3371 INIT_LIST_HEAD(&priv->free_frames);
3372
3373 mutex_init(&priv->mutex);
3374 mutex_init(&priv->sync_cmd_mutex);
3375
3376 /* Clear the driver's (not device's) station table */
3377 iwl_clear_stations_table(priv);
3378
3379 priv->ieee_channels = NULL;
3380 priv->ieee_rates = NULL;
3381 priv->band = IEEE80211_BAND_2GHZ;
3382
3383 priv->iw_mode = NL80211_IFTYPE_STATION;
3384 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3385 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3386
3387 /* initialize force reset */
3388 priv->force_reset[IWL_RF_RESET].reset_duration =
3389 IWL_DELAY_NEXT_FORCE_RF_RESET;
3390 priv->force_reset[IWL_FW_RESET].reset_duration =
3391 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3392
3393 /* Choose which receivers/antennas to use */
3394 if (priv->cfg->ops->hcmd->set_rxon_chain)
3395 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3396
3397 iwl_init_scan_params(priv);
3398
3399 iwl_reset_qos(priv);
3400
3401 priv->qos_data.qos_active = 0;
3402 priv->qos_data.qos_cap.val = 0;
3403
3404 priv->rates_mask = IWL_RATES_MASK;
3405 /* Set the tx_power_user_lmt to the lowest power level
3406 * this value will get overwritten by channel max power avg
3407 * from eeprom */
3408 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3409
3410 ret = iwl_init_channel_map(priv);
3411 if (ret) {
3412 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3413 goto err;
3414 }
3415
3416 ret = iwlcore_init_geos(priv);
3417 if (ret) {
3418 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3419 goto err_free_channel_map;
3420 }
3421 iwl_init_hw_rates(priv, priv->ieee_rates);
3422
3423 return 0;
3424
3425 err_free_channel_map:
3426 iwl_free_channel_map(priv);
3427 err:
3428 return ret;
3429 }
3430
3431 static void iwl_uninit_drv(struct iwl_priv *priv)
3432 {
3433 iwl_calib_free_results(priv);
3434 iwlcore_free_geos(priv);
3435 iwl_free_channel_map(priv);
3436 kfree(priv->scan);
3437 }
3438
3439 static struct attribute *iwl_sysfs_entries[] = {
3440 &dev_attr_flags.attr,
3441 &dev_attr_filter_flags.attr,
3442 &dev_attr_statistics.attr,
3443 &dev_attr_temperature.attr,
3444 &dev_attr_tx_power.attr,
3445 &dev_attr_rts_ht_protection.attr,
3446 #ifdef CONFIG_IWLWIFI_DEBUG
3447 &dev_attr_debug_level.attr,
3448 #endif
3449 NULL
3450 };
3451
3452 static struct attribute_group iwl_attribute_group = {
3453 .name = NULL, /* put in device directory */
3454 .attrs = iwl_sysfs_entries,
3455 };
3456
3457 static struct ieee80211_ops iwl_hw_ops = {
3458 .tx = iwl_mac_tx,
3459 .start = iwl_mac_start,
3460 .stop = iwl_mac_stop,
3461 .add_interface = iwl_mac_add_interface,
3462 .remove_interface = iwl_mac_remove_interface,
3463 .config = iwl_mac_config,
3464 .configure_filter = iwl_configure_filter,
3465 .set_key = iwl_mac_set_key,
3466 .update_tkip_key = iwl_mac_update_tkip_key,
3467 .get_stats = iwl_mac_get_stats,
3468 .conf_tx = iwl_mac_conf_tx,
3469 .reset_tsf = iwl_mac_reset_tsf,
3470 .bss_info_changed = iwl_bss_info_changed,
3471 .ampdu_action = iwl_mac_ampdu_action,
3472 .hw_scan = iwl_mac_hw_scan,
3473 .sta_notify = iwl_mac_sta_notify,
3474 };
3475
3476 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3477 {
3478 int err = 0;
3479 struct iwl_priv *priv;
3480 struct ieee80211_hw *hw;
3481 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3482 unsigned long flags;
3483 u16 pci_cmd;
3484
3485 /************************
3486 * 1. Allocating HW data
3487 ************************/
3488
3489 /* Disabling hardware scan means that mac80211 will perform scans
3490 * "the hard way", rather than using device's scan. */
3491 if (cfg->mod_params->disable_hw_scan) {
3492 if (iwl_debug_level & IWL_DL_INFO)
3493 dev_printk(KERN_DEBUG, &(pdev->dev),
3494 "Disabling hw_scan\n");
3495 iwl_hw_ops.hw_scan = NULL;
3496 }
3497
3498 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3499 if (!hw) {
3500 err = -ENOMEM;
3501 goto out;
3502 }
3503 priv = hw->priv;
3504 /* At this point both hw and priv are allocated. */
3505
3506 SET_IEEE80211_DEV(hw, &pdev->dev);
3507
3508 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3509 priv->cfg = cfg;
3510 priv->pci_dev = pdev;
3511 priv->inta_mask = CSR_INI_SET_MASK;
3512
3513 #ifdef CONFIG_IWLWIFI_DEBUG
3514 atomic_set(&priv->restrict_refcnt, 0);
3515 #endif
3516 if (iwl_alloc_traffic_mem(priv))
3517 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3518
3519 /**************************
3520 * 2. Initializing PCI bus
3521 **************************/
3522 if (pci_enable_device(pdev)) {
3523 err = -ENODEV;
3524 goto out_ieee80211_free_hw;
3525 }
3526
3527 pci_set_master(pdev);
3528
3529 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3530 if (!err)
3531 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3532 if (err) {
3533 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3534 if (!err)
3535 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3536 /* both attempts failed: */
3537 if (err) {
3538 IWL_WARN(priv, "No suitable DMA available.\n");
3539 goto out_pci_disable_device;
3540 }
3541 }
3542
3543 err = pci_request_regions(pdev, DRV_NAME);
3544 if (err)
3545 goto out_pci_disable_device;
3546
3547 pci_set_drvdata(pdev, priv);
3548
3549
3550 /***********************
3551 * 3. Read REV register
3552 ***********************/
3553 priv->hw_base = pci_iomap(pdev, 0, 0);
3554 if (!priv->hw_base) {
3555 err = -ENODEV;
3556 goto out_pci_release_regions;
3557 }
3558
3559 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3560 (unsigned long long) pci_resource_len(pdev, 0));
3561 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3562
3563 /* these spin locks will be used in apm_ops.init and EEPROM access
3564 * we should init now
3565 */
3566 spin_lock_init(&priv->reg_lock);
3567 spin_lock_init(&priv->lock);
3568
3569 /*
3570 * stop and reset the on-board processor just in case it is in a
3571 * strange state ... like being left stranded by a primary kernel
3572 * and this is now the kdump kernel trying to start up
3573 */
3574 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3575
3576 iwl_hw_detect(priv);
3577 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3578 priv->cfg->name, priv->hw_rev);
3579
3580 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3581 * PCI Tx retries from interfering with C3 CPU state */
3582 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3583
3584 iwl_prepare_card_hw(priv);
3585 if (!priv->hw_ready) {
3586 IWL_WARN(priv, "Failed, HW not ready\n");
3587 goto out_iounmap;
3588 }
3589
3590 /*****************
3591 * 4. Read EEPROM
3592 *****************/
3593 /* Read the EEPROM */
3594 err = iwl_eeprom_init(priv);
3595 if (err) {
3596 IWL_ERR(priv, "Unable to init EEPROM\n");
3597 goto out_iounmap;
3598 }
3599 err = iwl_eeprom_check_version(priv);
3600 if (err)
3601 goto out_free_eeprom;
3602
3603 /* extract MAC Address */
3604 iwl_eeprom_get_mac(priv, priv->mac_addr);
3605 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3606 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3607
3608 /************************
3609 * 5. Setup HW constants
3610 ************************/
3611 if (iwl_set_hw_params(priv)) {
3612 IWL_ERR(priv, "failed to set hw parameters\n");
3613 goto out_free_eeprom;
3614 }
3615
3616 /*******************
3617 * 6. Setup priv
3618 *******************/
3619
3620 err = iwl_init_drv(priv);
3621 if (err)
3622 goto out_free_eeprom;
3623 /* At this point both hw and priv are initialized. */
3624
3625 /********************
3626 * 7. Setup services
3627 ********************/
3628 spin_lock_irqsave(&priv->lock, flags);
3629 iwl_disable_interrupts(priv);
3630 spin_unlock_irqrestore(&priv->lock, flags);
3631
3632 pci_enable_msi(priv->pci_dev);
3633
3634 iwl_alloc_isr_ict(priv);
3635 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3636 IRQF_SHARED, DRV_NAME, priv);
3637 if (err) {
3638 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3639 goto out_disable_msi;
3640 }
3641 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3642 if (err) {
3643 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3644 goto out_free_irq;
3645 }
3646
3647 iwl_setup_deferred_work(priv);
3648 iwl_setup_rx_handlers(priv);
3649
3650 /*********************************************
3651 * 8. Enable interrupts and read RFKILL state
3652 *********************************************/
3653
3654 /* enable interrupts if needed: hw bug w/a */
3655 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3656 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3657 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3658 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3659 }
3660
3661 iwl_enable_interrupts(priv);
3662
3663 /* If platform's RF_KILL switch is NOT set to KILL */
3664 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3665 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3666 else
3667 set_bit(STATUS_RF_KILL_HW, &priv->status);
3668
3669 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3670 test_bit(STATUS_RF_KILL_HW, &priv->status));
3671
3672 iwl_power_initialize(priv);
3673 iwl_tt_initialize(priv);
3674
3675 err = iwl_request_firmware(priv, true);
3676 if (err)
3677 goto out_remove_sysfs;
3678
3679 return 0;
3680
3681 out_remove_sysfs:
3682 destroy_workqueue(priv->workqueue);
3683 priv->workqueue = NULL;
3684 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3685 out_free_irq:
3686 free_irq(priv->pci_dev->irq, priv);
3687 iwl_free_isr_ict(priv);
3688 out_disable_msi:
3689 pci_disable_msi(priv->pci_dev);
3690 iwl_uninit_drv(priv);
3691 out_free_eeprom:
3692 iwl_eeprom_free(priv);
3693 out_iounmap:
3694 pci_iounmap(pdev, priv->hw_base);
3695 out_pci_release_regions:
3696 pci_set_drvdata(pdev, NULL);
3697 pci_release_regions(pdev);
3698 out_pci_disable_device:
3699 pci_disable_device(pdev);
3700 out_ieee80211_free_hw:
3701 iwl_free_traffic_mem(priv);
3702 ieee80211_free_hw(priv->hw);
3703 out:
3704 return err;
3705 }
3706
3707 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3708 {
3709 struct iwl_priv *priv = pci_get_drvdata(pdev);
3710 unsigned long flags;
3711
3712 if (!priv)
3713 return;
3714
3715 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3716
3717 iwl_dbgfs_unregister(priv);
3718 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3719
3720 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3721 * to be called and iwl_down since we are removing the device
3722 * we need to set STATUS_EXIT_PENDING bit.
3723 */
3724 set_bit(STATUS_EXIT_PENDING, &priv->status);
3725 if (priv->mac80211_registered) {
3726 ieee80211_unregister_hw(priv->hw);
3727 priv->mac80211_registered = 0;
3728 } else {
3729 iwl_down(priv);
3730 }
3731
3732 /*
3733 * Make sure device is reset to low power before unloading driver.
3734 * This may be redundant with iwl_down(), but there are paths to
3735 * run iwl_down() without calling apm_ops.stop(), and there are
3736 * paths to avoid running iwl_down() at all before leaving driver.
3737 * This (inexpensive) call *makes sure* device is reset.
3738 */
3739 priv->cfg->ops->lib->apm_ops.stop(priv);
3740
3741 iwl_tt_exit(priv);
3742
3743 /* make sure we flush any pending irq or
3744 * tasklet for the driver
3745 */
3746 spin_lock_irqsave(&priv->lock, flags);
3747 iwl_disable_interrupts(priv);
3748 spin_unlock_irqrestore(&priv->lock, flags);
3749
3750 iwl_synchronize_irq(priv);
3751
3752 iwl_dealloc_ucode_pci(priv);
3753
3754 if (priv->rxq.bd)
3755 iwl_rx_queue_free(priv, &priv->rxq);
3756 iwl_hw_txq_ctx_free(priv);
3757
3758 iwl_clear_stations_table(priv);
3759 iwl_eeprom_free(priv);
3760
3761
3762 /*netif_stop_queue(dev); */
3763 flush_workqueue(priv->workqueue);
3764
3765 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3766 * priv->workqueue... so we can't take down the workqueue
3767 * until now... */
3768 destroy_workqueue(priv->workqueue);
3769 priv->workqueue = NULL;
3770 iwl_free_traffic_mem(priv);
3771
3772 free_irq(priv->pci_dev->irq, priv);
3773 pci_disable_msi(priv->pci_dev);
3774 pci_iounmap(pdev, priv->hw_base);
3775 pci_release_regions(pdev);
3776 pci_disable_device(pdev);
3777 pci_set_drvdata(pdev, NULL);
3778
3779 iwl_uninit_drv(priv);
3780
3781 iwl_free_isr_ict(priv);
3782
3783 if (priv->ibss_beacon)
3784 dev_kfree_skb(priv->ibss_beacon);
3785
3786 ieee80211_free_hw(priv->hw);
3787 }
3788
3789
3790 /*****************************************************************************
3791 *
3792 * driver and module entry point
3793 *
3794 *****************************************************************************/
3795
3796 /* Hardware specific file defines the PCI IDs table for that hardware module */
3797 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3798 #ifdef CONFIG_IWL4965
3799 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3800 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3801 #endif /* CONFIG_IWL4965 */
3802 #ifdef CONFIG_IWL5000
3803 /* 5100 Series WiFi */
3804 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3805 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3806 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3807 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3808 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3809 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3810 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3811 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3812 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3813 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3814 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3815 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3816 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3817 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3818 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3819 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3820 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3821 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3822 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3823 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3824 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3825 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3826 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3827 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3828
3829 /* 5300 Series WiFi */
3830 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3831 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3832 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3833 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3834 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3835 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3836 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3837 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3838 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3839 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3840 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3841 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3842
3843 /* 5350 Series WiFi/WiMax */
3844 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3845 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3846 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3847
3848 /* 5150 Series Wifi/WiMax */
3849 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3850 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3851 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3852 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3853 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3854 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3855
3856 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3857 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3858 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3859 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3860
3861 /* 6x00 Series */
3862 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3863 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3864 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3865 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3866 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3867 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3868 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3869 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3870 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3871 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3872
3873 /* 6x50 WiFi/WiMax Series */
3874 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3875 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3876 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3877 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3878 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3879 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3880
3881 /* 1000 Series WiFi */
3882 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3883 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3884 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3885 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3886 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3887 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3888 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3889 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3890 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3891 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3892 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3893 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3894 #endif /* CONFIG_IWL5000 */
3895
3896 {0}
3897 };
3898 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3899
3900 static struct pci_driver iwl_driver = {
3901 .name = DRV_NAME,
3902 .id_table = iwl_hw_card_ids,
3903 .probe = iwl_pci_probe,
3904 .remove = __devexit_p(iwl_pci_remove),
3905 #ifdef CONFIG_PM
3906 .suspend = iwl_pci_suspend,
3907 .resume = iwl_pci_resume,
3908 #endif
3909 };
3910
3911 static int __init iwl_init(void)
3912 {
3913
3914 int ret;
3915 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3916 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3917
3918 ret = iwlagn_rate_control_register();
3919 if (ret) {
3920 printk(KERN_ERR DRV_NAME
3921 "Unable to register rate control algorithm: %d\n", ret);
3922 return ret;
3923 }
3924
3925 ret = pci_register_driver(&iwl_driver);
3926 if (ret) {
3927 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3928 goto error_register;
3929 }
3930
3931 return ret;
3932
3933 error_register:
3934 iwlagn_rate_control_unregister();
3935 return ret;
3936 }
3937
3938 static void __exit iwl_exit(void)
3939 {
3940 pci_unregister_driver(&iwl_driver);
3941 iwlagn_rate_control_unregister();
3942 }
3943
3944 module_exit(iwl_exit);
3945 module_init(iwl_init);
3946
3947 #ifdef CONFIG_IWLWIFI_DEBUG
3948 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3949 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3950 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3951 MODULE_PARM_DESC(debug, "debug output mask");
3952 #endif
3953
Linux with added FPC-III support