1 /******************************************************************************
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
23 * Contact Information:
24 * Intel Linux Wireless <ilw@linux.intel.com>
25 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
35 #include "iwl-debug.h"
36 #include "iwl-devtrace.h"
39 * IO, register, and NIC memory access functions
41 * NOTE on naming convention and macro usage for these
43 * A single _ prefix before a an access function means that no state
44 * check or debug information is printed when that function is called.
46 * A double __ prefix before an access function means that state is checked
47 * and the current line number and caller function name are printed in addition
48 * to any other debug output.
50 * The non-prefixed name is the #define that maps the caller into a
51 * #define that provides the caller's name and __LINE__ to the double
54 * If you wish to call the function without any debug or state checking,
55 * you should use the single _ prefix version (as is used by dependent IO
56 * routines, for example _iwl_read_direct32 calls the non-check version of
59 * These declarations are *extremely* useful in quickly isolating code deltas
60 * which result in misconfiguration of the hardware I/O. In combination with
61 * git-bisect and the IO debug level you can quickly determine the specific
62 * commit which breaks the IO sequence to the hardware.
66 static inline void _iwl_write8(struct iwl_priv
*priv
, u32 ofs
, u8 val
)
68 trace_iwlwifi_dev_iowrite8(priv
, ofs
, val
);
69 iowrite8(val
, priv
->hw_base
+ ofs
);
72 #ifdef CONFIG_IWLWIFI_DEBUG
73 static inline void __iwl_write8(const char *f
, u32 l
, struct iwl_priv
*priv
,
76 IWL_DEBUG_IO(priv
, "write8(0x%08X, 0x%02X) - %s %d\n", ofs
, val
, f
, l
);
77 _iwl_write8(priv
, ofs
, val
);
79 #define iwl_write8(priv, ofs, val) \
80 __iwl_write8(__FILE__, __LINE__, priv, ofs, val)
82 #define iwl_write8(priv, ofs, val) _iwl_write8(priv, ofs, val)
86 static inline void _iwl_write32(struct iwl_priv
*priv
, u32 ofs
, u32 val
)
88 trace_iwlwifi_dev_iowrite32(priv
, ofs
, val
);
89 iowrite32(val
, priv
->hw_base
+ ofs
);
92 #ifdef CONFIG_IWLWIFI_DEBUG
93 static inline void __iwl_write32(const char *f
, u32 l
, struct iwl_priv
*priv
,
96 IWL_DEBUG_IO(priv
, "write32(0x%08X, 0x%08X) - %s %d\n", ofs
, val
, f
, l
);
97 _iwl_write32(priv
, ofs
, val
);
99 #define iwl_write32(priv, ofs, val) \
100 __iwl_write32(__FILE__, __LINE__, priv, ofs, val)
102 #define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val)
105 static inline u32
_iwl_read32(struct iwl_priv
*priv
, u32 ofs
)
107 u32 val
= ioread32(priv
->hw_base
+ ofs
);
108 trace_iwlwifi_dev_ioread32(priv
, ofs
, val
);
112 #ifdef CONFIG_IWLWIFI_DEBUG
113 static inline u32
__iwl_read32(char *f
, u32 l
, struct iwl_priv
*priv
, u32 ofs
)
115 IWL_DEBUG_IO(priv
, "read_direct32(0x%08X) - %s %d\n", ofs
, f
, l
);
116 return _iwl_read32(priv
, ofs
);
118 #define iwl_read32(priv, ofs) __iwl_read32(__FILE__, __LINE__, priv, ofs)
120 #define iwl_read32(p, o) _iwl_read32(p, o)
123 #define IWL_POLL_INTERVAL 10 /* microseconds */
124 static inline int _iwl_poll_bit(struct iwl_priv
*priv
, u32 addr
,
125 u32 bits
, u32 mask
, int timeout
)
130 if ((_iwl_read32(priv
, addr
) & mask
) == (bits
& mask
))
132 udelay(IWL_POLL_INTERVAL
);
133 t
+= IWL_POLL_INTERVAL
;
134 } while (t
< timeout
);
138 #ifdef CONFIG_IWLWIFI_DEBUG
139 static inline int __iwl_poll_bit(const char *f
, u32 l
,
140 struct iwl_priv
*priv
, u32 addr
,
141 u32 bits
, u32 mask
, int timeout
)
143 int ret
= _iwl_poll_bit(priv
, addr
, bits
, mask
, timeout
);
144 IWL_DEBUG_IO(priv
, "poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n",
146 unlikely(ret
== -ETIMEDOUT
) ? "timeout" : "", f
, l
);
149 #define iwl_poll_bit(priv, addr, bits, mask, timeout) \
150 __iwl_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout)
152 #define iwl_poll_bit(p, a, b, m, t) _iwl_poll_bit(p, a, b, m, t)
155 static inline void _iwl_set_bit(struct iwl_priv
*priv
, u32 reg
, u32 mask
)
157 _iwl_write32(priv
, reg
, _iwl_read32(priv
, reg
) | mask
);
159 #ifdef CONFIG_IWLWIFI_DEBUG
160 static inline void __iwl_set_bit(const char *f
, u32 l
,
161 struct iwl_priv
*priv
, u32 reg
, u32 mask
)
163 u32 val
= _iwl_read32(priv
, reg
) | mask
;
164 IWL_DEBUG_IO(priv
, "set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg
, mask
, val
);
165 _iwl_write32(priv
, reg
, val
);
167 static inline void iwl_set_bit(struct iwl_priv
*p
, u32 r
, u32 m
)
169 unsigned long reg_flags
;
171 spin_lock_irqsave(&p
->reg_lock
, reg_flags
);
172 __iwl_set_bit(__FILE__
, __LINE__
, p
, r
, m
);
173 spin_unlock_irqrestore(&p
->reg_lock
, reg_flags
);
176 static inline void iwl_set_bit(struct iwl_priv
*p
, u32 r
, u32 m
)
178 unsigned long reg_flags
;
180 spin_lock_irqsave(&p
->reg_lock
, reg_flags
);
181 _iwl_set_bit(p
, r
, m
);
182 spin_unlock_irqrestore(&p
->reg_lock
, reg_flags
);
186 static inline void _iwl_clear_bit(struct iwl_priv
*priv
, u32 reg
, u32 mask
)
188 _iwl_write32(priv
, reg
, _iwl_read32(priv
, reg
) & ~mask
);
190 #ifdef CONFIG_IWLWIFI_DEBUG
191 static inline void __iwl_clear_bit(const char *f
, u32 l
,
192 struct iwl_priv
*priv
, u32 reg
, u32 mask
)
194 u32 val
= _iwl_read32(priv
, reg
) & ~mask
;
195 IWL_DEBUG_IO(priv
, "clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg
, mask
, val
);
196 _iwl_write32(priv
, reg
, val
);
198 static inline void iwl_clear_bit(struct iwl_priv
*p
, u32 r
, u32 m
)
200 unsigned long reg_flags
;
202 spin_lock_irqsave(&p
->reg_lock
, reg_flags
);
203 __iwl_clear_bit(__FILE__
, __LINE__
, p
, r
, m
);
204 spin_unlock_irqrestore(&p
->reg_lock
, reg_flags
);
207 static inline void iwl_clear_bit(struct iwl_priv
*p
, u32 r
, u32 m
)
209 unsigned long reg_flags
;
211 spin_lock_irqsave(&p
->reg_lock
, reg_flags
);
212 _iwl_clear_bit(p
, r
, m
);
213 spin_unlock_irqrestore(&p
->reg_lock
, reg_flags
);
217 static inline int _iwl_grab_nic_access(struct iwl_priv
*priv
)
222 /* this bit wakes up the NIC */
223 _iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
);
226 * These bits say the device is running, and should keep running for
227 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
228 * but they do not indicate that embedded SRAM is restored yet;
229 * 3945 and 4965 have volatile SRAM, and must save/restore contents
230 * to/from host DRAM when sleeping/waking for power-saving.
231 * Each direction takes approximately 1/4 millisecond; with this
232 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
233 * series of register accesses are expected (e.g. reading Event Log),
234 * to keep device from sleeping.
236 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
237 * SRAM is okay/restored. We don't check that here because this call
238 * is just for hardware register access; but GP1 MAC_SLEEP check is a
239 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
241 * 5000 series and later (including 1000 series) have non-volatile SRAM,
242 * and do not save/restore SRAM when power cycling.
244 ret
= _iwl_poll_bit(priv
, CSR_GP_CNTRL
,
245 CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN
,
246 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
|
247 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP
), 15000);
249 val
= _iwl_read32(priv
, CSR_GP_CNTRL
);
250 IWL_ERR(priv
, "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val
);
251 _iwl_write32(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_FORCE_NMI
);
258 #ifdef CONFIG_IWLWIFI_DEBUG
259 static inline int __iwl_grab_nic_access(const char *f
, u32 l
,
260 struct iwl_priv
*priv
)
262 IWL_DEBUG_IO(priv
, "grabbing nic access - %s %d\n", f
, l
);
263 return _iwl_grab_nic_access(priv
);
265 #define iwl_grab_nic_access(priv) \
266 __iwl_grab_nic_access(__FILE__, __LINE__, priv)
268 #define iwl_grab_nic_access(priv) \
269 _iwl_grab_nic_access(priv)
272 static inline void _iwl_release_nic_access(struct iwl_priv
*priv
)
274 _iwl_clear_bit(priv
, CSR_GP_CNTRL
,
275 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
);
277 #ifdef CONFIG_IWLWIFI_DEBUG
278 static inline void __iwl_release_nic_access(const char *f
, u32 l
,
279 struct iwl_priv
*priv
)
282 IWL_DEBUG_IO(priv
, "releasing nic access - %s %d\n", f
, l
);
283 _iwl_release_nic_access(priv
);
285 #define iwl_release_nic_access(priv) \
286 __iwl_release_nic_access(__FILE__, __LINE__, priv)
288 #define iwl_release_nic_access(priv) \
289 _iwl_release_nic_access(priv)
292 static inline u32
_iwl_read_direct32(struct iwl_priv
*priv
, u32 reg
)
294 return _iwl_read32(priv
, reg
);
296 #ifdef CONFIG_IWLWIFI_DEBUG
297 static inline u32
__iwl_read_direct32(const char *f
, u32 l
,
298 struct iwl_priv
*priv
, u32 reg
)
300 u32 value
= _iwl_read_direct32(priv
, reg
);
301 IWL_DEBUG_IO(priv
, "read_direct32(0x%4X) = 0x%08x - %s %d \n", reg
, value
,
305 static inline u32
iwl_read_direct32(struct iwl_priv
*priv
, u32 reg
)
308 unsigned long reg_flags
;
310 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
311 iwl_grab_nic_access(priv
);
312 value
= __iwl_read_direct32(__FILE__
, __LINE__
, priv
, reg
);
313 iwl_release_nic_access(priv
);
314 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
319 static inline u32
iwl_read_direct32(struct iwl_priv
*priv
, u32 reg
)
322 unsigned long reg_flags
;
324 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
325 iwl_grab_nic_access(priv
);
326 value
= _iwl_read_direct32(priv
, reg
);
327 iwl_release_nic_access(priv
);
328 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
334 static inline void _iwl_write_direct32(struct iwl_priv
*priv
,
337 _iwl_write32(priv
, reg
, value
);
339 static inline void iwl_write_direct32(struct iwl_priv
*priv
, u32 reg
, u32 value
)
341 unsigned long reg_flags
;
343 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
344 if (!iwl_grab_nic_access(priv
)) {
345 _iwl_write_direct32(priv
, reg
, value
);
346 iwl_release_nic_access(priv
);
348 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
351 static inline void iwl_write_reg_buf(struct iwl_priv
*priv
,
352 u32 reg
, u32 len
, u32
*values
)
354 u32 count
= sizeof(u32
);
356 if ((priv
!= NULL
) && (values
!= NULL
)) {
357 for (; 0 < len
; len
-= count
, reg
+= count
, values
++)
358 iwl_write_direct32(priv
, reg
, *values
);
362 static inline int _iwl_poll_direct_bit(struct iwl_priv
*priv
, u32 addr
,
363 u32 mask
, int timeout
)
368 if ((iwl_read_direct32(priv
, addr
) & mask
) == mask
)
370 udelay(IWL_POLL_INTERVAL
);
371 t
+= IWL_POLL_INTERVAL
;
372 } while (t
< timeout
);
377 #ifdef CONFIG_IWLWIFI_DEBUG
378 static inline int __iwl_poll_direct_bit(const char *f
, u32 l
,
379 struct iwl_priv
*priv
,
380 u32 addr
, u32 mask
, int timeout
)
382 int ret
= _iwl_poll_direct_bit(priv
, addr
, mask
, timeout
);
384 if (unlikely(ret
== -ETIMEDOUT
))
385 IWL_DEBUG_IO(priv
, "poll_direct_bit(0x%08X, 0x%08X) - "
386 "timedout - %s %d\n", addr
, mask
, f
, l
);
388 IWL_DEBUG_IO(priv
, "poll_direct_bit(0x%08X, 0x%08X) = 0x%08X "
389 "- %s %d\n", addr
, mask
, ret
, f
, l
);
392 #define iwl_poll_direct_bit(priv, addr, mask, timeout) \
393 __iwl_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout)
395 #define iwl_poll_direct_bit _iwl_poll_direct_bit
398 static inline u32
_iwl_read_prph(struct iwl_priv
*priv
, u32 reg
)
400 _iwl_write_direct32(priv
, HBUS_TARG_PRPH_RADDR
, reg
| (3 << 24));
402 return _iwl_read_direct32(priv
, HBUS_TARG_PRPH_RDAT
);
404 static inline u32
iwl_read_prph(struct iwl_priv
*priv
, u32 reg
)
406 unsigned long reg_flags
;
409 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
410 iwl_grab_nic_access(priv
);
411 val
= _iwl_read_prph(priv
, reg
);
412 iwl_release_nic_access(priv
);
413 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
417 static inline void _iwl_write_prph(struct iwl_priv
*priv
,
420 _iwl_write_direct32(priv
, HBUS_TARG_PRPH_WADDR
,
421 ((addr
& 0x0000FFFF) | (3 << 24)));
423 _iwl_write_direct32(priv
, HBUS_TARG_PRPH_WDAT
, val
);
426 static inline void iwl_write_prph(struct iwl_priv
*priv
, u32 addr
, u32 val
)
428 unsigned long reg_flags
;
430 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
431 if (!iwl_grab_nic_access(priv
)) {
432 _iwl_write_prph(priv
, addr
, val
);
433 iwl_release_nic_access(priv
);
435 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
438 #define _iwl_set_bits_prph(priv, reg, mask) \
439 _iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask))
441 static inline void iwl_set_bits_prph(struct iwl_priv
*priv
, u32 reg
, u32 mask
)
443 unsigned long reg_flags
;
445 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
446 iwl_grab_nic_access(priv
);
447 _iwl_set_bits_prph(priv
, reg
, mask
);
448 iwl_release_nic_access(priv
);
449 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
452 #define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \
453 _iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits))
455 static inline void iwl_set_bits_mask_prph(struct iwl_priv
*priv
, u32 reg
,
458 unsigned long reg_flags
;
460 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
461 iwl_grab_nic_access(priv
);
462 _iwl_set_bits_mask_prph(priv
, reg
, bits
, mask
);
463 iwl_release_nic_access(priv
);
464 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
467 static inline void iwl_clear_bits_prph(struct iwl_priv
468 *priv
, u32 reg
, u32 mask
)
470 unsigned long reg_flags
;
473 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
474 iwl_grab_nic_access(priv
);
475 val
= _iwl_read_prph(priv
, reg
);
476 _iwl_write_prph(priv
, reg
, (val
& ~mask
));
477 iwl_release_nic_access(priv
);
478 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
481 static inline u32
iwl_read_targ_mem(struct iwl_priv
*priv
, u32 addr
)
483 unsigned long reg_flags
;
486 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
487 iwl_grab_nic_access(priv
);
489 _iwl_write_direct32(priv
, HBUS_TARG_MEM_RADDR
, addr
);
491 value
= _iwl_read_direct32(priv
, HBUS_TARG_MEM_RDAT
);
493 iwl_release_nic_access(priv
);
494 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
498 static inline void iwl_write_targ_mem(struct iwl_priv
*priv
, u32 addr
, u32 val
)
500 unsigned long reg_flags
;
502 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
503 if (!iwl_grab_nic_access(priv
)) {
504 _iwl_write_direct32(priv
, HBUS_TARG_MEM_WADDR
, addr
);
506 _iwl_write_direct32(priv
, HBUS_TARG_MEM_WDAT
, val
);
507 iwl_release_nic_access(priv
);
509 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
512 static inline void iwl_write_targ_mem_buf(struct iwl_priv
*priv
, u32 addr
,
513 u32 len
, u32
*values
)
515 unsigned long reg_flags
;
517 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
518 if (!iwl_grab_nic_access(priv
)) {
519 _iwl_write_direct32(priv
, HBUS_TARG_MEM_WADDR
, addr
);
521 for (; 0 < len
; len
-= sizeof(u32
), values
++)
522 _iwl_write_direct32(priv
, HBUS_TARG_MEM_WDAT
, *values
);
524 iwl_release_nic_access(priv
);
526 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);