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Staging: netwave: delete the driver
[linux/fpc-iii.git] / drivers / net / wireless / mwl8k.c
blob12fdcb25fd382dfc245aafd85dcb462ebdfa8f77
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <linux/slab.h>
23 #include <net/mac80211.h>
24 #include <linux/moduleparam.h>
25 #include <linux/firmware.h>
26 #include <linux/workqueue.h>
27
28 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29 #define MWL8K_NAME KBUILD_MODNAME
30 #define MWL8K_VERSION "0.12"
31
32 /* Register definitions */
33 #define MWL8K_HIU_GEN_PTR 0x00000c10
34 #define MWL8K_MODE_STA 0x0000005a
35 #define MWL8K_MODE_AP 0x000000a5
36 #define MWL8K_HIU_INT_CODE 0x00000c14
37 #define MWL8K_FWSTA_READY 0xf0f1f2f4
38 #define MWL8K_FWAP_READY 0xf1f2f4a5
39 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
40 #define MWL8K_HIU_SCRATCH 0x00000c40
41
42 /* Host->device communications */
43 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
44 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
45 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
46 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
47 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
48 #define MWL8K_H2A_INT_DUMMY (1 << 20)
49 #define MWL8K_H2A_INT_RESET (1 << 15)
50 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
51 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52
53 /* Device->host communications */
54 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
55 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
56 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
57 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
58 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
59 #define MWL8K_A2H_INT_DUMMY (1 << 20)
60 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
61 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
62 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
63 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
64 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
65 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
66 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
67 #define MWL8K_A2H_INT_RX_READY (1 << 1)
68 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69
70 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
71 MWL8K_A2H_INT_CHNL_SWITCHED | \
72 MWL8K_A2H_INT_QUEUE_EMPTY | \
73 MWL8K_A2H_INT_RADAR_DETECT | \
74 MWL8K_A2H_INT_RADIO_ON | \
75 MWL8K_A2H_INT_RADIO_OFF | \
76 MWL8K_A2H_INT_MAC_EVENT | \
77 MWL8K_A2H_INT_OPC_DONE | \
78 MWL8K_A2H_INT_RX_READY | \
79 MWL8K_A2H_INT_TX_DONE)
80
81 #define MWL8K_RX_QUEUES 1
82 #define MWL8K_TX_QUEUES 4
83
84 struct rxd_ops {
85 int rxd_size;
86 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
87 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
88 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
89 __le16 *qos);
90 };
91
92 struct mwl8k_device_info {
93 char *part_name;
94 char *helper_image;
95 char *fw_image;
96 struct rxd_ops *ap_rxd_ops;
97 };
98
99 struct mwl8k_rx_queue {
100 int rxd_count;
101
102 /* hw receives here */
103 int head;
104
105 /* refill descs here */
106 int tail;
107
108 void *rxd;
109 dma_addr_t rxd_dma;
110 struct {
111 struct sk_buff *skb;
112 DECLARE_PCI_UNMAP_ADDR(dma)
113 } *buf;
114 };
115
116 struct mwl8k_tx_queue {
117 /* hw transmits here */
118 int head;
119
120 /* sw appends here */
121 int tail;
122
123 unsigned int len;
124 struct mwl8k_tx_desc *txd;
125 dma_addr_t txd_dma;
126 struct sk_buff **skb;
127 };
128
129 struct mwl8k_priv {
130 struct ieee80211_hw *hw;
131 struct pci_dev *pdev;
132
133 struct mwl8k_device_info *device_info;
134
135 void __iomem *sram;
136 void __iomem *regs;
137
138 /* firmware */
139 struct firmware *fw_helper;
140 struct firmware *fw_ucode;
141
142 /* hardware/firmware parameters */
143 bool ap_fw;
144 struct rxd_ops *rxd_ops;
145 struct ieee80211_supported_band band_24;
146 struct ieee80211_channel channels_24[14];
147 struct ieee80211_rate rates_24[14];
148 struct ieee80211_supported_band band_50;
149 struct ieee80211_channel channels_50[4];
150 struct ieee80211_rate rates_50[9];
151 u32 ap_macids_supported;
152 u32 sta_macids_supported;
153
154 /* firmware access */
155 struct mutex fw_mutex;
156 struct task_struct *fw_mutex_owner;
157 int fw_mutex_depth;
158 struct completion *hostcmd_wait;
159
160 /* lock held over TX and TX reap */
161 spinlock_t tx_lock;
162
163 /* TX quiesce completion, protected by fw_mutex and tx_lock */
164 struct completion *tx_wait;
165
166 /* List of interfaces. */
167 u32 macids_used;
168 struct list_head vif_list;
169
170 /* power management status cookie from firmware */
171 u32 *cookie;
172 dma_addr_t cookie_dma;
173
174 u16 num_mcaddrs;
175 u8 hw_rev;
176 u32 fw_rev;
177
178 /*
179 * Running count of TX packets in flight, to avoid
180 * iterating over the transmit rings each time.
181 */
182 int pending_tx_pkts;
183
184 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
185 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
186
187 bool radio_on;
188 bool radio_short_preamble;
189 bool sniffer_enabled;
190 bool wmm_enabled;
191
192 /* XXX need to convert this to handle multiple interfaces */
193 bool capture_beacon;
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
196
197 /*
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
201 * is checked.
202 */
203 struct work_struct finalize_join_worker;
204
205 /* Tasklet to perform TX reclaim. */
206 struct tasklet_struct poll_tx_task;
207
208 /* Tasklet to perform RX. */
209 struct tasklet_struct poll_rx_task;
210 };
211
212 /* Per interface specific private data */
213 struct mwl8k_vif {
214 struct list_head list;
215 struct ieee80211_vif *vif;
216
217 /* Firmware macid for this vif. */
218 int macid;
219
220 /* Non AMPDU sequence number assigned by driver. */
221 u16 seqno;
222 };
223 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
224
225 struct mwl8k_sta {
226 /* Index into station database. Returned by UPDATE_STADB. */
227 u8 peer_id;
228 };
229 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
230
231 static const struct ieee80211_channel mwl8k_channels_24[] = {
232 { .center_freq = 2412, .hw_value = 1, },
233 { .center_freq = 2417, .hw_value = 2, },
234 { .center_freq = 2422, .hw_value = 3, },
235 { .center_freq = 2427, .hw_value = 4, },
236 { .center_freq = 2432, .hw_value = 5, },
237 { .center_freq = 2437, .hw_value = 6, },
238 { .center_freq = 2442, .hw_value = 7, },
239 { .center_freq = 2447, .hw_value = 8, },
240 { .center_freq = 2452, .hw_value = 9, },
241 { .center_freq = 2457, .hw_value = 10, },
242 { .center_freq = 2462, .hw_value = 11, },
243 { .center_freq = 2467, .hw_value = 12, },
244 { .center_freq = 2472, .hw_value = 13, },
245 { .center_freq = 2484, .hw_value = 14, },
246 };
247
248 static const struct ieee80211_rate mwl8k_rates_24[] = {
249 { .bitrate = 10, .hw_value = 2, },
250 { .bitrate = 20, .hw_value = 4, },
251 { .bitrate = 55, .hw_value = 11, },
252 { .bitrate = 110, .hw_value = 22, },
253 { .bitrate = 220, .hw_value = 44, },
254 { .bitrate = 60, .hw_value = 12, },
255 { .bitrate = 90, .hw_value = 18, },
256 { .bitrate = 120, .hw_value = 24, },
257 { .bitrate = 180, .hw_value = 36, },
258 { .bitrate = 240, .hw_value = 48, },
259 { .bitrate = 360, .hw_value = 72, },
260 { .bitrate = 480, .hw_value = 96, },
261 { .bitrate = 540, .hw_value = 108, },
262 { .bitrate = 720, .hw_value = 144, },
263 };
264
265 static const struct ieee80211_channel mwl8k_channels_50[] = {
266 { .center_freq = 5180, .hw_value = 36, },
267 { .center_freq = 5200, .hw_value = 40, },
268 { .center_freq = 5220, .hw_value = 44, },
269 { .center_freq = 5240, .hw_value = 48, },
270 };
271
272 static const struct ieee80211_rate mwl8k_rates_50[] = {
273 { .bitrate = 60, .hw_value = 12, },
274 { .bitrate = 90, .hw_value = 18, },
275 { .bitrate = 120, .hw_value = 24, },
276 { .bitrate = 180, .hw_value = 36, },
277 { .bitrate = 240, .hw_value = 48, },
278 { .bitrate = 360, .hw_value = 72, },
279 { .bitrate = 480, .hw_value = 96, },
280 { .bitrate = 540, .hw_value = 108, },
281 { .bitrate = 720, .hw_value = 144, },
282 };
283
284 /* Set or get info from Firmware */
285 #define MWL8K_CMD_SET 0x0001
286 #define MWL8K_CMD_GET 0x0000
287
288 /* Firmware command codes */
289 #define MWL8K_CMD_CODE_DNLD 0x0001
290 #define MWL8K_CMD_GET_HW_SPEC 0x0003
291 #define MWL8K_CMD_SET_HW_SPEC 0x0004
292 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
293 #define MWL8K_CMD_GET_STAT 0x0014
294 #define MWL8K_CMD_RADIO_CONTROL 0x001c
295 #define MWL8K_CMD_RF_TX_POWER 0x001e
296 #define MWL8K_CMD_RF_ANTENNA 0x0020
297 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
298 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
299 #define MWL8K_CMD_SET_POST_SCAN 0x0108
300 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
301 #define MWL8K_CMD_SET_AID 0x010d
302 #define MWL8K_CMD_SET_RATE 0x0110
303 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
304 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
305 #define MWL8K_CMD_SET_SLOT 0x0114
306 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
307 #define MWL8K_CMD_SET_WMM_MODE 0x0123
308 #define MWL8K_CMD_MIMO_CONFIG 0x0125
309 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
310 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
311 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
312 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
313 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
314 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
315 #define MWL8K_CMD_UPDATE_STADB 0x1123
316
317 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
318 {
319 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
320 snprintf(buf, bufsize, "%s", #x);\
321 return buf;\
322 } while (0)
323 switch (cmd & ~0x8000) {
324 MWL8K_CMDNAME(CODE_DNLD);
325 MWL8K_CMDNAME(GET_HW_SPEC);
326 MWL8K_CMDNAME(SET_HW_SPEC);
327 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
328 MWL8K_CMDNAME(GET_STAT);
329 MWL8K_CMDNAME(RADIO_CONTROL);
330 MWL8K_CMDNAME(RF_TX_POWER);
331 MWL8K_CMDNAME(RF_ANTENNA);
332 MWL8K_CMDNAME(SET_BEACON);
333 MWL8K_CMDNAME(SET_PRE_SCAN);
334 MWL8K_CMDNAME(SET_POST_SCAN);
335 MWL8K_CMDNAME(SET_RF_CHANNEL);
336 MWL8K_CMDNAME(SET_AID);
337 MWL8K_CMDNAME(SET_RATE);
338 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
339 MWL8K_CMDNAME(RTS_THRESHOLD);
340 MWL8K_CMDNAME(SET_SLOT);
341 MWL8K_CMDNAME(SET_EDCA_PARAMS);
342 MWL8K_CMDNAME(SET_WMM_MODE);
343 MWL8K_CMDNAME(MIMO_CONFIG);
344 MWL8K_CMDNAME(USE_FIXED_RATE);
345 MWL8K_CMDNAME(ENABLE_SNIFFER);
346 MWL8K_CMDNAME(SET_MAC_ADDR);
347 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
348 MWL8K_CMDNAME(BSS_START);
349 MWL8K_CMDNAME(SET_NEW_STN);
350 MWL8K_CMDNAME(UPDATE_STADB);
351 default:
352 snprintf(buf, bufsize, "0x%x", cmd);
353 }
354 #undef MWL8K_CMDNAME
355
356 return buf;
357 }
358
359 /* Hardware and firmware reset */
360 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
361 {
362 iowrite32(MWL8K_H2A_INT_RESET,
363 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
364 iowrite32(MWL8K_H2A_INT_RESET,
365 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
366 msleep(20);
367 }
368
369 /* Release fw image */
370 static void mwl8k_release_fw(struct firmware **fw)
371 {
372 if (*fw == NULL)
373 return;
374 release_firmware(*fw);
375 *fw = NULL;
376 }
377
378 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
379 {
380 mwl8k_release_fw(&priv->fw_ucode);
381 mwl8k_release_fw(&priv->fw_helper);
382 }
383
384 /* Request fw image */
385 static int mwl8k_request_fw(struct mwl8k_priv *priv,
386 const char *fname, struct firmware **fw)
387 {
388 /* release current image */
389 if (*fw != NULL)
390 mwl8k_release_fw(fw);
391
392 return request_firmware((const struct firmware **)fw,
393 fname, &priv->pdev->dev);
394 }
395
396 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
397 {
398 struct mwl8k_device_info *di = priv->device_info;
399 int rc;
400
401 if (di->helper_image != NULL) {
402 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
403 if (rc) {
404 printk(KERN_ERR "%s: Error requesting helper "
405 "firmware file %s\n", pci_name(priv->pdev),
406 di->helper_image);
407 return rc;
408 }
409 }
410
411 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
412 if (rc) {
413 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
414 pci_name(priv->pdev), di->fw_image);
415 mwl8k_release_fw(&priv->fw_helper);
416 return rc;
417 }
418
419 return 0;
420 }
421
422 struct mwl8k_cmd_pkt {
423 __le16 code;
424 __le16 length;
425 __u8 seq_num;
426 __u8 macid;
427 __le16 result;
428 char payload[0];
429 } __attribute__((packed));
430
431 /*
432 * Firmware loading.
433 */
434 static int
435 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
436 {
437 void __iomem *regs = priv->regs;
438 dma_addr_t dma_addr;
439 int loops;
440
441 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
442 if (pci_dma_mapping_error(priv->pdev, dma_addr))
443 return -ENOMEM;
444
445 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
446 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
447 iowrite32(MWL8K_H2A_INT_DOORBELL,
448 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
449 iowrite32(MWL8K_H2A_INT_DUMMY,
450 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
451
452 loops = 1000;
453 do {
454 u32 int_code;
455
456 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
457 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
458 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
459 break;
460 }
461
462 cond_resched();
463 udelay(1);
464 } while (--loops);
465
466 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
467
468 return loops ? 0 : -ETIMEDOUT;
469 }
470
471 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
472 const u8 *data, size_t length)
473 {
474 struct mwl8k_cmd_pkt *cmd;
475 int done;
476 int rc = 0;
477
478 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
479 if (cmd == NULL)
480 return -ENOMEM;
481
482 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
483 cmd->seq_num = 0;
484 cmd->macid = 0;
485 cmd->result = 0;
486
487 done = 0;
488 while (length) {
489 int block_size = length > 256 ? 256 : length;
490
491 memcpy(cmd->payload, data + done, block_size);
492 cmd->length = cpu_to_le16(block_size);
493
494 rc = mwl8k_send_fw_load_cmd(priv, cmd,
495 sizeof(*cmd) + block_size);
496 if (rc)
497 break;
498
499 done += block_size;
500 length -= block_size;
501 }
502
503 if (!rc) {
504 cmd->length = 0;
505 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
506 }
507
508 kfree(cmd);
509
510 return rc;
511 }
512
513 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
514 const u8 *data, size_t length)
515 {
516 unsigned char *buffer;
517 int may_continue, rc = 0;
518 u32 done, prev_block_size;
519
520 buffer = kmalloc(1024, GFP_KERNEL);
521 if (buffer == NULL)
522 return -ENOMEM;
523
524 done = 0;
525 prev_block_size = 0;
526 may_continue = 1000;
527 while (may_continue > 0) {
528 u32 block_size;
529
530 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
531 if (block_size & 1) {
532 block_size &= ~1;
533 may_continue--;
534 } else {
535 done += prev_block_size;
536 length -= prev_block_size;
537 }
538
539 if (block_size > 1024 || block_size > length) {
540 rc = -EOVERFLOW;
541 break;
542 }
543
544 if (length == 0) {
545 rc = 0;
546 break;
547 }
548
549 if (block_size == 0) {
550 rc = -EPROTO;
551 may_continue--;
552 udelay(1);
553 continue;
554 }
555
556 prev_block_size = block_size;
557 memcpy(buffer, data + done, block_size);
558
559 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
560 if (rc)
561 break;
562 }
563
564 if (!rc && length != 0)
565 rc = -EREMOTEIO;
566
567 kfree(buffer);
568
569 return rc;
570 }
571
572 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
573 {
574 struct mwl8k_priv *priv = hw->priv;
575 struct firmware *fw = priv->fw_ucode;
576 int rc;
577 int loops;
578
579 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
580 struct firmware *helper = priv->fw_helper;
581
582 if (helper == NULL) {
583 printk(KERN_ERR "%s: helper image needed but none "
584 "given\n", pci_name(priv->pdev));
585 return -EINVAL;
586 }
587
588 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
589 if (rc) {
590 printk(KERN_ERR "%s: unable to load firmware "
591 "helper image\n", pci_name(priv->pdev));
592 return rc;
593 }
594 msleep(5);
595
596 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
597 } else {
598 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
599 }
600
601 if (rc) {
602 printk(KERN_ERR "%s: unable to load firmware image\n",
603 pci_name(priv->pdev));
604 return rc;
605 }
606
607 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
608
609 loops = 500000;
610 do {
611 u32 ready_code;
612
613 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
614 if (ready_code == MWL8K_FWAP_READY) {
615 priv->ap_fw = 1;
616 break;
617 } else if (ready_code == MWL8K_FWSTA_READY) {
618 priv->ap_fw = 0;
619 break;
620 }
621
622 cond_resched();
623 udelay(1);
624 } while (--loops);
625
626 return loops ? 0 : -ETIMEDOUT;
627 }
628
629
630 /* DMA header used by firmware and hardware. */
631 struct mwl8k_dma_data {
632 __le16 fwlen;
633 struct ieee80211_hdr wh;
634 char data[0];
635 } __attribute__((packed));
636
637 /* Routines to add/remove DMA header from skb. */
638 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
639 {
640 struct mwl8k_dma_data *tr;
641 int hdrlen;
642
643 tr = (struct mwl8k_dma_data *)skb->data;
644 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
645
646 if (hdrlen != sizeof(tr->wh)) {
647 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
648 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
649 *((__le16 *)(tr->data - 2)) = qos;
650 } else {
651 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
652 }
653 }
654
655 if (hdrlen != sizeof(*tr))
656 skb_pull(skb, sizeof(*tr) - hdrlen);
657 }
658
659 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
660 {
661 struct ieee80211_hdr *wh;
662 int hdrlen;
663 struct mwl8k_dma_data *tr;
664
665 /*
666 * Add a firmware DMA header; the firmware requires that we
667 * present a 2-byte payload length followed by a 4-address
668 * header (without QoS field), followed (optionally) by any
669 * WEP/ExtIV header (but only filled in for CCMP).
670 */
671 wh = (struct ieee80211_hdr *)skb->data;
672
673 hdrlen = ieee80211_hdrlen(wh->frame_control);
674 if (hdrlen != sizeof(*tr))
675 skb_push(skb, sizeof(*tr) - hdrlen);
676
677 if (ieee80211_is_data_qos(wh->frame_control))
678 hdrlen -= 2;
679
680 tr = (struct mwl8k_dma_data *)skb->data;
681 if (wh != &tr->wh)
682 memmove(&tr->wh, wh, hdrlen);
683 if (hdrlen != sizeof(tr->wh))
684 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
685
686 /*
687 * Firmware length is the length of the fully formed "802.11
688 * payload". That is, everything except for the 802.11 header.
689 * This includes all crypto material including the MIC.
690 */
691 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
692 }
693
694
695 /*
696 * Packet reception for 88w8366 AP firmware.
697 */
698 struct mwl8k_rxd_8366_ap {
699 __le16 pkt_len;
700 __u8 sq2;
701 __u8 rate;
702 __le32 pkt_phys_addr;
703 __le32 next_rxd_phys_addr;
704 __le16 qos_control;
705 __le16 htsig2;
706 __le32 hw_rssi_info;
707 __le32 hw_noise_floor_info;
708 __u8 noise_floor;
709 __u8 pad0[3];
710 __u8 rssi;
711 __u8 rx_status;
712 __u8 channel;
713 __u8 rx_ctrl;
714 } __attribute__((packed));
715
716 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
717 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
718 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
719
720 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
721
722 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
723 {
724 struct mwl8k_rxd_8366_ap *rxd = _rxd;
725
726 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
727 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
728 }
729
730 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
731 {
732 struct mwl8k_rxd_8366_ap *rxd = _rxd;
733
734 rxd->pkt_len = cpu_to_le16(len);
735 rxd->pkt_phys_addr = cpu_to_le32(addr);
736 wmb();
737 rxd->rx_ctrl = 0;
738 }
739
740 static int
741 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
742 __le16 *qos)
743 {
744 struct mwl8k_rxd_8366_ap *rxd = _rxd;
745
746 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
747 return -1;
748 rmb();
749
750 memset(status, 0, sizeof(*status));
751
752 status->signal = -rxd->rssi;
753 status->noise = -rxd->noise_floor;
754
755 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
756 status->flag |= RX_FLAG_HT;
757 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
758 status->flag |= RX_FLAG_40MHZ;
759 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
760 } else {
761 int i;
762
763 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
764 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
765 status->rate_idx = i;
766 break;
767 }
768 }
769 }
770
771 if (rxd->channel > 14) {
772 status->band = IEEE80211_BAND_5GHZ;
773 if (!(status->flag & RX_FLAG_HT))
774 status->rate_idx -= 5;
775 } else {
776 status->band = IEEE80211_BAND_2GHZ;
777 }
778 status->freq = ieee80211_channel_to_frequency(rxd->channel);
779
780 *qos = rxd->qos_control;
781
782 return le16_to_cpu(rxd->pkt_len);
783 }
784
785 static struct rxd_ops rxd_8366_ap_ops = {
786 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
787 .rxd_init = mwl8k_rxd_8366_ap_init,
788 .rxd_refill = mwl8k_rxd_8366_ap_refill,
789 .rxd_process = mwl8k_rxd_8366_ap_process,
790 };
791
792 /*
793 * Packet reception for STA firmware.
794 */
795 struct mwl8k_rxd_sta {
796 __le16 pkt_len;
797 __u8 link_quality;
798 __u8 noise_level;
799 __le32 pkt_phys_addr;
800 __le32 next_rxd_phys_addr;
801 __le16 qos_control;
802 __le16 rate_info;
803 __le32 pad0[4];
804 __u8 rssi;
805 __u8 channel;
806 __le16 pad1;
807 __u8 rx_ctrl;
808 __u8 rx_status;
809 __u8 pad2[2];
810 } __attribute__((packed));
811
812 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
813 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
814 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
815 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
816 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
817 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
818
819 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
820
821 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
822 {
823 struct mwl8k_rxd_sta *rxd = _rxd;
824
825 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
826 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
827 }
828
829 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
830 {
831 struct mwl8k_rxd_sta *rxd = _rxd;
832
833 rxd->pkt_len = cpu_to_le16(len);
834 rxd->pkt_phys_addr = cpu_to_le32(addr);
835 wmb();
836 rxd->rx_ctrl = 0;
837 }
838
839 static int
840 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
841 __le16 *qos)
842 {
843 struct mwl8k_rxd_sta *rxd = _rxd;
844 u16 rate_info;
845
846 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
847 return -1;
848 rmb();
849
850 rate_info = le16_to_cpu(rxd->rate_info);
851
852 memset(status, 0, sizeof(*status));
853
854 status->signal = -rxd->rssi;
855 status->noise = -rxd->noise_level;
856 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
857 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
858
859 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
860 status->flag |= RX_FLAG_SHORTPRE;
861 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
862 status->flag |= RX_FLAG_40MHZ;
863 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
864 status->flag |= RX_FLAG_SHORT_GI;
865 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
866 status->flag |= RX_FLAG_HT;
867
868 if (rxd->channel > 14) {
869 status->band = IEEE80211_BAND_5GHZ;
870 if (!(status->flag & RX_FLAG_HT))
871 status->rate_idx -= 5;
872 } else {
873 status->band = IEEE80211_BAND_2GHZ;
874 }
875 status->freq = ieee80211_channel_to_frequency(rxd->channel);
876
877 *qos = rxd->qos_control;
878
879 return le16_to_cpu(rxd->pkt_len);
880 }
881
882 static struct rxd_ops rxd_sta_ops = {
883 .rxd_size = sizeof(struct mwl8k_rxd_sta),
884 .rxd_init = mwl8k_rxd_sta_init,
885 .rxd_refill = mwl8k_rxd_sta_refill,
886 .rxd_process = mwl8k_rxd_sta_process,
887 };
888
889
890 #define MWL8K_RX_DESCS 256
891 #define MWL8K_RX_MAXSZ 3800
892
893 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
894 {
895 struct mwl8k_priv *priv = hw->priv;
896 struct mwl8k_rx_queue *rxq = priv->rxq + index;
897 int size;
898 int i;
899
900 rxq->rxd_count = 0;
901 rxq->head = 0;
902 rxq->tail = 0;
903
904 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
905
906 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
907 if (rxq->rxd == NULL) {
908 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
909 wiphy_name(hw->wiphy));
910 return -ENOMEM;
911 }
912 memset(rxq->rxd, 0, size);
913
914 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
915 if (rxq->buf == NULL) {
916 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
917 wiphy_name(hw->wiphy));
918 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
919 return -ENOMEM;
920 }
921 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
922
923 for (i = 0; i < MWL8K_RX_DESCS; i++) {
924 int desc_size;
925 void *rxd;
926 int nexti;
927 dma_addr_t next_dma_addr;
928
929 desc_size = priv->rxd_ops->rxd_size;
930 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
931
932 nexti = i + 1;
933 if (nexti == MWL8K_RX_DESCS)
934 nexti = 0;
935 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
936
937 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
938 }
939
940 return 0;
941 }
942
943 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
944 {
945 struct mwl8k_priv *priv = hw->priv;
946 struct mwl8k_rx_queue *rxq = priv->rxq + index;
947 int refilled;
948
949 refilled = 0;
950 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
951 struct sk_buff *skb;
952 dma_addr_t addr;
953 int rx;
954 void *rxd;
955
956 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
957 if (skb == NULL)
958 break;
959
960 addr = pci_map_single(priv->pdev, skb->data,
961 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
962
963 rxq->rxd_count++;
964 rx = rxq->tail++;
965 if (rxq->tail == MWL8K_RX_DESCS)
966 rxq->tail = 0;
967 rxq->buf[rx].skb = skb;
968 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
969
970 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
971 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
972
973 refilled++;
974 }
975
976 return refilled;
977 }
978
979 /* Must be called only when the card's reception is completely halted */
980 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
981 {
982 struct mwl8k_priv *priv = hw->priv;
983 struct mwl8k_rx_queue *rxq = priv->rxq + index;
984 int i;
985
986 for (i = 0; i < MWL8K_RX_DESCS; i++) {
987 if (rxq->buf[i].skb != NULL) {
988 pci_unmap_single(priv->pdev,
989 pci_unmap_addr(&rxq->buf[i], dma),
990 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
991 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
992
993 kfree_skb(rxq->buf[i].skb);
994 rxq->buf[i].skb = NULL;
995 }
996 }
997
998 kfree(rxq->buf);
999 rxq->buf = NULL;
1000
1001 pci_free_consistent(priv->pdev,
1002 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1003 rxq->rxd, rxq->rxd_dma);
1004 rxq->rxd = NULL;
1005 }
1006
1007
1008 /*
1009 * Scan a list of BSSIDs to process for finalize join.
1010 * Allows for extension to process multiple BSSIDs.
1011 */
1012 static inline int
1013 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1014 {
1015 return priv->capture_beacon &&
1016 ieee80211_is_beacon(wh->frame_control) &&
1017 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1018 }
1019
1020 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1021 struct sk_buff *skb)
1022 {
1023 struct mwl8k_priv *priv = hw->priv;
1024
1025 priv->capture_beacon = false;
1026 memset(priv->capture_bssid, 0, ETH_ALEN);
1027
1028 /*
1029 * Use GFP_ATOMIC as rxq_process is called from
1030 * the primary interrupt handler, memory allocation call
1031 * must not sleep.
1032 */
1033 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1034 if (priv->beacon_skb != NULL)
1035 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1036 }
1037
1038 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1039 {
1040 struct mwl8k_priv *priv = hw->priv;
1041 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1042 int processed;
1043
1044 processed = 0;
1045 while (rxq->rxd_count && limit--) {
1046 struct sk_buff *skb;
1047 void *rxd;
1048 int pkt_len;
1049 struct ieee80211_rx_status status;
1050 __le16 qos;
1051
1052 skb = rxq->buf[rxq->head].skb;
1053 if (skb == NULL)
1054 break;
1055
1056 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1057
1058 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1059 if (pkt_len < 0)
1060 break;
1061
1062 rxq->buf[rxq->head].skb = NULL;
1063
1064 pci_unmap_single(priv->pdev,
1065 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1066 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1067 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1068
1069 rxq->head++;
1070 if (rxq->head == MWL8K_RX_DESCS)
1071 rxq->head = 0;
1072
1073 rxq->rxd_count--;
1074
1075 skb_put(skb, pkt_len);
1076 mwl8k_remove_dma_header(skb, qos);
1077
1078 /*
1079 * Check for a pending join operation. Save a
1080 * copy of the beacon and schedule a tasklet to
1081 * send a FINALIZE_JOIN command to the firmware.
1082 */
1083 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1084 mwl8k_save_beacon(hw, skb);
1085
1086 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1087 ieee80211_rx_irqsafe(hw, skb);
1088
1089 processed++;
1090 }
1091
1092 return processed;
1093 }
1094
1095
1096 /*
1097 * Packet transmission.
1098 */
1099
1100 #define MWL8K_TXD_STATUS_OK 0x00000001
1101 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1102 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1103 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1104 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1105
1106 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1107 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1108 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1109 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1110 #define MWL8K_QOS_EOSP 0x0010
1111
1112 struct mwl8k_tx_desc {
1113 __le32 status;
1114 __u8 data_rate;
1115 __u8 tx_priority;
1116 __le16 qos_control;
1117 __le32 pkt_phys_addr;
1118 __le16 pkt_len;
1119 __u8 dest_MAC_addr[ETH_ALEN];
1120 __le32 next_txd_phys_addr;
1121 __le32 reserved;
1122 __le16 rate_info;
1123 __u8 peer_id;
1124 __u8 tx_frag_cnt;
1125 } __attribute__((packed));
1126
1127 #define MWL8K_TX_DESCS 128
1128
1129 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1130 {
1131 struct mwl8k_priv *priv = hw->priv;
1132 struct mwl8k_tx_queue *txq = priv->txq + index;
1133 int size;
1134 int i;
1135
1136 txq->len = 0;
1137 txq->head = 0;
1138 txq->tail = 0;
1139
1140 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1141
1142 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1143 if (txq->txd == NULL) {
1144 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1145 wiphy_name(hw->wiphy));
1146 return -ENOMEM;
1147 }
1148 memset(txq->txd, 0, size);
1149
1150 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1151 if (txq->skb == NULL) {
1152 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1153 wiphy_name(hw->wiphy));
1154 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1155 return -ENOMEM;
1156 }
1157 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1158
1159 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1160 struct mwl8k_tx_desc *tx_desc;
1161 int nexti;
1162
1163 tx_desc = txq->txd + i;
1164 nexti = (i + 1) % MWL8K_TX_DESCS;
1165
1166 tx_desc->status = 0;
1167 tx_desc->next_txd_phys_addr =
1168 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1169 }
1170
1171 return 0;
1172 }
1173
1174 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1175 {
1176 iowrite32(MWL8K_H2A_INT_PPA_READY,
1177 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1178 iowrite32(MWL8K_H2A_INT_DUMMY,
1179 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1180 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1181 }
1182
1183 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1184 {
1185 struct mwl8k_priv *priv = hw->priv;
1186 int i;
1187
1188 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1189 struct mwl8k_tx_queue *txq = priv->txq + i;
1190 int fw_owned = 0;
1191 int drv_owned = 0;
1192 int unused = 0;
1193 int desc;
1194
1195 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1196 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1197 u32 status;
1198
1199 status = le32_to_cpu(tx_desc->status);
1200 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1201 fw_owned++;
1202 else
1203 drv_owned++;
1204
1205 if (tx_desc->pkt_len == 0)
1206 unused++;
1207 }
1208
1209 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1210 "fw_owned=%d drv_owned=%d unused=%d\n",
1211 wiphy_name(hw->wiphy), i,
1212 txq->len, txq->head, txq->tail,
1213 fw_owned, drv_owned, unused);
1214 }
1215 }
1216
1217 /*
1218 * Must be called with priv->fw_mutex held and tx queues stopped.
1219 */
1220 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1221
1222 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1223 {
1224 struct mwl8k_priv *priv = hw->priv;
1225 DECLARE_COMPLETION_ONSTACK(tx_wait);
1226 int retry;
1227 int rc;
1228
1229 might_sleep();
1230
1231 /*
1232 * The TX queues are stopped at this point, so this test
1233 * doesn't need to take ->tx_lock.
1234 */
1235 if (!priv->pending_tx_pkts)
1236 return 0;
1237
1238 retry = 0;
1239 rc = 0;
1240
1241 spin_lock_bh(&priv->tx_lock);
1242 priv->tx_wait = &tx_wait;
1243 while (!rc) {
1244 int oldcount;
1245 unsigned long timeout;
1246
1247 oldcount = priv->pending_tx_pkts;
1248
1249 spin_unlock_bh(&priv->tx_lock);
1250 timeout = wait_for_completion_timeout(&tx_wait,
1251 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1252 spin_lock_bh(&priv->tx_lock);
1253
1254 if (timeout) {
1255 WARN_ON(priv->pending_tx_pkts);
1256 if (retry) {
1257 printk(KERN_NOTICE "%s: tx rings drained\n",
1258 wiphy_name(hw->wiphy));
1259 }
1260 break;
1261 }
1262
1263 if (priv->pending_tx_pkts < oldcount) {
1264 printk(KERN_NOTICE "%s: waiting for tx rings "
1265 "to drain (%d -> %d pkts)\n",
1266 wiphy_name(hw->wiphy), oldcount,
1267 priv->pending_tx_pkts);
1268 retry = 1;
1269 continue;
1270 }
1271
1272 priv->tx_wait = NULL;
1273
1274 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1275 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1276 mwl8k_dump_tx_rings(hw);
1277
1278 rc = -ETIMEDOUT;
1279 }
1280 spin_unlock_bh(&priv->tx_lock);
1281
1282 return rc;
1283 }
1284
1285 #define MWL8K_TXD_SUCCESS(status) \
1286 ((status) & (MWL8K_TXD_STATUS_OK | \
1287 MWL8K_TXD_STATUS_OK_RETRY | \
1288 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1289
1290 static int
1291 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1292 {
1293 struct mwl8k_priv *priv = hw->priv;
1294 struct mwl8k_tx_queue *txq = priv->txq + index;
1295 int processed;
1296
1297 processed = 0;
1298 while (txq->len > 0 && limit--) {
1299 int tx;
1300 struct mwl8k_tx_desc *tx_desc;
1301 unsigned long addr;
1302 int size;
1303 struct sk_buff *skb;
1304 struct ieee80211_tx_info *info;
1305 u32 status;
1306
1307 tx = txq->head;
1308 tx_desc = txq->txd + tx;
1309
1310 status = le32_to_cpu(tx_desc->status);
1311
1312 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1313 if (!force)
1314 break;
1315 tx_desc->status &=
1316 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1317 }
1318
1319 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1320 BUG_ON(txq->len == 0);
1321 txq->len--;
1322 priv->pending_tx_pkts--;
1323
1324 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1325 size = le16_to_cpu(tx_desc->pkt_len);
1326 skb = txq->skb[tx];
1327 txq->skb[tx] = NULL;
1328
1329 BUG_ON(skb == NULL);
1330 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1331
1332 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1333
1334 /* Mark descriptor as unused */
1335 tx_desc->pkt_phys_addr = 0;
1336 tx_desc->pkt_len = 0;
1337
1338 info = IEEE80211_SKB_CB(skb);
1339 ieee80211_tx_info_clear_status(info);
1340 if (MWL8K_TXD_SUCCESS(status))
1341 info->flags |= IEEE80211_TX_STAT_ACK;
1342
1343 ieee80211_tx_status_irqsafe(hw, skb);
1344
1345 processed++;
1346 }
1347
1348 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1349 ieee80211_wake_queue(hw, index);
1350
1351 return processed;
1352 }
1353
1354 /* must be called only when the card's transmit is completely halted */
1355 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1356 {
1357 struct mwl8k_priv *priv = hw->priv;
1358 struct mwl8k_tx_queue *txq = priv->txq + index;
1359
1360 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1361
1362 kfree(txq->skb);
1363 txq->skb = NULL;
1364
1365 pci_free_consistent(priv->pdev,
1366 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1367 txq->txd, txq->txd_dma);
1368 txq->txd = NULL;
1369 }
1370
1371 static int
1372 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1373 {
1374 struct mwl8k_priv *priv = hw->priv;
1375 struct ieee80211_tx_info *tx_info;
1376 struct mwl8k_vif *mwl8k_vif;
1377 struct ieee80211_hdr *wh;
1378 struct mwl8k_tx_queue *txq;
1379 struct mwl8k_tx_desc *tx;
1380 dma_addr_t dma;
1381 u32 txstatus;
1382 u8 txdatarate;
1383 u16 qos;
1384
1385 wh = (struct ieee80211_hdr *)skb->data;
1386 if (ieee80211_is_data_qos(wh->frame_control))
1387 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1388 else
1389 qos = 0;
1390
1391 mwl8k_add_dma_header(skb);
1392 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1393
1394 tx_info = IEEE80211_SKB_CB(skb);
1395 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1396
1397 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1398 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1399 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1400 mwl8k_vif->seqno += 0x10;
1401 }
1402
1403 /* Setup firmware control bit fields for each frame type. */
1404 txstatus = 0;
1405 txdatarate = 0;
1406 if (ieee80211_is_mgmt(wh->frame_control) ||
1407 ieee80211_is_ctl(wh->frame_control)) {
1408 txdatarate = 0;
1409 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1410 } else if (ieee80211_is_data(wh->frame_control)) {
1411 txdatarate = 1;
1412 if (is_multicast_ether_addr(wh->addr1))
1413 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1414
1415 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1416 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1417 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1418 else
1419 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1420 }
1421
1422 dma = pci_map_single(priv->pdev, skb->data,
1423 skb->len, PCI_DMA_TODEVICE);
1424
1425 if (pci_dma_mapping_error(priv->pdev, dma)) {
1426 printk(KERN_DEBUG "%s: failed to dma map skb, "
1427 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1428 dev_kfree_skb(skb);
1429 return NETDEV_TX_OK;
1430 }
1431
1432 spin_lock_bh(&priv->tx_lock);
1433
1434 txq = priv->txq + index;
1435
1436 BUG_ON(txq->skb[txq->tail] != NULL);
1437 txq->skb[txq->tail] = skb;
1438
1439 tx = txq->txd + txq->tail;
1440 tx->data_rate = txdatarate;
1441 tx->tx_priority = index;
1442 tx->qos_control = cpu_to_le16(qos);
1443 tx->pkt_phys_addr = cpu_to_le32(dma);
1444 tx->pkt_len = cpu_to_le16(skb->len);
1445 tx->rate_info = 0;
1446 if (!priv->ap_fw && tx_info->control.sta != NULL)
1447 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1448 else
1449 tx->peer_id = 0;
1450 wmb();
1451 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1452
1453 txq->len++;
1454 priv->pending_tx_pkts++;
1455
1456 txq->tail++;
1457 if (txq->tail == MWL8K_TX_DESCS)
1458 txq->tail = 0;
1459
1460 if (txq->head == txq->tail)
1461 ieee80211_stop_queue(hw, index);
1462
1463 mwl8k_tx_start(priv);
1464
1465 spin_unlock_bh(&priv->tx_lock);
1466
1467 return NETDEV_TX_OK;
1468 }
1469
1470
1471 /*
1472 * Firmware access.
1473 *
1474 * We have the following requirements for issuing firmware commands:
1475 * - Some commands require that the packet transmit path is idle when
1476 * the command is issued. (For simplicity, we'll just quiesce the
1477 * transmit path for every command.)
1478 * - There are certain sequences of commands that need to be issued to
1479 * the hardware sequentially, with no other intervening commands.
1480 *
1481 * This leads to an implementation of a "firmware lock" as a mutex that
1482 * can be taken recursively, and which is taken by both the low-level
1483 * command submission function (mwl8k_post_cmd) as well as any users of
1484 * that function that require issuing of an atomic sequence of commands,
1485 * and quiesces the transmit path whenever it's taken.
1486 */
1487 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1488 {
1489 struct mwl8k_priv *priv = hw->priv;
1490
1491 if (priv->fw_mutex_owner != current) {
1492 int rc;
1493
1494 mutex_lock(&priv->fw_mutex);
1495 ieee80211_stop_queues(hw);
1496
1497 rc = mwl8k_tx_wait_empty(hw);
1498 if (rc) {
1499 ieee80211_wake_queues(hw);
1500 mutex_unlock(&priv->fw_mutex);
1501
1502 return rc;
1503 }
1504
1505 priv->fw_mutex_owner = current;
1506 }
1507
1508 priv->fw_mutex_depth++;
1509
1510 return 0;
1511 }
1512
1513 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1514 {
1515 struct mwl8k_priv *priv = hw->priv;
1516
1517 if (!--priv->fw_mutex_depth) {
1518 ieee80211_wake_queues(hw);
1519 priv->fw_mutex_owner = NULL;
1520 mutex_unlock(&priv->fw_mutex);
1521 }
1522 }
1523
1524
1525 /*
1526 * Command processing.
1527 */
1528
1529 /* Timeout firmware commands after 10s */
1530 #define MWL8K_CMD_TIMEOUT_MS 10000
1531
1532 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1533 {
1534 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1535 struct mwl8k_priv *priv = hw->priv;
1536 void __iomem *regs = priv->regs;
1537 dma_addr_t dma_addr;
1538 unsigned int dma_size;
1539 int rc;
1540 unsigned long timeout = 0;
1541 u8 buf[32];
1542
1543 cmd->result = 0xffff;
1544 dma_size = le16_to_cpu(cmd->length);
1545 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1546 PCI_DMA_BIDIRECTIONAL);
1547 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1548 return -ENOMEM;
1549
1550 rc = mwl8k_fw_lock(hw);
1551 if (rc) {
1552 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1553 PCI_DMA_BIDIRECTIONAL);
1554 return rc;
1555 }
1556
1557 priv->hostcmd_wait = &cmd_wait;
1558 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1559 iowrite32(MWL8K_H2A_INT_DOORBELL,
1560 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1561 iowrite32(MWL8K_H2A_INT_DUMMY,
1562 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1563
1564 timeout = wait_for_completion_timeout(&cmd_wait,
1565 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1566
1567 priv->hostcmd_wait = NULL;
1568
1569 mwl8k_fw_unlock(hw);
1570
1571 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1572 PCI_DMA_BIDIRECTIONAL);
1573
1574 if (!timeout) {
1575 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1576 wiphy_name(hw->wiphy),
1577 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1578 MWL8K_CMD_TIMEOUT_MS);
1579 rc = -ETIMEDOUT;
1580 } else {
1581 int ms;
1582
1583 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1584
1585 rc = cmd->result ? -EINVAL : 0;
1586 if (rc)
1587 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1588 wiphy_name(hw->wiphy),
1589 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1590 le16_to_cpu(cmd->result));
1591 else if (ms > 2000)
1592 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1593 wiphy_name(hw->wiphy),
1594 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1595 ms);
1596 }
1597
1598 return rc;
1599 }
1600
1601 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1602 struct ieee80211_vif *vif,
1603 struct mwl8k_cmd_pkt *cmd)
1604 {
1605 if (vif != NULL)
1606 cmd->macid = MWL8K_VIF(vif)->macid;
1607 return mwl8k_post_cmd(hw, cmd);
1608 }
1609
1610 /*
1611 * Setup code shared between STA and AP firmware images.
1612 */
1613 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1614 {
1615 struct mwl8k_priv *priv = hw->priv;
1616
1617 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1618 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1619
1620 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1621 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1622
1623 priv->band_24.band = IEEE80211_BAND_2GHZ;
1624 priv->band_24.channels = priv->channels_24;
1625 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1626 priv->band_24.bitrates = priv->rates_24;
1627 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1628
1629 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1630 }
1631
1632 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1633 {
1634 struct mwl8k_priv *priv = hw->priv;
1635
1636 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1637 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1638
1639 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1640 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1641
1642 priv->band_50.band = IEEE80211_BAND_5GHZ;
1643 priv->band_50.channels = priv->channels_50;
1644 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1645 priv->band_50.bitrates = priv->rates_50;
1646 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1647
1648 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1649 }
1650
1651 /*
1652 * CMD_GET_HW_SPEC (STA version).
1653 */
1654 struct mwl8k_cmd_get_hw_spec_sta {
1655 struct mwl8k_cmd_pkt header;
1656 __u8 hw_rev;
1657 __u8 host_interface;
1658 __le16 num_mcaddrs;
1659 __u8 perm_addr[ETH_ALEN];
1660 __le16 region_code;
1661 __le32 fw_rev;
1662 __le32 ps_cookie;
1663 __le32 caps;
1664 __u8 mcs_bitmap[16];
1665 __le32 rx_queue_ptr;
1666 __le32 num_tx_queues;
1667 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1668 __le32 caps2;
1669 __le32 num_tx_desc_per_queue;
1670 __le32 total_rxd;
1671 } __attribute__((packed));
1672
1673 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1674 #define MWL8K_CAP_GREENFIELD 0x08000000
1675 #define MWL8K_CAP_AMPDU 0x04000000
1676 #define MWL8K_CAP_RX_STBC 0x01000000
1677 #define MWL8K_CAP_TX_STBC 0x00800000
1678 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1679 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1680 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1681 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1682 #define MWL8K_CAP_DELAY_BA 0x00003000
1683 #define MWL8K_CAP_MIMO 0x00000200
1684 #define MWL8K_CAP_40MHZ 0x00000100
1685 #define MWL8K_CAP_BAND_MASK 0x00000007
1686 #define MWL8K_CAP_5GHZ 0x00000004
1687 #define MWL8K_CAP_2GHZ4 0x00000001
1688
1689 static void
1690 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1691 struct ieee80211_supported_band *band, u32 cap)
1692 {
1693 int rx_streams;
1694 int tx_streams;
1695
1696 band->ht_cap.ht_supported = 1;
1697
1698 if (cap & MWL8K_CAP_MAX_AMSDU)
1699 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1700 if (cap & MWL8K_CAP_GREENFIELD)
1701 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1702 if (cap & MWL8K_CAP_AMPDU) {
1703 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1704 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1705 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1706 }
1707 if (cap & MWL8K_CAP_RX_STBC)
1708 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1709 if (cap & MWL8K_CAP_TX_STBC)
1710 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1711 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1712 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1713 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1714 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1715 if (cap & MWL8K_CAP_DELAY_BA)
1716 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1717 if (cap & MWL8K_CAP_40MHZ)
1718 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1719
1720 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1721 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1722
1723 band->ht_cap.mcs.rx_mask[0] = 0xff;
1724 if (rx_streams >= 2)
1725 band->ht_cap.mcs.rx_mask[1] = 0xff;
1726 if (rx_streams >= 3)
1727 band->ht_cap.mcs.rx_mask[2] = 0xff;
1728 band->ht_cap.mcs.rx_mask[4] = 0x01;
1729 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1730
1731 if (rx_streams != tx_streams) {
1732 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1733 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1734 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1735 }
1736 }
1737
1738 static void
1739 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1740 {
1741 struct mwl8k_priv *priv = hw->priv;
1742
1743 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1744 mwl8k_setup_2ghz_band(hw);
1745 if (caps & MWL8K_CAP_MIMO)
1746 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1747 }
1748
1749 if (caps & MWL8K_CAP_5GHZ) {
1750 mwl8k_setup_5ghz_band(hw);
1751 if (caps & MWL8K_CAP_MIMO)
1752 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1753 }
1754 }
1755
1756 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1757 {
1758 struct mwl8k_priv *priv = hw->priv;
1759 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1760 int rc;
1761 int i;
1762
1763 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1764 if (cmd == NULL)
1765 return -ENOMEM;
1766
1767 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1768 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1769
1770 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1771 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1772 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1773 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1774 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1775 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1776 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1777 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1778
1779 rc = mwl8k_post_cmd(hw, &cmd->header);
1780
1781 if (!rc) {
1782 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1783 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1784 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1785 priv->hw_rev = cmd->hw_rev;
1786 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1787 priv->ap_macids_supported = 0x00000000;
1788 priv->sta_macids_supported = 0x00000001;
1789 }
1790
1791 kfree(cmd);
1792 return rc;
1793 }
1794
1795 /*
1796 * CMD_GET_HW_SPEC (AP version).
1797 */
1798 struct mwl8k_cmd_get_hw_spec_ap {
1799 struct mwl8k_cmd_pkt header;
1800 __u8 hw_rev;
1801 __u8 host_interface;
1802 __le16 num_wcb;
1803 __le16 num_mcaddrs;
1804 __u8 perm_addr[ETH_ALEN];
1805 __le16 region_code;
1806 __le16 num_antenna;
1807 __le32 fw_rev;
1808 __le32 wcbbase0;
1809 __le32 rxwrptr;
1810 __le32 rxrdptr;
1811 __le32 ps_cookie;
1812 __le32 wcbbase1;
1813 __le32 wcbbase2;
1814 __le32 wcbbase3;
1815 } __attribute__((packed));
1816
1817 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1818 {
1819 struct mwl8k_priv *priv = hw->priv;
1820 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1821 int rc;
1822
1823 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1824 if (cmd == NULL)
1825 return -ENOMEM;
1826
1827 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1828 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1829
1830 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1831 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1832
1833 rc = mwl8k_post_cmd(hw, &cmd->header);
1834
1835 if (!rc) {
1836 int off;
1837
1838 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1839 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1840 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1841 priv->hw_rev = cmd->hw_rev;
1842 mwl8k_setup_2ghz_band(hw);
1843 priv->ap_macids_supported = 0x000000ff;
1844 priv->sta_macids_supported = 0x00000000;
1845
1846 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1847 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1848
1849 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1850 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1851
1852 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1853 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1854
1855 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1856 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1857
1858 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1859 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1860
1861 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1862 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1863 }
1864
1865 kfree(cmd);
1866 return rc;
1867 }
1868
1869 /*
1870 * CMD_SET_HW_SPEC.
1871 */
1872 struct mwl8k_cmd_set_hw_spec {
1873 struct mwl8k_cmd_pkt header;
1874 __u8 hw_rev;
1875 __u8 host_interface;
1876 __le16 num_mcaddrs;
1877 __u8 perm_addr[ETH_ALEN];
1878 __le16 region_code;
1879 __le32 fw_rev;
1880 __le32 ps_cookie;
1881 __le32 caps;
1882 __le32 rx_queue_ptr;
1883 __le32 num_tx_queues;
1884 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1885 __le32 flags;
1886 __le32 num_tx_desc_per_queue;
1887 __le32 total_rxd;
1888 } __attribute__((packed));
1889
1890 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1891 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1892 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1893
1894 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1895 {
1896 struct mwl8k_priv *priv = hw->priv;
1897 struct mwl8k_cmd_set_hw_spec *cmd;
1898 int rc;
1899 int i;
1900
1901 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1902 if (cmd == NULL)
1903 return -ENOMEM;
1904
1905 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1906 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1907
1908 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1909 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1910 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1911 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1912 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1913 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1914 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1915 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1916 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1917 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1918
1919 rc = mwl8k_post_cmd(hw, &cmd->header);
1920 kfree(cmd);
1921
1922 return rc;
1923 }
1924
1925 /*
1926 * CMD_MAC_MULTICAST_ADR.
1927 */
1928 struct mwl8k_cmd_mac_multicast_adr {
1929 struct mwl8k_cmd_pkt header;
1930 __le16 action;
1931 __le16 numaddr;
1932 __u8 addr[0][ETH_ALEN];
1933 };
1934
1935 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1936 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1937 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1938 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1939
1940 static struct mwl8k_cmd_pkt *
1941 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1942 int mc_count, struct dev_addr_list *mclist)
1943 {
1944 struct mwl8k_priv *priv = hw->priv;
1945 struct mwl8k_cmd_mac_multicast_adr *cmd;
1946 int size;
1947
1948 if (allmulti || mc_count > priv->num_mcaddrs) {
1949 allmulti = 1;
1950 mc_count = 0;
1951 }
1952
1953 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1954
1955 cmd = kzalloc(size, GFP_ATOMIC);
1956 if (cmd == NULL)
1957 return NULL;
1958
1959 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1960 cmd->header.length = cpu_to_le16(size);
1961 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1962 MWL8K_ENABLE_RX_BROADCAST);
1963
1964 if (allmulti) {
1965 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1966 } else if (mc_count) {
1967 int i;
1968
1969 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1970 cmd->numaddr = cpu_to_le16(mc_count);
1971 for (i = 0; i < mc_count && mclist; i++) {
1972 if (mclist->da_addrlen != ETH_ALEN) {
1973 kfree(cmd);
1974 return NULL;
1975 }
1976 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1977 mclist = mclist->next;
1978 }
1979 }
1980
1981 return &cmd->header;
1982 }
1983
1984 /*
1985 * CMD_GET_STAT.
1986 */
1987 struct mwl8k_cmd_get_stat {
1988 struct mwl8k_cmd_pkt header;
1989 __le32 stats[64];
1990 } __attribute__((packed));
1991
1992 #define MWL8K_STAT_ACK_FAILURE 9
1993 #define MWL8K_STAT_RTS_FAILURE 12
1994 #define MWL8K_STAT_FCS_ERROR 24
1995 #define MWL8K_STAT_RTS_SUCCESS 11
1996
1997 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1998 struct ieee80211_low_level_stats *stats)
1999 {
2000 struct mwl8k_cmd_get_stat *cmd;
2001 int rc;
2002
2003 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2004 if (cmd == NULL)
2005 return -ENOMEM;
2006
2007 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2008 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2009
2010 rc = mwl8k_post_cmd(hw, &cmd->header);
2011 if (!rc) {
2012 stats->dot11ACKFailureCount =
2013 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2014 stats->dot11RTSFailureCount =
2015 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2016 stats->dot11FCSErrorCount =
2017 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2018 stats->dot11RTSSuccessCount =
2019 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2020 }
2021 kfree(cmd);
2022
2023 return rc;
2024 }
2025
2026 /*
2027 * CMD_RADIO_CONTROL.
2028 */
2029 struct mwl8k_cmd_radio_control {
2030 struct mwl8k_cmd_pkt header;
2031 __le16 action;
2032 __le16 control;
2033 __le16 radio_on;
2034 } __attribute__((packed));
2035
2036 static int
2037 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2038 {
2039 struct mwl8k_priv *priv = hw->priv;
2040 struct mwl8k_cmd_radio_control *cmd;
2041 int rc;
2042
2043 if (enable == priv->radio_on && !force)
2044 return 0;
2045
2046 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2047 if (cmd == NULL)
2048 return -ENOMEM;
2049
2050 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2051 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2052 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2053 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2054 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2055
2056 rc = mwl8k_post_cmd(hw, &cmd->header);
2057 kfree(cmd);
2058
2059 if (!rc)
2060 priv->radio_on = enable;
2061
2062 return rc;
2063 }
2064
2065 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2066 {
2067 return mwl8k_cmd_radio_control(hw, 0, 0);
2068 }
2069
2070 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2071 {
2072 return mwl8k_cmd_radio_control(hw, 1, 0);
2073 }
2074
2075 static int
2076 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2077 {
2078 struct mwl8k_priv *priv = hw->priv;
2079
2080 priv->radio_short_preamble = short_preamble;
2081
2082 return mwl8k_cmd_radio_control(hw, 1, 1);
2083 }
2084
2085 /*
2086 * CMD_RF_TX_POWER.
2087 */
2088 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
2089
2090 struct mwl8k_cmd_rf_tx_power {
2091 struct mwl8k_cmd_pkt header;
2092 __le16 action;
2093 __le16 support_level;
2094 __le16 current_level;
2095 __le16 reserved;
2096 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2097 } __attribute__((packed));
2098
2099 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2100 {
2101 struct mwl8k_cmd_rf_tx_power *cmd;
2102 int rc;
2103
2104 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2105 if (cmd == NULL)
2106 return -ENOMEM;
2107
2108 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2109 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2110 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2111 cmd->support_level = cpu_to_le16(dBm);
2112
2113 rc = mwl8k_post_cmd(hw, &cmd->header);
2114 kfree(cmd);
2115
2116 return rc;
2117 }
2118
2119 /*
2120 * CMD_RF_ANTENNA.
2121 */
2122 struct mwl8k_cmd_rf_antenna {
2123 struct mwl8k_cmd_pkt header;
2124 __le16 antenna;
2125 __le16 mode;
2126 } __attribute__((packed));
2127
2128 #define MWL8K_RF_ANTENNA_RX 1
2129 #define MWL8K_RF_ANTENNA_TX 2
2130
2131 static int
2132 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2133 {
2134 struct mwl8k_cmd_rf_antenna *cmd;
2135 int rc;
2136
2137 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2138 if (cmd == NULL)
2139 return -ENOMEM;
2140
2141 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2142 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2143 cmd->antenna = cpu_to_le16(antenna);
2144 cmd->mode = cpu_to_le16(mask);
2145
2146 rc = mwl8k_post_cmd(hw, &cmd->header);
2147 kfree(cmd);
2148
2149 return rc;
2150 }
2151
2152 /*
2153 * CMD_SET_BEACON.
2154 */
2155 struct mwl8k_cmd_set_beacon {
2156 struct mwl8k_cmd_pkt header;
2157 __le16 beacon_len;
2158 __u8 beacon[0];
2159 };
2160
2161 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2162 struct ieee80211_vif *vif, u8 *beacon, int len)
2163 {
2164 struct mwl8k_cmd_set_beacon *cmd;
2165 int rc;
2166
2167 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2168 if (cmd == NULL)
2169 return -ENOMEM;
2170
2171 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2172 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2173 cmd->beacon_len = cpu_to_le16(len);
2174 memcpy(cmd->beacon, beacon, len);
2175
2176 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2177 kfree(cmd);
2178
2179 return rc;
2180 }
2181
2182 /*
2183 * CMD_SET_PRE_SCAN.
2184 */
2185 struct mwl8k_cmd_set_pre_scan {
2186 struct mwl8k_cmd_pkt header;
2187 } __attribute__((packed));
2188
2189 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2190 {
2191 struct mwl8k_cmd_set_pre_scan *cmd;
2192 int rc;
2193
2194 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2195 if (cmd == NULL)
2196 return -ENOMEM;
2197
2198 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2199 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2200
2201 rc = mwl8k_post_cmd(hw, &cmd->header);
2202 kfree(cmd);
2203
2204 return rc;
2205 }
2206
2207 /*
2208 * CMD_SET_POST_SCAN.
2209 */
2210 struct mwl8k_cmd_set_post_scan {
2211 struct mwl8k_cmd_pkt header;
2212 __le32 isibss;
2213 __u8 bssid[ETH_ALEN];
2214 } __attribute__((packed));
2215
2216 static int
2217 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2218 {
2219 struct mwl8k_cmd_set_post_scan *cmd;
2220 int rc;
2221
2222 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2223 if (cmd == NULL)
2224 return -ENOMEM;
2225
2226 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2227 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2228 cmd->isibss = 0;
2229 memcpy(cmd->bssid, mac, ETH_ALEN);
2230
2231 rc = mwl8k_post_cmd(hw, &cmd->header);
2232 kfree(cmd);
2233
2234 return rc;
2235 }
2236
2237 /*
2238 * CMD_SET_RF_CHANNEL.
2239 */
2240 struct mwl8k_cmd_set_rf_channel {
2241 struct mwl8k_cmd_pkt header;
2242 __le16 action;
2243 __u8 current_channel;
2244 __le32 channel_flags;
2245 } __attribute__((packed));
2246
2247 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2248 struct ieee80211_conf *conf)
2249 {
2250 struct ieee80211_channel *channel = conf->channel;
2251 struct mwl8k_cmd_set_rf_channel *cmd;
2252 int rc;
2253
2254 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2255 if (cmd == NULL)
2256 return -ENOMEM;
2257
2258 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2259 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2260 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2261 cmd->current_channel = channel->hw_value;
2262
2263 if (channel->band == IEEE80211_BAND_2GHZ)
2264 cmd->channel_flags |= cpu_to_le32(0x00000001);
2265 else if (channel->band == IEEE80211_BAND_5GHZ)
2266 cmd->channel_flags |= cpu_to_le32(0x00000004);
2267
2268 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2269 conf->channel_type == NL80211_CHAN_HT20)
2270 cmd->channel_flags |= cpu_to_le32(0x00000080);
2271 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2272 cmd->channel_flags |= cpu_to_le32(0x000001900);
2273 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2274 cmd->channel_flags |= cpu_to_le32(0x000000900);
2275
2276 rc = mwl8k_post_cmd(hw, &cmd->header);
2277 kfree(cmd);
2278
2279 return rc;
2280 }
2281
2282 /*
2283 * CMD_SET_AID.
2284 */
2285 #define MWL8K_FRAME_PROT_DISABLED 0x00
2286 #define MWL8K_FRAME_PROT_11G 0x07
2287 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2288 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2289
2290 struct mwl8k_cmd_update_set_aid {
2291 struct mwl8k_cmd_pkt header;
2292 __le16 aid;
2293
2294 /* AP's MAC address (BSSID) */
2295 __u8 bssid[ETH_ALEN];
2296 __le16 protection_mode;
2297 __u8 supp_rates[14];
2298 } __attribute__((packed));
2299
2300 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2301 {
2302 int i;
2303 int j;
2304
2305 /*
2306 * Clear nonstandard rates 4 and 13.
2307 */
2308 mask &= 0x1fef;
2309
2310 for (i = 0, j = 0; i < 14; i++) {
2311 if (mask & (1 << i))
2312 rates[j++] = mwl8k_rates_24[i].hw_value;
2313 }
2314 }
2315
2316 static int
2317 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2318 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2319 {
2320 struct mwl8k_cmd_update_set_aid *cmd;
2321 u16 prot_mode;
2322 int rc;
2323
2324 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2325 if (cmd == NULL)
2326 return -ENOMEM;
2327
2328 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2329 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2330 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2331 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2332
2333 if (vif->bss_conf.use_cts_prot) {
2334 prot_mode = MWL8K_FRAME_PROT_11G;
2335 } else {
2336 switch (vif->bss_conf.ht_operation_mode &
2337 IEEE80211_HT_OP_MODE_PROTECTION) {
2338 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2339 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2340 break;
2341 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2342 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2343 break;
2344 default:
2345 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2346 break;
2347 }
2348 }
2349 cmd->protection_mode = cpu_to_le16(prot_mode);
2350
2351 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2352
2353 rc = mwl8k_post_cmd(hw, &cmd->header);
2354 kfree(cmd);
2355
2356 return rc;
2357 }
2358
2359 /*
2360 * CMD_SET_RATE.
2361 */
2362 struct mwl8k_cmd_set_rate {
2363 struct mwl8k_cmd_pkt header;
2364 __u8 legacy_rates[14];
2365
2366 /* Bitmap for supported MCS codes. */
2367 __u8 mcs_set[16];
2368 __u8 reserved[16];
2369 } __attribute__((packed));
2370
2371 static int
2372 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2373 u32 legacy_rate_mask, u8 *mcs_rates)
2374 {
2375 struct mwl8k_cmd_set_rate *cmd;
2376 int rc;
2377
2378 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2379 if (cmd == NULL)
2380 return -ENOMEM;
2381
2382 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2383 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2384 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2385 memcpy(cmd->mcs_set, mcs_rates, 16);
2386
2387 rc = mwl8k_post_cmd(hw, &cmd->header);
2388 kfree(cmd);
2389
2390 return rc;
2391 }
2392
2393 /*
2394 * CMD_FINALIZE_JOIN.
2395 */
2396 #define MWL8K_FJ_BEACON_MAXLEN 128
2397
2398 struct mwl8k_cmd_finalize_join {
2399 struct mwl8k_cmd_pkt header;
2400 __le32 sleep_interval; /* Number of beacon periods to sleep */
2401 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2402 } __attribute__((packed));
2403
2404 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2405 int framelen, int dtim)
2406 {
2407 struct mwl8k_cmd_finalize_join *cmd;
2408 struct ieee80211_mgmt *payload = frame;
2409 int payload_len;
2410 int rc;
2411
2412 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2413 if (cmd == NULL)
2414 return -ENOMEM;
2415
2416 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2417 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2418 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2419
2420 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2421 if (payload_len < 0)
2422 payload_len = 0;
2423 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2424 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2425
2426 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2427
2428 rc = mwl8k_post_cmd(hw, &cmd->header);
2429 kfree(cmd);
2430
2431 return rc;
2432 }
2433
2434 /*
2435 * CMD_SET_RTS_THRESHOLD.
2436 */
2437 struct mwl8k_cmd_set_rts_threshold {
2438 struct mwl8k_cmd_pkt header;
2439 __le16 action;
2440 __le16 threshold;
2441 } __attribute__((packed));
2442
2443 static int
2444 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2445 {
2446 struct mwl8k_cmd_set_rts_threshold *cmd;
2447 int rc;
2448
2449 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2450 if (cmd == NULL)
2451 return -ENOMEM;
2452
2453 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2454 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2455 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2456 cmd->threshold = cpu_to_le16(rts_thresh);
2457
2458 rc = mwl8k_post_cmd(hw, &cmd->header);
2459 kfree(cmd);
2460
2461 return rc;
2462 }
2463
2464 /*
2465 * CMD_SET_SLOT.
2466 */
2467 struct mwl8k_cmd_set_slot {
2468 struct mwl8k_cmd_pkt header;
2469 __le16 action;
2470 __u8 short_slot;
2471 } __attribute__((packed));
2472
2473 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2474 {
2475 struct mwl8k_cmd_set_slot *cmd;
2476 int rc;
2477
2478 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2479 if (cmd == NULL)
2480 return -ENOMEM;
2481
2482 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2483 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2484 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2485 cmd->short_slot = short_slot_time;
2486
2487 rc = mwl8k_post_cmd(hw, &cmd->header);
2488 kfree(cmd);
2489
2490 return rc;
2491 }
2492
2493 /*
2494 * CMD_SET_EDCA_PARAMS.
2495 */
2496 struct mwl8k_cmd_set_edca_params {
2497 struct mwl8k_cmd_pkt header;
2498
2499 /* See MWL8K_SET_EDCA_XXX below */
2500 __le16 action;
2501
2502 /* TX opportunity in units of 32 us */
2503 __le16 txop;
2504
2505 union {
2506 struct {
2507 /* Log exponent of max contention period: 0...15 */
2508 __le32 log_cw_max;
2509
2510 /* Log exponent of min contention period: 0...15 */
2511 __le32 log_cw_min;
2512
2513 /* Adaptive interframe spacing in units of 32us */
2514 __u8 aifs;
2515
2516 /* TX queue to configure */
2517 __u8 txq;
2518 } ap;
2519 struct {
2520 /* Log exponent of max contention period: 0...15 */
2521 __u8 log_cw_max;
2522
2523 /* Log exponent of min contention period: 0...15 */
2524 __u8 log_cw_min;
2525
2526 /* Adaptive interframe spacing in units of 32us */
2527 __u8 aifs;
2528
2529 /* TX queue to configure */
2530 __u8 txq;
2531 } sta;
2532 };
2533 } __attribute__((packed));
2534
2535 #define MWL8K_SET_EDCA_CW 0x01
2536 #define MWL8K_SET_EDCA_TXOP 0x02
2537 #define MWL8K_SET_EDCA_AIFS 0x04
2538
2539 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2540 MWL8K_SET_EDCA_TXOP | \
2541 MWL8K_SET_EDCA_AIFS)
2542
2543 static int
2544 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2545 __u16 cw_min, __u16 cw_max,
2546 __u8 aifs, __u16 txop)
2547 {
2548 struct mwl8k_priv *priv = hw->priv;
2549 struct mwl8k_cmd_set_edca_params *cmd;
2550 int rc;
2551
2552 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2553 if (cmd == NULL)
2554 return -ENOMEM;
2555
2556 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2557 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2558 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2559 cmd->txop = cpu_to_le16(txop);
2560 if (priv->ap_fw) {
2561 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2562 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2563 cmd->ap.aifs = aifs;
2564 cmd->ap.txq = qnum;
2565 } else {
2566 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2567 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2568 cmd->sta.aifs = aifs;
2569 cmd->sta.txq = qnum;
2570 }
2571
2572 rc = mwl8k_post_cmd(hw, &cmd->header);
2573 kfree(cmd);
2574
2575 return rc;
2576 }
2577
2578 /*
2579 * CMD_SET_WMM_MODE.
2580 */
2581 struct mwl8k_cmd_set_wmm_mode {
2582 struct mwl8k_cmd_pkt header;
2583 __le16 action;
2584 } __attribute__((packed));
2585
2586 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2587 {
2588 struct mwl8k_priv *priv = hw->priv;
2589 struct mwl8k_cmd_set_wmm_mode *cmd;
2590 int rc;
2591
2592 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2593 if (cmd == NULL)
2594 return -ENOMEM;
2595
2596 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2597 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2598 cmd->action = cpu_to_le16(!!enable);
2599
2600 rc = mwl8k_post_cmd(hw, &cmd->header);
2601 kfree(cmd);
2602
2603 if (!rc)
2604 priv->wmm_enabled = enable;
2605
2606 return rc;
2607 }
2608
2609 /*
2610 * CMD_MIMO_CONFIG.
2611 */
2612 struct mwl8k_cmd_mimo_config {
2613 struct mwl8k_cmd_pkt header;
2614 __le32 action;
2615 __u8 rx_antenna_map;
2616 __u8 tx_antenna_map;
2617 } __attribute__((packed));
2618
2619 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2620 {
2621 struct mwl8k_cmd_mimo_config *cmd;
2622 int rc;
2623
2624 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2625 if (cmd == NULL)
2626 return -ENOMEM;
2627
2628 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2629 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2630 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2631 cmd->rx_antenna_map = rx;
2632 cmd->tx_antenna_map = tx;
2633
2634 rc = mwl8k_post_cmd(hw, &cmd->header);
2635 kfree(cmd);
2636
2637 return rc;
2638 }
2639
2640 /*
2641 * CMD_USE_FIXED_RATE (STA version).
2642 */
2643 struct mwl8k_cmd_use_fixed_rate_sta {
2644 struct mwl8k_cmd_pkt header;
2645 __le32 action;
2646 __le32 allow_rate_drop;
2647 __le32 num_rates;
2648 struct {
2649 __le32 is_ht_rate;
2650 __le32 enable_retry;
2651 __le32 rate;
2652 __le32 retry_count;
2653 } rate_entry[8];
2654 __le32 rate_type;
2655 __le32 reserved1;
2656 __le32 reserved2;
2657 } __attribute__((packed));
2658
2659 #define MWL8K_USE_AUTO_RATE 0x0002
2660 #define MWL8K_UCAST_RATE 0
2661
2662 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2663 {
2664 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2665 int rc;
2666
2667 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2668 if (cmd == NULL)
2669 return -ENOMEM;
2670
2671 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2672 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2673 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2674 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2675
2676 rc = mwl8k_post_cmd(hw, &cmd->header);
2677 kfree(cmd);
2678
2679 return rc;
2680 }
2681
2682 /*
2683 * CMD_USE_FIXED_RATE (AP version).
2684 */
2685 struct mwl8k_cmd_use_fixed_rate_ap {
2686 struct mwl8k_cmd_pkt header;
2687 __le32 action;
2688 __le32 allow_rate_drop;
2689 __le32 num_rates;
2690 struct mwl8k_rate_entry_ap {
2691 __le32 is_ht_rate;
2692 __le32 enable_retry;
2693 __le32 rate;
2694 __le32 retry_count;
2695 } rate_entry[4];
2696 u8 multicast_rate;
2697 u8 multicast_rate_type;
2698 u8 management_rate;
2699 } __attribute__((packed));
2700
2701 static int
2702 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2703 {
2704 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2705 int rc;
2706
2707 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2708 if (cmd == NULL)
2709 return -ENOMEM;
2710
2711 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2712 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2713 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2714 cmd->multicast_rate = mcast;
2715 cmd->management_rate = mgmt;
2716
2717 rc = mwl8k_post_cmd(hw, &cmd->header);
2718 kfree(cmd);
2719
2720 return rc;
2721 }
2722
2723 /*
2724 * CMD_ENABLE_SNIFFER.
2725 */
2726 struct mwl8k_cmd_enable_sniffer {
2727 struct mwl8k_cmd_pkt header;
2728 __le32 action;
2729 } __attribute__((packed));
2730
2731 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2732 {
2733 struct mwl8k_cmd_enable_sniffer *cmd;
2734 int rc;
2735
2736 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2737 if (cmd == NULL)
2738 return -ENOMEM;
2739
2740 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2741 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2742 cmd->action = cpu_to_le32(!!enable);
2743
2744 rc = mwl8k_post_cmd(hw, &cmd->header);
2745 kfree(cmd);
2746
2747 return rc;
2748 }
2749
2750 /*
2751 * CMD_SET_MAC_ADDR.
2752 */
2753 struct mwl8k_cmd_set_mac_addr {
2754 struct mwl8k_cmd_pkt header;
2755 union {
2756 struct {
2757 __le16 mac_type;
2758 __u8 mac_addr[ETH_ALEN];
2759 } mbss;
2760 __u8 mac_addr[ETH_ALEN];
2761 };
2762 } __attribute__((packed));
2763
2764 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2765 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2766 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2767 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
2768
2769 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2770 struct ieee80211_vif *vif, u8 *mac)
2771 {
2772 struct mwl8k_priv *priv = hw->priv;
2773 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2774 struct mwl8k_cmd_set_mac_addr *cmd;
2775 int mac_type;
2776 int rc;
2777
2778 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2779 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2780 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2781 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2782 else
2783 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2784 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2785 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2786 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2787 else
2788 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2789 }
2790
2791 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2792 if (cmd == NULL)
2793 return -ENOMEM;
2794
2795 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2796 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2797 if (priv->ap_fw) {
2798 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2799 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2800 } else {
2801 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2802 }
2803
2804 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2805 kfree(cmd);
2806
2807 return rc;
2808 }
2809
2810 /*
2811 * CMD_SET_RATEADAPT_MODE.
2812 */
2813 struct mwl8k_cmd_set_rate_adapt_mode {
2814 struct mwl8k_cmd_pkt header;
2815 __le16 action;
2816 __le16 mode;
2817 } __attribute__((packed));
2818
2819 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2820 {
2821 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2822 int rc;
2823
2824 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2825 if (cmd == NULL)
2826 return -ENOMEM;
2827
2828 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2829 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2830 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2831 cmd->mode = cpu_to_le16(mode);
2832
2833 rc = mwl8k_post_cmd(hw, &cmd->header);
2834 kfree(cmd);
2835
2836 return rc;
2837 }
2838
2839 /*
2840 * CMD_BSS_START.
2841 */
2842 struct mwl8k_cmd_bss_start {
2843 struct mwl8k_cmd_pkt header;
2844 __le32 enable;
2845 } __attribute__((packed));
2846
2847 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2848 struct ieee80211_vif *vif, int enable)
2849 {
2850 struct mwl8k_cmd_bss_start *cmd;
2851 int rc;
2852
2853 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2854 if (cmd == NULL)
2855 return -ENOMEM;
2856
2857 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2858 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2859 cmd->enable = cpu_to_le32(enable);
2860
2861 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2862 kfree(cmd);
2863
2864 return rc;
2865 }
2866
2867 /*
2868 * CMD_SET_NEW_STN.
2869 */
2870 struct mwl8k_cmd_set_new_stn {
2871 struct mwl8k_cmd_pkt header;
2872 __le16 aid;
2873 __u8 mac_addr[6];
2874 __le16 stn_id;
2875 __le16 action;
2876 __le16 rsvd;
2877 __le32 legacy_rates;
2878 __u8 ht_rates[4];
2879 __le16 cap_info;
2880 __le16 ht_capabilities_info;
2881 __u8 mac_ht_param_info;
2882 __u8 rev;
2883 __u8 control_channel;
2884 __u8 add_channel;
2885 __le16 op_mode;
2886 __le16 stbc;
2887 __u8 add_qos_info;
2888 __u8 is_qos_sta;
2889 __le32 fw_sta_ptr;
2890 } __attribute__((packed));
2891
2892 #define MWL8K_STA_ACTION_ADD 0
2893 #define MWL8K_STA_ACTION_REMOVE 2
2894
2895 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2896 struct ieee80211_vif *vif,
2897 struct ieee80211_sta *sta)
2898 {
2899 struct mwl8k_cmd_set_new_stn *cmd;
2900 u32 rates;
2901 int rc;
2902
2903 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2904 if (cmd == NULL)
2905 return -ENOMEM;
2906
2907 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2908 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2909 cmd->aid = cpu_to_le16(sta->aid);
2910 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2911 cmd->stn_id = cpu_to_le16(sta->aid);
2912 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2913 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
2914 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
2915 else
2916 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
2917 cmd->legacy_rates = cpu_to_le32(rates);
2918 if (sta->ht_cap.ht_supported) {
2919 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2920 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2921 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2922 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2923 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2924 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2925 ((sta->ht_cap.ampdu_density & 7) << 2);
2926 cmd->is_qos_sta = 1;
2927 }
2928
2929 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2930 kfree(cmd);
2931
2932 return rc;
2933 }
2934
2935 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2936 struct ieee80211_vif *vif)
2937 {
2938 struct mwl8k_cmd_set_new_stn *cmd;
2939 int rc;
2940
2941 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2942 if (cmd == NULL)
2943 return -ENOMEM;
2944
2945 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2946 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2947 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2948
2949 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2950 kfree(cmd);
2951
2952 return rc;
2953 }
2954
2955 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2956 struct ieee80211_vif *vif, u8 *addr)
2957 {
2958 struct mwl8k_cmd_set_new_stn *cmd;
2959 int rc;
2960
2961 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2962 if (cmd == NULL)
2963 return -ENOMEM;
2964
2965 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2966 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2967 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2968 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2969
2970 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2971 kfree(cmd);
2972
2973 return rc;
2974 }
2975
2976 /*
2977 * CMD_UPDATE_STADB.
2978 */
2979 struct ewc_ht_info {
2980 __le16 control1;
2981 __le16 control2;
2982 __le16 control3;
2983 } __attribute__((packed));
2984
2985 struct peer_capability_info {
2986 /* Peer type - AP vs. STA. */
2987 __u8 peer_type;
2988
2989 /* Basic 802.11 capabilities from assoc resp. */
2990 __le16 basic_caps;
2991
2992 /* Set if peer supports 802.11n high throughput (HT). */
2993 __u8 ht_support;
2994
2995 /* Valid if HT is supported. */
2996 __le16 ht_caps;
2997 __u8 extended_ht_caps;
2998 struct ewc_ht_info ewc_info;
2999
3000 /* Legacy rate table. Intersection of our rates and peer rates. */
3001 __u8 legacy_rates[12];
3002
3003 /* HT rate table. Intersection of our rates and peer rates. */
3004 __u8 ht_rates[16];
3005 __u8 pad[16];
3006
3007 /* If set, interoperability mode, no proprietary extensions. */
3008 __u8 interop;
3009 __u8 pad2;
3010 __u8 station_id;
3011 __le16 amsdu_enabled;
3012 } __attribute__((packed));
3013
3014 struct mwl8k_cmd_update_stadb {
3015 struct mwl8k_cmd_pkt header;
3016
3017 /* See STADB_ACTION_TYPE */
3018 __le32 action;
3019
3020 /* Peer MAC address */
3021 __u8 peer_addr[ETH_ALEN];
3022
3023 __le32 reserved;
3024
3025 /* Peer info - valid during add/update. */
3026 struct peer_capability_info peer_info;
3027 } __attribute__((packed));
3028
3029 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3030 #define MWL8K_STA_DB_DEL_ENTRY 2
3031
3032 /* Peer Entry flags - used to define the type of the peer node */
3033 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3034
3035 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3036 struct ieee80211_vif *vif,
3037 struct ieee80211_sta *sta)
3038 {
3039 struct mwl8k_cmd_update_stadb *cmd;
3040 struct peer_capability_info *p;
3041 u32 rates;
3042 int rc;
3043
3044 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3045 if (cmd == NULL)
3046 return -ENOMEM;
3047
3048 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3049 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3050 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3051 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3052
3053 p = &cmd->peer_info;
3054 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3055 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3056 p->ht_support = sta->ht_cap.ht_supported;
3057 p->ht_caps = sta->ht_cap.cap;
3058 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3059 ((sta->ht_cap.ampdu_density & 7) << 2);
3060 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3061 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3062 else
3063 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3064 legacy_rate_mask_to_array(p->legacy_rates, rates);
3065 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3066 p->interop = 1;
3067 p->amsdu_enabled = 0;
3068
3069 rc = mwl8k_post_cmd(hw, &cmd->header);
3070 kfree(cmd);
3071
3072 return rc ? rc : p->station_id;
3073 }
3074
3075 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3076 struct ieee80211_vif *vif, u8 *addr)
3077 {
3078 struct mwl8k_cmd_update_stadb *cmd;
3079 int rc;
3080
3081 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3082 if (cmd == NULL)
3083 return -ENOMEM;
3084
3085 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3086 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3087 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3088 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3089
3090 rc = mwl8k_post_cmd(hw, &cmd->header);
3091 kfree(cmd);
3092
3093 return rc;
3094 }
3095
3096
3097 /*
3098 * Interrupt handling.
3099 */
3100 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3101 {
3102 struct ieee80211_hw *hw = dev_id;
3103 struct mwl8k_priv *priv = hw->priv;
3104 u32 status;
3105
3106 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3107 if (!status)
3108 return IRQ_NONE;
3109
3110 if (status & MWL8K_A2H_INT_TX_DONE) {
3111 status &= ~MWL8K_A2H_INT_TX_DONE;
3112 tasklet_schedule(&priv->poll_tx_task);
3113 }
3114
3115 if (status & MWL8K_A2H_INT_RX_READY) {
3116 status &= ~MWL8K_A2H_INT_RX_READY;
3117 tasklet_schedule(&priv->poll_rx_task);
3118 }
3119
3120 if (status)
3121 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3122
3123 if (status & MWL8K_A2H_INT_OPC_DONE) {
3124 if (priv->hostcmd_wait != NULL)
3125 complete(priv->hostcmd_wait);
3126 }
3127
3128 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3129 if (!mutex_is_locked(&priv->fw_mutex) &&
3130 priv->radio_on && priv->pending_tx_pkts)
3131 mwl8k_tx_start(priv);
3132 }
3133
3134 return IRQ_HANDLED;
3135 }
3136
3137 static void mwl8k_tx_poll(unsigned long data)
3138 {
3139 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3140 struct mwl8k_priv *priv = hw->priv;
3141 int limit;
3142 int i;
3143
3144 limit = 32;
3145
3146 spin_lock_bh(&priv->tx_lock);
3147
3148 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3149 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3150
3151 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3152 complete(priv->tx_wait);
3153 priv->tx_wait = NULL;
3154 }
3155
3156 spin_unlock_bh(&priv->tx_lock);
3157
3158 if (limit) {
3159 writel(~MWL8K_A2H_INT_TX_DONE,
3160 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3161 } else {
3162 tasklet_schedule(&priv->poll_tx_task);
3163 }
3164 }
3165
3166 static void mwl8k_rx_poll(unsigned long data)
3167 {
3168 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3169 struct mwl8k_priv *priv = hw->priv;
3170 int limit;
3171
3172 limit = 32;
3173 limit -= rxq_process(hw, 0, limit);
3174 limit -= rxq_refill(hw, 0, limit);
3175
3176 if (limit) {
3177 writel(~MWL8K_A2H_INT_RX_READY,
3178 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3179 } else {
3180 tasklet_schedule(&priv->poll_rx_task);
3181 }
3182 }
3183
3184
3185 /*
3186 * Core driver operations.
3187 */
3188 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3189 {
3190 struct mwl8k_priv *priv = hw->priv;
3191 int index = skb_get_queue_mapping(skb);
3192 int rc;
3193
3194 if (!priv->radio_on) {
3195 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3196 "disabled\n", wiphy_name(hw->wiphy));
3197 dev_kfree_skb(skb);
3198 return NETDEV_TX_OK;
3199 }
3200
3201 rc = mwl8k_txq_xmit(hw, index, skb);
3202
3203 return rc;
3204 }
3205
3206 static int mwl8k_start(struct ieee80211_hw *hw)
3207 {
3208 struct mwl8k_priv *priv = hw->priv;
3209 int rc;
3210
3211 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3212 IRQF_SHARED, MWL8K_NAME, hw);
3213 if (rc) {
3214 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3215 wiphy_name(hw->wiphy));
3216 return -EIO;
3217 }
3218
3219 /* Enable TX reclaim and RX tasklets. */
3220 tasklet_enable(&priv->poll_tx_task);
3221 tasklet_enable(&priv->poll_rx_task);
3222
3223 /* Enable interrupts */
3224 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3225
3226 rc = mwl8k_fw_lock(hw);
3227 if (!rc) {
3228 rc = mwl8k_cmd_radio_enable(hw);
3229
3230 if (!priv->ap_fw) {
3231 if (!rc)
3232 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3233
3234 if (!rc)
3235 rc = mwl8k_cmd_set_pre_scan(hw);
3236
3237 if (!rc)
3238 rc = mwl8k_cmd_set_post_scan(hw,
3239 "\x00\x00\x00\x00\x00\x00");
3240 }
3241
3242 if (!rc)
3243 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3244
3245 if (!rc)
3246 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3247
3248 mwl8k_fw_unlock(hw);
3249 }
3250
3251 if (rc) {
3252 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3253 free_irq(priv->pdev->irq, hw);
3254 tasklet_disable(&priv->poll_tx_task);
3255 tasklet_disable(&priv->poll_rx_task);
3256 }
3257
3258 return rc;
3259 }
3260
3261 static void mwl8k_stop(struct ieee80211_hw *hw)
3262 {
3263 struct mwl8k_priv *priv = hw->priv;
3264 int i;
3265
3266 mwl8k_cmd_radio_disable(hw);
3267
3268 ieee80211_stop_queues(hw);
3269
3270 /* Disable interrupts */
3271 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3272 free_irq(priv->pdev->irq, hw);
3273
3274 /* Stop finalize join worker */
3275 cancel_work_sync(&priv->finalize_join_worker);
3276 if (priv->beacon_skb != NULL)
3277 dev_kfree_skb(priv->beacon_skb);
3278
3279 /* Stop TX reclaim and RX tasklets. */
3280 tasklet_disable(&priv->poll_tx_task);
3281 tasklet_disable(&priv->poll_rx_task);
3282
3283 /* Return all skbs to mac80211 */
3284 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3285 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3286 }
3287
3288 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3289 struct ieee80211_vif *vif)
3290 {
3291 struct mwl8k_priv *priv = hw->priv;
3292 struct mwl8k_vif *mwl8k_vif;
3293 u32 macids_supported;
3294 int macid;
3295
3296 /*
3297 * Reject interface creation if sniffer mode is active, as
3298 * STA operation is mutually exclusive with hardware sniffer
3299 * mode. (Sniffer mode is only used on STA firmware.)
3300 */
3301 if (priv->sniffer_enabled) {
3302 printk(KERN_INFO "%s: unable to create STA "
3303 "interface due to sniffer mode being enabled\n",
3304 wiphy_name(hw->wiphy));
3305 return -EINVAL;
3306 }
3307
3308
3309 switch (vif->type) {
3310 case NL80211_IFTYPE_AP:
3311 macids_supported = priv->ap_macids_supported;
3312 break;
3313 case NL80211_IFTYPE_STATION:
3314 macids_supported = priv->sta_macids_supported;
3315 break;
3316 default:
3317 return -EINVAL;
3318 }
3319
3320 macid = ffs(macids_supported & ~priv->macids_used);
3321 if (!macid--)
3322 return -EBUSY;
3323
3324 /* Setup driver private area. */
3325 mwl8k_vif = MWL8K_VIF(vif);
3326 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3327 mwl8k_vif->vif = vif;
3328 mwl8k_vif->macid = macid;
3329 mwl8k_vif->seqno = 0;
3330
3331 /* Set the mac address. */
3332 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3333
3334 if (priv->ap_fw)
3335 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3336
3337 priv->macids_used |= 1 << mwl8k_vif->macid;
3338 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3339
3340 return 0;
3341 }
3342
3343 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3344 struct ieee80211_vif *vif)
3345 {
3346 struct mwl8k_priv *priv = hw->priv;
3347 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3348
3349 if (priv->ap_fw)
3350 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3351
3352 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3353
3354 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3355 list_del(&mwl8k_vif->list);
3356 }
3357
3358 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3359 {
3360 struct ieee80211_conf *conf = &hw->conf;
3361 struct mwl8k_priv *priv = hw->priv;
3362 int rc;
3363
3364 if (conf->flags & IEEE80211_CONF_IDLE) {
3365 mwl8k_cmd_radio_disable(hw);
3366 return 0;
3367 }
3368
3369 rc = mwl8k_fw_lock(hw);
3370 if (rc)
3371 return rc;
3372
3373 rc = mwl8k_cmd_radio_enable(hw);
3374 if (rc)
3375 goto out;
3376
3377 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3378 if (rc)
3379 goto out;
3380
3381 if (conf->power_level > 18)
3382 conf->power_level = 18;
3383 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3384 if (rc)
3385 goto out;
3386
3387 if (priv->ap_fw) {
3388 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3389 if (!rc)
3390 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3391 } else {
3392 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3393 }
3394
3395 out:
3396 mwl8k_fw_unlock(hw);
3397
3398 return rc;
3399 }
3400
3401 static void
3402 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3403 struct ieee80211_bss_conf *info, u32 changed)
3404 {
3405 struct mwl8k_priv *priv = hw->priv;
3406 u32 ap_legacy_rates;
3407 u8 ap_mcs_rates[16];
3408 int rc;
3409
3410 if (mwl8k_fw_lock(hw))
3411 return;
3412
3413 /*
3414 * No need to capture a beacon if we're no longer associated.
3415 */
3416 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3417 priv->capture_beacon = false;
3418
3419 /*
3420 * Get the AP's legacy and MCS rates.
3421 */
3422 if (vif->bss_conf.assoc) {
3423 struct ieee80211_sta *ap;
3424
3425 rcu_read_lock();
3426
3427 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3428 if (ap == NULL) {
3429 rcu_read_unlock();
3430 goto out;
3431 }
3432
3433 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3434 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3435 } else {
3436 ap_legacy_rates =
3437 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3438 }
3439 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3440
3441 rcu_read_unlock();
3442 }
3443
3444 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3445 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3446 if (rc)
3447 goto out;
3448
3449 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3450 if (rc)
3451 goto out;
3452 }
3453
3454 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3455 rc = mwl8k_set_radio_preamble(hw,
3456 vif->bss_conf.use_short_preamble);
3457 if (rc)
3458 goto out;
3459 }
3460
3461 if (changed & BSS_CHANGED_ERP_SLOT) {
3462 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3463 if (rc)
3464 goto out;
3465 }
3466
3467 if (vif->bss_conf.assoc &&
3468 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3469 BSS_CHANGED_HT))) {
3470 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3471 if (rc)
3472 goto out;
3473 }
3474
3475 if (vif->bss_conf.assoc &&
3476 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3477 /*
3478 * Finalize the join. Tell rx handler to process
3479 * next beacon from our BSSID.
3480 */
3481 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3482 priv->capture_beacon = true;
3483 }
3484
3485 out:
3486 mwl8k_fw_unlock(hw);
3487 }
3488
3489 static void
3490 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3491 struct ieee80211_bss_conf *info, u32 changed)
3492 {
3493 int rc;
3494
3495 if (mwl8k_fw_lock(hw))
3496 return;
3497
3498 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3499 rc = mwl8k_set_radio_preamble(hw,
3500 vif->bss_conf.use_short_preamble);
3501 if (rc)
3502 goto out;
3503 }
3504
3505 if (changed & BSS_CHANGED_BASIC_RATES) {
3506 int idx;
3507 int rate;
3508
3509 /*
3510 * Use lowest supported basic rate for multicasts
3511 * and management frames (such as probe responses --
3512 * beacons will always go out at 1 Mb/s).
3513 */
3514 idx = ffs(vif->bss_conf.basic_rates);
3515 if (idx)
3516 idx--;
3517
3518 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3519 rate = mwl8k_rates_24[idx].hw_value;
3520 else
3521 rate = mwl8k_rates_50[idx].hw_value;
3522
3523 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3524 }
3525
3526 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3527 struct sk_buff *skb;
3528
3529 skb = ieee80211_beacon_get(hw, vif);
3530 if (skb != NULL) {
3531 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3532 kfree_skb(skb);
3533 }
3534 }
3535
3536 if (changed & BSS_CHANGED_BEACON_ENABLED)
3537 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3538
3539 out:
3540 mwl8k_fw_unlock(hw);
3541 }
3542
3543 static void
3544 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3545 struct ieee80211_bss_conf *info, u32 changed)
3546 {
3547 struct mwl8k_priv *priv = hw->priv;
3548
3549 if (!priv->ap_fw)
3550 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3551 else
3552 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3553 }
3554
3555 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3556 int mc_count, struct dev_addr_list *mclist)
3557 {
3558 struct mwl8k_cmd_pkt *cmd;
3559
3560 /*
3561 * Synthesize and return a command packet that programs the
3562 * hardware multicast address filter. At this point we don't
3563 * know whether FIF_ALLMULTI is being requested, but if it is,
3564 * we'll end up throwing this packet away and creating a new
3565 * one in mwl8k_configure_filter().
3566 */
3567 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3568
3569 return (unsigned long)cmd;
3570 }
3571
3572 static int
3573 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3574 unsigned int changed_flags,
3575 unsigned int *total_flags)
3576 {
3577 struct mwl8k_priv *priv = hw->priv;
3578
3579 /*
3580 * Hardware sniffer mode is mutually exclusive with STA
3581 * operation, so refuse to enable sniffer mode if a STA
3582 * interface is active.
3583 */
3584 if (!list_empty(&priv->vif_list)) {
3585 if (net_ratelimit())
3586 printk(KERN_INFO "%s: not enabling sniffer "
3587 "mode because STA interface is active\n",
3588 wiphy_name(hw->wiphy));
3589 return 0;
3590 }
3591
3592 if (!priv->sniffer_enabled) {
3593 if (mwl8k_cmd_enable_sniffer(hw, 1))
3594 return 0;
3595 priv->sniffer_enabled = true;
3596 }
3597
3598 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3599 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3600 FIF_OTHER_BSS;
3601
3602 return 1;
3603 }
3604
3605 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3606 {
3607 if (!list_empty(&priv->vif_list))
3608 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3609
3610 return NULL;
3611 }
3612
3613 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3614 unsigned int changed_flags,
3615 unsigned int *total_flags,
3616 u64 multicast)
3617 {
3618 struct mwl8k_priv *priv = hw->priv;
3619 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3620
3621 /*
3622 * AP firmware doesn't allow fine-grained control over
3623 * the receive filter.
3624 */
3625 if (priv->ap_fw) {
3626 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3627 kfree(cmd);
3628 return;
3629 }
3630
3631 /*
3632 * Enable hardware sniffer mode if FIF_CONTROL or
3633 * FIF_OTHER_BSS is requested.
3634 */
3635 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3636 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3637 kfree(cmd);
3638 return;
3639 }
3640
3641 /* Clear unsupported feature flags */
3642 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3643
3644 if (mwl8k_fw_lock(hw)) {
3645 kfree(cmd);
3646 return;
3647 }
3648
3649 if (priv->sniffer_enabled) {
3650 mwl8k_cmd_enable_sniffer(hw, 0);
3651 priv->sniffer_enabled = false;
3652 }
3653
3654 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3655 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3656 /*
3657 * Disable the BSS filter.
3658 */
3659 mwl8k_cmd_set_pre_scan(hw);
3660 } else {
3661 struct mwl8k_vif *mwl8k_vif;
3662 const u8 *bssid;
3663
3664 /*
3665 * Enable the BSS filter.
3666 *
3667 * If there is an active STA interface, use that
3668 * interface's BSSID, otherwise use a dummy one
3669 * (where the OUI part needs to be nonzero for
3670 * the BSSID to be accepted by POST_SCAN).
3671 */
3672 mwl8k_vif = mwl8k_first_vif(priv);
3673 if (mwl8k_vif != NULL)
3674 bssid = mwl8k_vif->vif->bss_conf.bssid;
3675 else
3676 bssid = "\x01\x00\x00\x00\x00\x00";
3677
3678 mwl8k_cmd_set_post_scan(hw, bssid);
3679 }
3680 }
3681
3682 /*
3683 * If FIF_ALLMULTI is being requested, throw away the command
3684 * packet that ->prepare_multicast() built and replace it with
3685 * a command packet that enables reception of all multicast
3686 * packets.
3687 */
3688 if (*total_flags & FIF_ALLMULTI) {
3689 kfree(cmd);
3690 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3691 }
3692
3693 if (cmd != NULL) {
3694 mwl8k_post_cmd(hw, cmd);
3695 kfree(cmd);
3696 }
3697
3698 mwl8k_fw_unlock(hw);
3699 }
3700
3701 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3702 {
3703 return mwl8k_cmd_set_rts_threshold(hw, value);
3704 }
3705
3706 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3707 struct ieee80211_vif *vif,
3708 struct ieee80211_sta *sta)
3709 {
3710 struct mwl8k_priv *priv = hw->priv;
3711
3712 if (priv->ap_fw)
3713 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3714 else
3715 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3716 }
3717
3718 static int mwl8k_sta_add(struct ieee80211_hw *hw,
3719 struct ieee80211_vif *vif,
3720 struct ieee80211_sta *sta)
3721 {
3722 struct mwl8k_priv *priv = hw->priv;
3723 int ret;
3724
3725 if (!priv->ap_fw) {
3726 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3727 if (ret >= 0) {
3728 MWL8K_STA(sta)->peer_id = ret;
3729 return 0;
3730 }
3731
3732 return ret;
3733 }
3734
3735 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
3736 }
3737
3738 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3739 const struct ieee80211_tx_queue_params *params)
3740 {
3741 struct mwl8k_priv *priv = hw->priv;
3742 int rc;
3743
3744 rc = mwl8k_fw_lock(hw);
3745 if (!rc) {
3746 if (!priv->wmm_enabled)
3747 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3748
3749 if (!rc)
3750 rc = mwl8k_cmd_set_edca_params(hw, queue,
3751 params->cw_min,
3752 params->cw_max,
3753 params->aifs,
3754 params->txop);
3755
3756 mwl8k_fw_unlock(hw);
3757 }
3758
3759 return rc;
3760 }
3761
3762 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3763 struct ieee80211_low_level_stats *stats)
3764 {
3765 return mwl8k_cmd_get_stat(hw, stats);
3766 }
3767
3768 static int
3769 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3770 enum ieee80211_ampdu_mlme_action action,
3771 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3772 {
3773 switch (action) {
3774 case IEEE80211_AMPDU_RX_START:
3775 case IEEE80211_AMPDU_RX_STOP:
3776 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3777 return -ENOTSUPP;
3778 return 0;
3779 default:
3780 return -ENOTSUPP;
3781 }
3782 }
3783
3784 static const struct ieee80211_ops mwl8k_ops = {
3785 .tx = mwl8k_tx,
3786 .start = mwl8k_start,
3787 .stop = mwl8k_stop,
3788 .add_interface = mwl8k_add_interface,
3789 .remove_interface = mwl8k_remove_interface,
3790 .config = mwl8k_config,
3791 .bss_info_changed = mwl8k_bss_info_changed,
3792 .prepare_multicast = mwl8k_prepare_multicast,
3793 .configure_filter = mwl8k_configure_filter,
3794 .set_rts_threshold = mwl8k_set_rts_threshold,
3795 .sta_add = mwl8k_sta_add,
3796 .sta_remove = mwl8k_sta_remove,
3797 .conf_tx = mwl8k_conf_tx,
3798 .get_stats = mwl8k_get_stats,
3799 .ampdu_action = mwl8k_ampdu_action,
3800 };
3801
3802 static void mwl8k_finalize_join_worker(struct work_struct *work)
3803 {
3804 struct mwl8k_priv *priv =
3805 container_of(work, struct mwl8k_priv, finalize_join_worker);
3806 struct sk_buff *skb = priv->beacon_skb;
3807 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3808 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3809 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3810 mgmt->u.beacon.variable, len);
3811 int dtim_period = 1;
3812
3813 if (tim && tim[1] >= 2)
3814 dtim_period = tim[3];
3815
3816 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
3817
3818 dev_kfree_skb(skb);
3819 priv->beacon_skb = NULL;
3820 }
3821
3822 enum {
3823 MWL8363 = 0,
3824 MWL8687,
3825 MWL8366,
3826 };
3827
3828 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3829 [MWL8363] = {
3830 .part_name = "88w8363",
3831 .helper_image = "mwl8k/helper_8363.fw",
3832 .fw_image = "mwl8k/fmimage_8363.fw",
3833 },
3834 [MWL8687] = {
3835 .part_name = "88w8687",
3836 .helper_image = "mwl8k/helper_8687.fw",
3837 .fw_image = "mwl8k/fmimage_8687.fw",
3838 },
3839 [MWL8366] = {
3840 .part_name = "88w8366",
3841 .helper_image = "mwl8k/helper_8366.fw",
3842 .fw_image = "mwl8k/fmimage_8366.fw",
3843 .ap_rxd_ops = &rxd_8366_ap_ops,
3844 },
3845 };
3846
3847 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3848 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3849 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3850 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3851 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3852 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3853
3854 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3855 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
3856 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3857 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3858 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3859 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3860 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3861 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3862 { },
3863 };
3864 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3865
3866 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3867 const struct pci_device_id *id)
3868 {
3869 static int printed_version = 0;
3870 struct ieee80211_hw *hw;
3871 struct mwl8k_priv *priv;
3872 int rc;
3873 int i;
3874
3875 if (!printed_version) {
3876 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3877 printed_version = 1;
3878 }
3879
3880
3881 rc = pci_enable_device(pdev);
3882 if (rc) {
3883 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3884 MWL8K_NAME);
3885 return rc;
3886 }
3887
3888 rc = pci_request_regions(pdev, MWL8K_NAME);
3889 if (rc) {
3890 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3891 MWL8K_NAME);
3892 goto err_disable_device;
3893 }
3894
3895 pci_set_master(pdev);
3896
3897
3898 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3899 if (hw == NULL) {
3900 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3901 rc = -ENOMEM;
3902 goto err_free_reg;
3903 }
3904
3905 SET_IEEE80211_DEV(hw, &pdev->dev);
3906 pci_set_drvdata(pdev, hw);
3907
3908 priv = hw->priv;
3909 priv->hw = hw;
3910 priv->pdev = pdev;
3911 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3912
3913
3914 priv->sram = pci_iomap(pdev, 0, 0x10000);
3915 if (priv->sram == NULL) {
3916 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3917 wiphy_name(hw->wiphy));
3918 goto err_iounmap;
3919 }
3920
3921 /*
3922 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3923 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3924 */
3925 priv->regs = pci_iomap(pdev, 1, 0x10000);
3926 if (priv->regs == NULL) {
3927 priv->regs = pci_iomap(pdev, 2, 0x10000);
3928 if (priv->regs == NULL) {
3929 printk(KERN_ERR "%s: Cannot map device registers\n",
3930 wiphy_name(hw->wiphy));
3931 goto err_iounmap;
3932 }
3933 }
3934
3935
3936 /* Reset firmware and hardware */
3937 mwl8k_hw_reset(priv);
3938
3939 /* Ask userland hotplug daemon for the device firmware */
3940 rc = mwl8k_request_firmware(priv);
3941 if (rc) {
3942 printk(KERN_ERR "%s: Firmware files not found\n",
3943 wiphy_name(hw->wiphy));
3944 goto err_stop_firmware;
3945 }
3946
3947 /* Load firmware into hardware */
3948 rc = mwl8k_load_firmware(hw);
3949 if (rc) {
3950 printk(KERN_ERR "%s: Cannot start firmware\n",
3951 wiphy_name(hw->wiphy));
3952 goto err_stop_firmware;
3953 }
3954
3955 /* Reclaim memory once firmware is successfully loaded */
3956 mwl8k_release_firmware(priv);
3957
3958
3959 if (priv->ap_fw) {
3960 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3961 if (priv->rxd_ops == NULL) {
3962 printk(KERN_ERR "%s: Driver does not have AP "
3963 "firmware image support for this hardware\n",
3964 wiphy_name(hw->wiphy));
3965 goto err_stop_firmware;
3966 }
3967 } else {
3968 priv->rxd_ops = &rxd_sta_ops;
3969 }
3970
3971 priv->sniffer_enabled = false;
3972 priv->wmm_enabled = false;
3973 priv->pending_tx_pkts = 0;
3974
3975
3976 /*
3977 * Extra headroom is the size of the required DMA header
3978 * minus the size of the smallest 802.11 frame (CTS frame).
3979 */
3980 hw->extra_tx_headroom =
3981 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3982
3983 hw->channel_change_time = 10;
3984
3985 hw->queues = MWL8K_TX_QUEUES;
3986
3987 /* Set rssi and noise values to dBm */
3988 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3989 hw->vif_data_size = sizeof(struct mwl8k_vif);
3990 hw->sta_data_size = sizeof(struct mwl8k_sta);
3991
3992 priv->macids_used = 0;
3993 INIT_LIST_HEAD(&priv->vif_list);
3994
3995 /* Set default radio state and preamble */
3996 priv->radio_on = 0;
3997 priv->radio_short_preamble = 0;
3998
3999 /* Finalize join worker */
4000 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4001
4002 /* TX reclaim and RX tasklets. */
4003 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4004 tasklet_disable(&priv->poll_tx_task);
4005 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4006 tasklet_disable(&priv->poll_rx_task);
4007
4008 /* Power management cookie */
4009 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4010 if (priv->cookie == NULL)
4011 goto err_stop_firmware;
4012
4013 rc = mwl8k_rxq_init(hw, 0);
4014 if (rc)
4015 goto err_free_cookie;
4016 rxq_refill(hw, 0, INT_MAX);
4017
4018 mutex_init(&priv->fw_mutex);
4019 priv->fw_mutex_owner = NULL;
4020 priv->fw_mutex_depth = 0;
4021 priv->hostcmd_wait = NULL;
4022
4023 spin_lock_init(&priv->tx_lock);
4024
4025 priv->tx_wait = NULL;
4026
4027 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4028 rc = mwl8k_txq_init(hw, i);
4029 if (rc)
4030 goto err_free_queues;
4031 }
4032
4033 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4034 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4035 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4036 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4037 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4038
4039 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4040 IRQF_SHARED, MWL8K_NAME, hw);
4041 if (rc) {
4042 printk(KERN_ERR "%s: failed to register IRQ handler\n",
4043 wiphy_name(hw->wiphy));
4044 goto err_free_queues;
4045 }
4046
4047 /*
4048 * Temporarily enable interrupts. Initial firmware host
4049 * commands use interrupts and avoid polling. Disable
4050 * interrupts when done.
4051 */
4052 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4053
4054 /* Get config data, mac addrs etc */
4055 if (priv->ap_fw) {
4056 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4057 if (!rc)
4058 rc = mwl8k_cmd_set_hw_spec(hw);
4059 } else {
4060 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4061 }
4062 if (rc) {
4063 printk(KERN_ERR "%s: Cannot initialise firmware\n",
4064 wiphy_name(hw->wiphy));
4065 goto err_free_irq;
4066 }
4067
4068 hw->wiphy->interface_modes = 0;
4069 if (priv->ap_macids_supported)
4070 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4071 if (priv->sta_macids_supported)
4072 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4073
4074
4075 /* Turn radio off */
4076 rc = mwl8k_cmd_radio_disable(hw);
4077 if (rc) {
4078 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
4079 goto err_free_irq;
4080 }
4081
4082 /* Clear MAC address */
4083 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4084 if (rc) {
4085 printk(KERN_ERR "%s: Cannot clear MAC address\n",
4086 wiphy_name(hw->wiphy));
4087 goto err_free_irq;
4088 }
4089
4090 /* Disable interrupts */
4091 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4092 free_irq(priv->pdev->irq, hw);
4093
4094 rc = ieee80211_register_hw(hw);
4095 if (rc) {
4096 printk(KERN_ERR "%s: Cannot register device\n",
4097 wiphy_name(hw->wiphy));
4098 goto err_free_queues;
4099 }
4100
4101 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
4102 wiphy_name(hw->wiphy), priv->device_info->part_name,
4103 priv->hw_rev, hw->wiphy->perm_addr,
4104 priv->ap_fw ? "AP" : "STA",
4105 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4106 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4107
4108 return 0;
4109
4110 err_free_irq:
4111 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4112 free_irq(priv->pdev->irq, hw);
4113
4114 err_free_queues:
4115 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4116 mwl8k_txq_deinit(hw, i);
4117 mwl8k_rxq_deinit(hw, 0);
4118
4119 err_free_cookie:
4120 if (priv->cookie != NULL)
4121 pci_free_consistent(priv->pdev, 4,
4122 priv->cookie, priv->cookie_dma);
4123
4124 err_stop_firmware:
4125 mwl8k_hw_reset(priv);
4126 mwl8k_release_firmware(priv);
4127
4128 err_iounmap:
4129 if (priv->regs != NULL)
4130 pci_iounmap(pdev, priv->regs);
4131
4132 if (priv->sram != NULL)
4133 pci_iounmap(pdev, priv->sram);
4134
4135 pci_set_drvdata(pdev, NULL);
4136 ieee80211_free_hw(hw);
4137
4138 err_free_reg:
4139 pci_release_regions(pdev);
4140
4141 err_disable_device:
4142 pci_disable_device(pdev);
4143
4144 return rc;
4145 }
4146
4147 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4148 {
4149 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4150 }
4151
4152 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4153 {
4154 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4155 struct mwl8k_priv *priv;
4156 int i;
4157
4158 if (hw == NULL)
4159 return;
4160 priv = hw->priv;
4161
4162 ieee80211_stop_queues(hw);
4163
4164 ieee80211_unregister_hw(hw);
4165
4166 /* Remove TX reclaim and RX tasklets. */
4167 tasklet_kill(&priv->poll_tx_task);
4168 tasklet_kill(&priv->poll_rx_task);
4169
4170 /* Stop hardware */
4171 mwl8k_hw_reset(priv);
4172
4173 /* Return all skbs to mac80211 */
4174 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4175 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4176
4177 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4178 mwl8k_txq_deinit(hw, i);
4179
4180 mwl8k_rxq_deinit(hw, 0);
4181
4182 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4183
4184 pci_iounmap(pdev, priv->regs);
4185 pci_iounmap(pdev, priv->sram);
4186 pci_set_drvdata(pdev, NULL);
4187 ieee80211_free_hw(hw);
4188 pci_release_regions(pdev);
4189 pci_disable_device(pdev);
4190 }
4191
4192 static struct pci_driver mwl8k_driver = {
4193 .name = MWL8K_NAME,
4194 .id_table = mwl8k_pci_id_table,
4195 .probe = mwl8k_probe,
4196 .remove = __devexit_p(mwl8k_remove),
4197 .shutdown = __devexit_p(mwl8k_shutdown),
4198 };
4199
4200 static int __init mwl8k_init(void)
4201 {
4202 return pci_register_driver(&mwl8k_driver);
4203 }
4204
4205 static void __exit mwl8k_exit(void)
4206 {
4207 pci_unregister_driver(&mwl8k_driver);
4208 }
4209
4210 module_init(mwl8k_init);
4211 module_exit(mwl8k_exit);
4212
4213 MODULE_DESCRIPTION(MWL8K_DESC);
4214 MODULE_VERSION(MWL8K_VERSION);
4215 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4216 MODULE_LICENSE("GPL");
Linux with added FPC-III support