ARM: OMAP2+: Prepare to move GPMC to drivers by platform data header
[linux/fpc-iii.git] / arch / mn10300 / include / asm / dma.h
blob10b77d4628c2c1834d158b139134a4225f253c05
1 /* MN10300 ISA DMA handlers and definitions
3 * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
4 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
11 #ifndef _ASM_DMA_H
12 #define _ASM_DMA_H
14 #include <linux/spinlock.h>
15 #include <asm/io.h>
16 #include <linux/delay.h>
18 #undef MAX_DMA_CHANNELS /* switch off linux/kernel/dma.c */
19 #define MAX_DMA_ADDRESS 0xbfffffff
21 extern spinlock_t dma_spin_lock;
23 static inline unsigned long claim_dma_lock(void)
25 unsigned long flags;
26 spin_lock_irqsave(&dma_spin_lock, flags);
27 return flags;
30 static inline void release_dma_lock(unsigned long flags)
32 spin_unlock_irqrestore(&dma_spin_lock, flags);
35 /* enable/disable a specific DMA channel */
36 static inline void enable_dma(unsigned int dmanr)
40 static inline void disable_dma(unsigned int dmanr)
44 /* Clear the 'DMA Pointer Flip Flop'.
45 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
46 * Use this once to initialize the FF to a known state.
47 * After that, keep track of it. :-)
48 * --- In order to do that, the DMA routines below should ---
49 * --- only be used while holding the DMA lock ! ---
51 static inline void clear_dma_ff(unsigned int dmanr)
55 /* set mode (above) for a specific DMA channel */
56 static inline void set_dma_mode(unsigned int dmanr, char mode)
60 /* Set only the page register bits of the transfer address.
61 * This is used for successive transfers when we know the contents of
62 * the lower 16 bits of the DMA current address register, but a 64k boundary
63 * may have been crossed.
65 static inline void set_dma_page(unsigned int dmanr, char pagenr)
70 /* Set transfer address & page bits for specific DMA channel.
71 * Assumes dma flipflop is clear.
73 static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
78 /* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
79 * a specific DMA channel.
80 * You must ensure the parameters are valid.
81 * NOTE: from a manual: "the number of transfers is one more
82 * than the initial word count"! This is taken into account.
83 * Assumes dma flip-flop is clear.
84 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
86 static inline void set_dma_count(unsigned int dmanr, unsigned int count)
91 /* Get DMA residue count. After a DMA transfer, this
92 * should return zero. Reading this while a DMA transfer is
93 * still in progress will return unpredictable results.
94 * If called before the channel has been used, it may return 1.
95 * Otherwise, it returns the number of _bytes_ left to transfer.
97 * Assumes DMA flip-flop is clear.
99 static inline int get_dma_residue(unsigned int dmanr)
101 return 0;
105 /* These are in kernel/dma.c: */
106 extern int request_dma(unsigned int dmanr, const char *device_id);
107 extern void free_dma(unsigned int dmanr);
109 /* From PCI */
111 #ifdef CONFIG_PCI
112 extern int isa_dma_bridge_buggy;
113 #else
114 #define isa_dma_bridge_buggy (0)
115 #endif
117 #endif /* _ASM_DMA_H */