arch/arm/mach-msm/io.c

   1 /* arch/arm/mach-msm/io.c
   2  *
   3  * MSM7K, QSD io support
   4  *
   5  * Copyright (C) 2007 Google, Inc.
   6  * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
   7  * Author: Brian Swetland <swetland@google.com>
   8  *
   9  * This software is licensed under the terms of the GNU General Public
  10  * License version 2, as published by the Free Software Foundation, and
  11  * may be copied, distributed, and modified under those terms.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  */
  19
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/export.h>
  24
  25 #include <mach/hardware.h>
  26 #include <asm/page.h>
  27 #include <mach/msm_iomap.h>
  28 #include <asm/mach/map.h>
  29
  30 #include <mach/board.h>
  31
  32 #include "common.h"
  33
  34 #define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) {                          \
  35                 .virtual = (unsigned long) MSM_##name##_BASE, \
  36                 .pfn = __phys_to_pfn(chip##_##name##_PHYS), \
  37                 .length = chip##_##name##_SIZE, \
  38                 .type = mem_type, \
  39          }
  40
  41 #define MSM_DEVICE_TYPE(name, mem_type) \
  42                 MSM_CHIP_DEVICE_TYPE(name, MSM, mem_type)
  43 #define MSM_CHIP_DEVICE(name, chip) \
  44                 MSM_CHIP_DEVICE_TYPE(name, chip, MT_DEVICE)
  45 #define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM)
  46
  47 #if defined(CONFIG_ARCH_MSM7X00A)
  48 static struct map_desc msm_io_desc[] __initdata = {
  49         MSM_DEVICE_TYPE(VIC, MT_DEVICE_NONSHARED),
  50         MSM_CHIP_DEVICE_TYPE(CSR, MSM7X00, MT_DEVICE_NONSHARED),
  51         MSM_DEVICE_TYPE(DMOV, MT_DEVICE_NONSHARED),
  52         MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED),
  53         MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED),
  54         MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED),
  55 #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
  56         defined(CONFIG_DEBUG_MSM_UART3)
  57         MSM_DEVICE_TYPE(DEBUG_UART, MT_DEVICE_NONSHARED),
  58 #endif
  59         {
  60                 .virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
  61                 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  62                 .length =   MSM_SHARED_RAM_SIZE,
  63                 .type =     MT_DEVICE,
  64         },
  65 };
  66
  67 void __init msm_map_common_io(void)
  68 {
  69         /* Make sure the peripheral register window is closed, since
  70          * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
  71          * pages are peripheral interface or not.
  72          */
  73         asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
  74         iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
  75 }
  76 #endif
  77
  78 #ifdef CONFIG_ARCH_QSD8X50
  79 static struct map_desc qsd8x50_io_desc[] __initdata = {
  80         MSM_DEVICE(VIC),
  81         MSM_CHIP_DEVICE(CSR, QSD8X50),
  82         MSM_DEVICE(DMOV),
  83         MSM_CHIP_DEVICE(GPIO1, QSD8X50),
  84         MSM_CHIP_DEVICE(GPIO2, QSD8X50),
  85         MSM_DEVICE(CLK_CTL),
  86         MSM_DEVICE(SIRC),
  87         MSM_DEVICE(SCPLL),
  88         MSM_DEVICE(AD5),
  89         MSM_DEVICE(MDC),
  90 #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
  91         defined(CONFIG_DEBUG_MSM_UART3)
  92         MSM_DEVICE(DEBUG_UART),
  93 #endif
  94         {
  95                 .virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
  96                 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  97                 .length =   MSM_SHARED_RAM_SIZE,
  98                 .type =     MT_DEVICE,
  99         },
 100 };
 101
 102 void __init msm_map_qsd8x50_io(void)
 103 {
 104         iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
 105 }
 106 #endif /* CONFIG_ARCH_QSD8X50 */
 107
 108 #ifdef CONFIG_ARCH_MSM8X60
 109 static struct map_desc msm8x60_io_desc[] __initdata = {
 110         MSM_CHIP_DEVICE(QGIC_DIST, MSM8X60),
 111         MSM_CHIP_DEVICE(QGIC_CPU, MSM8X60),
 112         MSM_CHIP_DEVICE(TMR, MSM8X60),
 113         MSM_CHIP_DEVICE(TMR0, MSM8X60),
 114 #ifdef CONFIG_DEBUG_MSM8660_UART
 115         MSM_DEVICE(DEBUG_UART),
 116 #endif
 117 };
 118
 119 void __init msm_map_msm8x60_io(void)
 120 {
 121         iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
 122 }
 123 #endif /* CONFIG_ARCH_MSM8X60 */
 124
 125 #ifdef CONFIG_ARCH_MSM8960
 126 static struct map_desc msm8960_io_desc[] __initdata = {
 127         MSM_CHIP_DEVICE(QGIC_DIST, MSM8960),
 128         MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
 129         MSM_CHIP_DEVICE(TMR, MSM8960),
 130         MSM_CHIP_DEVICE(TMR0, MSM8960),
 131 #ifdef CONFIG_DEBUG_MSM8960_UART
 132         MSM_DEVICE(DEBUG_UART),
 133 #endif
 134 };
 135
 136 void __init msm_map_msm8960_io(void)
 137 {
 138         iotable_init(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
 139 }
 140 #endif /* CONFIG_ARCH_MSM8960 */
 141
 142 #ifdef CONFIG_ARCH_MSM7X30
 143 static struct map_desc msm7x30_io_desc[] __initdata = {
 144         MSM_DEVICE(VIC),
 145         MSM_CHIP_DEVICE(CSR, MSM7X30),
 146         MSM_DEVICE(DMOV),
 147         MSM_CHIP_DEVICE(GPIO1, MSM7X30),
 148         MSM_CHIP_DEVICE(GPIO2, MSM7X30),
 149         MSM_DEVICE(CLK_CTL),
 150         MSM_DEVICE(CLK_CTL_SH2),
 151         MSM_DEVICE(AD5),
 152         MSM_DEVICE(MDC),
 153         MSM_DEVICE(ACC),
 154         MSM_DEVICE(SAW),
 155         MSM_DEVICE(GCC),
 156         MSM_DEVICE(TCSR),
 157 #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
 158         defined(CONFIG_DEBUG_MSM_UART3)
 159         MSM_DEVICE(DEBUG_UART),
 160 #endif
 161         {
 162                 .virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
 163                 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
 164                 .length =   MSM_SHARED_RAM_SIZE,
 165                 .type =     MT_DEVICE,
 166         },
 167 };
 168
 169 void __init msm_map_msm7x30_io(void)
 170 {
 171         iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
 172 }
 173 #endif /* CONFIG_ARCH_MSM7X30 */
 174
 175 void __iomem *__msm_ioremap_caller(unsigned long phys_addr, size_t size,
 176                                    unsigned int mtype, void *caller)
 177 {
 178         if (mtype == MT_DEVICE) {
 179                 /* The peripherals in the 88000000 - D0000000 range
 180                  * are only accessible by type MT_DEVICE_NONSHARED.
 181                  * Adjust mtype as necessary to make this "just work."
 182                  */
 183                 if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
 184                         mtype = MT_DEVICE_NONSHARED;
 185         }
 186
 187         return __arm_ioremap_caller(phys_addr, size, mtype, caller);
 188 }