arch/arm/mach-ux500/timer.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2011
   3  *
   4  * License Terms: GNU General Public License v2
   5  * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
   6  */
   7 #include <linux/io.h>
   8 #include <linux/errno.h>
   9 #include <linux/clksrc-dbx500-prcmu.h>
  10 #include <linux/clocksource.h>
  11 #include <linux/of.h>
  12 #include <linux/of_address.h>
  13 #include <linux/platform_data/clocksource-nomadik-mtu.h>
  14
  15 #include <asm/smp_twd.h>
  16
  17 #include "setup.h"
  18 #include "irqs.h"
  19
  20 #include "db8500-regs.h"
  21 #include "id.h"
  22
  23 #ifdef CONFIG_HAVE_ARM_TWD
  24 static DEFINE_TWD_LOCAL_TIMER(u8500_twd_local_timer,
  25                               U8500_TWD_BASE, IRQ_LOCALTIMER);
  26
  27 static void __init ux500_twd_init(void)
  28 {
  29         struct twd_local_timer *twd_local_timer;
  30         int err;
  31
  32         /* Use this to switch local timer base if changed in new ASICs */
  33         twd_local_timer = &u8500_twd_local_timer;
  34
  35         if (of_have_populated_dt())
  36                 clocksource_of_init();
  37         else {
  38                 err = twd_local_timer_register(twd_local_timer);
  39                 if (err)
  40                         pr_err("twd_local_timer_register failed %d\n", err);
  41         }
  42 }
  43 #else
  44 #define ux500_twd_init()        do { } while(0)
  45 #endif
  46
  47 const static struct of_device_id prcmu_timer_of_match[] __initconst = {
  48         { .compatible = "stericsson,db8500-prcmu-timer-4", },
  49         { },
  50 };
  51
  52 void __init ux500_timer_init(void)
  53 {
  54         void __iomem *mtu_timer_base;
  55         void __iomem *prcmu_timer_base;
  56         void __iomem *tmp_base;
  57         struct device_node *np;
  58
  59         if (cpu_is_u8500_family() || cpu_is_ux540_family()) {
  60                 mtu_timer_base = __io_address(U8500_MTU0_BASE);
  61                 prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
  62         } else {
  63                 ux500_unknown_soc();
  64         }
  65
  66         /* TODO: Once MTU has been DT:ed place code above into else. */
  67         if (of_have_populated_dt()) {
  68 #ifdef CONFIG_OF
  69                 np = of_find_matching_node(NULL, prcmu_timer_of_match);
  70                 if (!np)
  71 #endif
  72                         goto dt_fail;
  73
  74                 tmp_base = of_iomap(np, 0);
  75                 if (!tmp_base)
  76                         goto dt_fail;
  77
  78                 prcmu_timer_base = tmp_base;
  79         }
  80
  81 dt_fail:
  82         /* Doing it the old fashioned way. */
  83
  84         /*
  85          * Here we register the timerblocks active in the system.
  86          * Localtimers (twd) is started when both cpu is up and running.
  87          * MTU register a clocksource, clockevent and sched_clock.
  88          * Since the MTU is located in the VAPE power domain
  89          * it will be cleared in sleep which makes it unsuitable.
  90          * We however need it as a timer tick (clockevent)
  91          * during boot to calibrate delay until twd is started.
  92          * RTC-RTT have problems as timer tick during boot since it is
  93          * depending on delay which is not yet calibrated. RTC-RTT is in the
  94          * always-on powerdomain and is used as clockevent instead of twd when
  95          * sleeping.
  96          * The PRCMU timer 4 register a clocksource and
  97          * sched_clock with higher rating then MTU since is always-on.
  98          *
  99          */
 100
 101         nmdk_timer_init(mtu_timer_base, IRQ_MTU0);
 102         clksrc_dbx500_prcmu_init(prcmu_timer_base);
 103         ux500_twd_init();
 104 }