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Staging: Panel: panel: Fixed checkpatch line length warnings
[linux/fpc-iii.git] / arch / arm / plat-orion / common.c
blob251f827271e918adf62b378d59aef9e7272d8b70
1 /*
2 * arch/arm/plat-orion/common.c
3 *
4 * Marvell Orion SoC common setup code used by multiple mach-/common.c
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/serial_8250.h>
16 #include <linux/ata_platform.h>
17 #include <linux/clk.h>
18 #include <linux/clkdev.h>
19 #include <linux/mv643xx_eth.h>
20 #include <linux/mv643xx_i2c.h>
21 #include <net/dsa.h>
22 #include <linux/platform_data/dma-mv_xor.h>
23 #include <linux/platform_data/usb-ehci-orion.h>
24 #include <mach/bridge-regs.h>
25
26 /* Create a clkdev entry for a given device/clk */
27 void __init orion_clkdev_add(const char *con_id, const char *dev_id,
28 struct clk *clk)
29 {
30 struct clk_lookup *cl;
31
32 cl = clkdev_alloc(clk, con_id, dev_id);
33 if (cl)
34 clkdev_add(cl);
35 }
36
37 /* Create clkdev entries for all orion platforms except kirkwood.
38 Kirkwood has gated clocks for some of its peripherals, so creates
39 its own clkdev entries. For all the other orion devices, create
40 clkdev entries to the tclk. */
41 void __init orion_clkdev_init(struct clk *tclk)
42 {
43 orion_clkdev_add(NULL, "orion_spi.0", tclk);
44 orion_clkdev_add(NULL, "orion_spi.1", tclk);
45 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk);
46 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk);
47 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk);
48 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk);
49 orion_clkdev_add(NULL, "orion_wdt", tclk);
50 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk);
51 }
52
53 /* Fill in the resources structure and link it into the platform
54 device structure. There is always a memory region, and nearly
55 always an interrupt.*/
56 static void fill_resources(struct platform_device *device,
57 struct resource *resources,
58 resource_size_t mapbase,
59 resource_size_t size,
60 unsigned int irq)
61 {
62 device->resource = resources;
63 device->num_resources = 1;
64 resources[0].flags = IORESOURCE_MEM;
65 resources[0].start = mapbase;
66 resources[0].end = mapbase + size;
67
68 if (irq != NO_IRQ) {
69 device->num_resources++;
70 resources[1].flags = IORESOURCE_IRQ;
71 resources[1].start = irq;
72 resources[1].end = irq;
73 }
74 }
75
76 /*****************************************************************************
77 * UART
78 ****************************************************************************/
79 static unsigned long __init uart_get_clk_rate(struct clk *clk)
80 {
81 clk_prepare_enable(clk);
82 return clk_get_rate(clk);
83 }
84
85 static void __init uart_complete(
86 struct platform_device *orion_uart,
87 struct plat_serial8250_port *data,
88 struct resource *resources,
89 void __iomem *membase,
90 resource_size_t mapbase,
91 unsigned int irq,
92 struct clk *clk)
93 {
94 data->mapbase = mapbase;
95 data->membase = membase;
96 data->irq = irq;
97 data->uartclk = uart_get_clk_rate(clk);
98 orion_uart->dev.platform_data = data;
99
100 fill_resources(orion_uart, resources, mapbase, 0xff, irq);
101 platform_device_register(orion_uart);
102 }
103
104 /*****************************************************************************
105 * UART0
106 ****************************************************************************/
107 static struct plat_serial8250_port orion_uart0_data[] = {
108 {
109 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
110 .iotype = UPIO_MEM,
111 .regshift = 2,
112 }, {
113 },
114 };
115
116 static struct resource orion_uart0_resources[2];
117
118 static struct platform_device orion_uart0 = {
119 .name = "serial8250",
120 .id = PLAT8250_DEV_PLATFORM,
121 };
122
123 void __init orion_uart0_init(void __iomem *membase,
124 resource_size_t mapbase,
125 unsigned int irq,
126 struct clk *clk)
127 {
128 uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources,
129 membase, mapbase, irq, clk);
130 }
131
132 /*****************************************************************************
133 * UART1
134 ****************************************************************************/
135 static struct plat_serial8250_port orion_uart1_data[] = {
136 {
137 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
138 .iotype = UPIO_MEM,
139 .regshift = 2,
140 }, {
141 },
142 };
143
144 static struct resource orion_uart1_resources[2];
145
146 static struct platform_device orion_uart1 = {
147 .name = "serial8250",
148 .id = PLAT8250_DEV_PLATFORM1,
149 };
150
151 void __init orion_uart1_init(void __iomem *membase,
152 resource_size_t mapbase,
153 unsigned int irq,
154 struct clk *clk)
155 {
156 uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources,
157 membase, mapbase, irq, clk);
158 }
159
160 /*****************************************************************************
161 * UART2
162 ****************************************************************************/
163 static struct plat_serial8250_port orion_uart2_data[] = {
164 {
165 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
166 .iotype = UPIO_MEM,
167 .regshift = 2,
168 }, {
169 },
170 };
171
172 static struct resource orion_uart2_resources[2];
173
174 static struct platform_device orion_uart2 = {
175 .name = "serial8250",
176 .id = PLAT8250_DEV_PLATFORM2,
177 };
178
179 void __init orion_uart2_init(void __iomem *membase,
180 resource_size_t mapbase,
181 unsigned int irq,
182 struct clk *clk)
183 {
184 uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources,
185 membase, mapbase, irq, clk);
186 }
187
188 /*****************************************************************************
189 * UART3
190 ****************************************************************************/
191 static struct plat_serial8250_port orion_uart3_data[] = {
192 {
193 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
194 .iotype = UPIO_MEM,
195 .regshift = 2,
196 }, {
197 },
198 };
199
200 static struct resource orion_uart3_resources[2];
201
202 static struct platform_device orion_uart3 = {
203 .name = "serial8250",
204 .id = 3,
205 };
206
207 void __init orion_uart3_init(void __iomem *membase,
208 resource_size_t mapbase,
209 unsigned int irq,
210 struct clk *clk)
211 {
212 uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources,
213 membase, mapbase, irq, clk);
214 }
215
216 /*****************************************************************************
217 * SoC RTC
218 ****************************************************************************/
219 static struct resource orion_rtc_resource[2];
220
221 void __init orion_rtc_init(unsigned long mapbase,
222 unsigned long irq)
223 {
224 orion_rtc_resource[0].start = mapbase;
225 orion_rtc_resource[0].end = mapbase + SZ_32 - 1;
226 orion_rtc_resource[0].flags = IORESOURCE_MEM;
227 orion_rtc_resource[1].start = irq;
228 orion_rtc_resource[1].end = irq;
229 orion_rtc_resource[1].flags = IORESOURCE_IRQ;
230
231 platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2);
232 }
233
234 /*****************************************************************************
235 * GE
236 ****************************************************************************/
237 static __init void ge_complete(
238 struct mv643xx_eth_shared_platform_data *orion_ge_shared_data,
239 struct resource *orion_ge_resource, unsigned long irq,
240 struct platform_device *orion_ge_shared,
241 struct platform_device *orion_ge_mvmdio,
242 struct mv643xx_eth_platform_data *eth_data,
243 struct platform_device *orion_ge)
244 {
245 orion_ge_resource->start = irq;
246 orion_ge_resource->end = irq;
247 eth_data->shared = orion_ge_shared;
248 orion_ge->dev.platform_data = eth_data;
249
250 platform_device_register(orion_ge_shared);
251 if (orion_ge_mvmdio)
252 platform_device_register(orion_ge_mvmdio);
253 platform_device_register(orion_ge);
254 }
255
256 /*****************************************************************************
257 * GE00
258 ****************************************************************************/
259 struct mv643xx_eth_shared_platform_data orion_ge00_shared_data;
260
261 static struct resource orion_ge00_shared_resources[] = {
262 {
263 .name = "ge00 base",
264 },
265 };
266
267 static struct platform_device orion_ge00_shared = {
268 .name = MV643XX_ETH_SHARED_NAME,
269 .id = 0,
270 .dev = {
271 .platform_data = &orion_ge00_shared_data,
272 },
273 };
274
275 static struct resource orion_ge_mvmdio_resources[] = {
276 {
277 .name = "ge00 mvmdio base",
278 }, {
279 .name = "ge00 mvmdio err irq",
280 },
281 };
282
283 static struct platform_device orion_ge_mvmdio = {
284 .name = "orion-mdio",
285 .id = -1,
286 };
287
288 static struct resource orion_ge00_resources[] = {
289 {
290 .name = "ge00 irq",
291 .flags = IORESOURCE_IRQ,
292 },
293 };
294
295 static struct platform_device orion_ge00 = {
296 .name = MV643XX_ETH_NAME,
297 .id = 0,
298 .num_resources = 1,
299 .resource = orion_ge00_resources,
300 .dev = {
301 .coherent_dma_mask = DMA_BIT_MASK(32),
302 },
303 };
304
305 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
306 unsigned long mapbase,
307 unsigned long irq,
308 unsigned long irq_err,
309 unsigned int tx_csum_limit)
310 {
311 fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
312 mapbase + 0x2000, SZ_16K - 1, NO_IRQ);
313 fill_resources(&orion_ge_mvmdio, orion_ge_mvmdio_resources,
314 mapbase + 0x2004, 0x84 - 1, irq_err);
315 orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
316 ge_complete(&orion_ge00_shared_data,
317 orion_ge00_resources, irq, &orion_ge00_shared,
318 &orion_ge_mvmdio,
319 eth_data, &orion_ge00);
320 }
321
322 /*****************************************************************************
323 * GE01
324 ****************************************************************************/
325 struct mv643xx_eth_shared_platform_data orion_ge01_shared_data;
326
327 static struct resource orion_ge01_shared_resources[] = {
328 {
329 .name = "ge01 base",
330 }
331 };
332
333 static struct platform_device orion_ge01_shared = {
334 .name = MV643XX_ETH_SHARED_NAME,
335 .id = 1,
336 .dev = {
337 .platform_data = &orion_ge01_shared_data,
338 },
339 };
340
341 static struct resource orion_ge01_resources[] = {
342 {
343 .name = "ge01 irq",
344 .flags = IORESOURCE_IRQ,
345 },
346 };
347
348 static struct platform_device orion_ge01 = {
349 .name = MV643XX_ETH_NAME,
350 .id = 1,
351 .num_resources = 1,
352 .resource = orion_ge01_resources,
353 .dev = {
354 .coherent_dma_mask = DMA_BIT_MASK(32),
355 },
356 };
357
358 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
359 unsigned long mapbase,
360 unsigned long irq,
361 unsigned long irq_err,
362 unsigned int tx_csum_limit)
363 {
364 fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
365 mapbase + 0x2000, SZ_16K - 1, NO_IRQ);
366 orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
367 ge_complete(&orion_ge01_shared_data,
368 orion_ge01_resources, irq, &orion_ge01_shared,
369 NULL,
370 eth_data, &orion_ge01);
371 }
372
373 /*****************************************************************************
374 * GE10
375 ****************************************************************************/
376 struct mv643xx_eth_shared_platform_data orion_ge10_shared_data;
377
378 static struct resource orion_ge10_shared_resources[] = {
379 {
380 .name = "ge10 base",
381 }
382 };
383
384 static struct platform_device orion_ge10_shared = {
385 .name = MV643XX_ETH_SHARED_NAME,
386 .id = 1,
387 .dev = {
388 .platform_data = &orion_ge10_shared_data,
389 },
390 };
391
392 static struct resource orion_ge10_resources[] = {
393 {
394 .name = "ge10 irq",
395 .flags = IORESOURCE_IRQ,
396 },
397 };
398
399 static struct platform_device orion_ge10 = {
400 .name = MV643XX_ETH_NAME,
401 .id = 1,
402 .num_resources = 2,
403 .resource = orion_ge10_resources,
404 .dev = {
405 .coherent_dma_mask = DMA_BIT_MASK(32),
406 },
407 };
408
409 void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
410 unsigned long mapbase,
411 unsigned long irq,
412 unsigned long irq_err)
413 {
414 fill_resources(&orion_ge10_shared, orion_ge10_shared_resources,
415 mapbase + 0x2000, SZ_16K - 1, NO_IRQ);
416 ge_complete(&orion_ge10_shared_data,
417 orion_ge10_resources, irq, &orion_ge10_shared,
418 NULL,
419 eth_data, &orion_ge10);
420 }
421
422 /*****************************************************************************
423 * GE11
424 ****************************************************************************/
425 struct mv643xx_eth_shared_platform_data orion_ge11_shared_data;
426
427 static struct resource orion_ge11_shared_resources[] = {
428 {
429 .name = "ge11 base",
430 },
431 };
432
433 static struct platform_device orion_ge11_shared = {
434 .name = MV643XX_ETH_SHARED_NAME,
435 .id = 1,
436 .dev = {
437 .platform_data = &orion_ge11_shared_data,
438 },
439 };
440
441 static struct resource orion_ge11_resources[] = {
442 {
443 .name = "ge11 irq",
444 .flags = IORESOURCE_IRQ,
445 },
446 };
447
448 static struct platform_device orion_ge11 = {
449 .name = MV643XX_ETH_NAME,
450 .id = 1,
451 .num_resources = 2,
452 .resource = orion_ge11_resources,
453 .dev = {
454 .coherent_dma_mask = DMA_BIT_MASK(32),
455 },
456 };
457
458 void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
459 unsigned long mapbase,
460 unsigned long irq,
461 unsigned long irq_err)
462 {
463 fill_resources(&orion_ge11_shared, orion_ge11_shared_resources,
464 mapbase + 0x2000, SZ_16K - 1, NO_IRQ);
465 ge_complete(&orion_ge11_shared_data,
466 orion_ge11_resources, irq, &orion_ge11_shared,
467 NULL,
468 eth_data, &orion_ge11);
469 }
470
471 /*****************************************************************************
472 * Ethernet switch
473 ****************************************************************************/
474 static struct resource orion_switch_resources[] = {
475 {
476 .start = 0,
477 .end = 0,
478 .flags = IORESOURCE_IRQ,
479 },
480 };
481
482 static struct platform_device orion_switch_device = {
483 .name = "dsa",
484 .id = 0,
485 .num_resources = 0,
486 .resource = orion_switch_resources,
487 };
488
489 void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq)
490 {
491 int i;
492
493 if (irq != NO_IRQ) {
494 orion_switch_resources[0].start = irq;
495 orion_switch_resources[0].end = irq;
496 orion_switch_device.num_resources = 1;
497 }
498
499 d->netdev = &orion_ge00.dev;
500 for (i = 0; i < d->nr_chips; i++)
501 d->chip[i].mii_bus = &orion_ge00_shared.dev;
502 orion_switch_device.dev.platform_data = d;
503
504 platform_device_register(&orion_switch_device);
505 }
506
507 /*****************************************************************************
508 * I2C
509 ****************************************************************************/
510 static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
511 .freq_n = 3,
512 .timeout = 1000, /* Default timeout of 1 second */
513 };
514
515 static struct resource orion_i2c_resources[2];
516
517 static struct platform_device orion_i2c = {
518 .name = MV64XXX_I2C_CTLR_NAME,
519 .id = 0,
520 .dev = {
521 .platform_data = &orion_i2c_pdata,
522 },
523 };
524
525 static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = {
526 .freq_n = 3,
527 .timeout = 1000, /* Default timeout of 1 second */
528 };
529
530 static struct resource orion_i2c_1_resources[2];
531
532 static struct platform_device orion_i2c_1 = {
533 .name = MV64XXX_I2C_CTLR_NAME,
534 .id = 1,
535 .dev = {
536 .platform_data = &orion_i2c_1_pdata,
537 },
538 };
539
540 void __init orion_i2c_init(unsigned long mapbase,
541 unsigned long irq,
542 unsigned long freq_m)
543 {
544 orion_i2c_pdata.freq_m = freq_m;
545 fill_resources(&orion_i2c, orion_i2c_resources, mapbase,
546 SZ_32 - 1, irq);
547 platform_device_register(&orion_i2c);
548 }
549
550 void __init orion_i2c_1_init(unsigned long mapbase,
551 unsigned long irq,
552 unsigned long freq_m)
553 {
554 orion_i2c_1_pdata.freq_m = freq_m;
555 fill_resources(&orion_i2c_1, orion_i2c_1_resources, mapbase,
556 SZ_32 - 1, irq);
557 platform_device_register(&orion_i2c_1);
558 }
559
560 /*****************************************************************************
561 * SPI
562 ****************************************************************************/
563 static struct resource orion_spi_resources;
564
565 static struct platform_device orion_spi = {
566 .name = "orion_spi",
567 .id = 0,
568 };
569
570 static struct resource orion_spi_1_resources;
571
572 static struct platform_device orion_spi_1 = {
573 .name = "orion_spi",
574 .id = 1,
575 };
576
577 /* Note: The SPI silicon core does have interrupts. However the
578 * current Linux software driver does not use interrupts. */
579
580 void __init orion_spi_init(unsigned long mapbase)
581 {
582 fill_resources(&orion_spi, &orion_spi_resources,
583 mapbase, SZ_512 - 1, NO_IRQ);
584 platform_device_register(&orion_spi);
585 }
586
587 void __init orion_spi_1_init(unsigned long mapbase)
588 {
589 fill_resources(&orion_spi_1, &orion_spi_1_resources,
590 mapbase, SZ_512 - 1, NO_IRQ);
591 platform_device_register(&orion_spi_1);
592 }
593
594 /*****************************************************************************
595 * Watchdog
596 ****************************************************************************/
597 static struct resource orion_wdt_resource =
598 DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
599
600 static struct platform_device orion_wdt_device = {
601 .name = "orion_wdt",
602 .id = -1,
603 .num_resources = 1,
604 .resource = &orion_wdt_resource,
605 };
606
607 void __init orion_wdt_init(void)
608 {
609 platform_device_register(&orion_wdt_device);
610 }
611
612 /*****************************************************************************
613 * XOR
614 ****************************************************************************/
615 static u64 orion_xor_dmamask = DMA_BIT_MASK(32);
616
617 /*****************************************************************************
618 * XOR0
619 ****************************************************************************/
620 static struct resource orion_xor0_shared_resources[] = {
621 {
622 .name = "xor 0 low",
623 .flags = IORESOURCE_MEM,
624 }, {
625 .name = "xor 0 high",
626 .flags = IORESOURCE_MEM,
627 }, {
628 .name = "irq channel 0",
629 .flags = IORESOURCE_IRQ,
630 }, {
631 .name = "irq channel 1",
632 .flags = IORESOURCE_IRQ,
633 },
634 };
635
636 static struct mv_xor_channel_data orion_xor0_channels_data[2];
637
638 static struct mv_xor_platform_data orion_xor0_pdata = {
639 .channels = orion_xor0_channels_data,
640 };
641
642 static struct platform_device orion_xor0_shared = {
643 .name = MV_XOR_NAME,
644 .id = 0,
645 .num_resources = ARRAY_SIZE(orion_xor0_shared_resources),
646 .resource = orion_xor0_shared_resources,
647 .dev = {
648 .dma_mask = &orion_xor_dmamask,
649 .coherent_dma_mask = DMA_BIT_MASK(64),
650 .platform_data = &orion_xor0_pdata,
651 },
652 };
653
654 void __init orion_xor0_init(unsigned long mapbase_low,
655 unsigned long mapbase_high,
656 unsigned long irq_0,
657 unsigned long irq_1)
658 {
659 orion_xor0_shared_resources[0].start = mapbase_low;
660 orion_xor0_shared_resources[0].end = mapbase_low + 0xff;
661 orion_xor0_shared_resources[1].start = mapbase_high;
662 orion_xor0_shared_resources[1].end = mapbase_high + 0xff;
663
664 orion_xor0_shared_resources[2].start = irq_0;
665 orion_xor0_shared_resources[2].end = irq_0;
666 orion_xor0_shared_resources[3].start = irq_1;
667 orion_xor0_shared_resources[3].end = irq_1;
668
669 /*
670 * two engines can't do memset simultaneously, this limitation
671 * satisfied by removing memset support from one of the engines.
672 */
673 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask);
674 dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask);
675
676 dma_cap_set(DMA_MEMSET, orion_xor0_channels_data[1].cap_mask);
677 dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask);
678 dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask);
679
680 platform_device_register(&orion_xor0_shared);
681 }
682
683 /*****************************************************************************
684 * XOR1
685 ****************************************************************************/
686 static struct resource orion_xor1_shared_resources[] = {
687 {
688 .name = "xor 1 low",
689 .flags = IORESOURCE_MEM,
690 }, {
691 .name = "xor 1 high",
692 .flags = IORESOURCE_MEM,
693 }, {
694 .name = "irq channel 0",
695 .flags = IORESOURCE_IRQ,
696 }, {
697 .name = "irq channel 1",
698 .flags = IORESOURCE_IRQ,
699 },
700 };
701
702 static struct mv_xor_channel_data orion_xor1_channels_data[2];
703
704 static struct mv_xor_platform_data orion_xor1_pdata = {
705 .channels = orion_xor1_channels_data,
706 };
707
708 static struct platform_device orion_xor1_shared = {
709 .name = MV_XOR_NAME,
710 .id = 1,
711 .num_resources = ARRAY_SIZE(orion_xor1_shared_resources),
712 .resource = orion_xor1_shared_resources,
713 .dev = {
714 .dma_mask = &orion_xor_dmamask,
715 .coherent_dma_mask = DMA_BIT_MASK(64),
716 .platform_data = &orion_xor1_pdata,
717 },
718 };
719
720 void __init orion_xor1_init(unsigned long mapbase_low,
721 unsigned long mapbase_high,
722 unsigned long irq_0,
723 unsigned long irq_1)
724 {
725 orion_xor1_shared_resources[0].start = mapbase_low;
726 orion_xor1_shared_resources[0].end = mapbase_low + 0xff;
727 orion_xor1_shared_resources[1].start = mapbase_high;
728 orion_xor1_shared_resources[1].end = mapbase_high + 0xff;
729
730 orion_xor1_shared_resources[2].start = irq_0;
731 orion_xor1_shared_resources[2].end = irq_0;
732 orion_xor1_shared_resources[3].start = irq_1;
733 orion_xor1_shared_resources[3].end = irq_1;
734
735 /*
736 * two engines can't do memset simultaneously, this limitation
737 * satisfied by removing memset support from one of the engines.
738 */
739 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask);
740 dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask);
741
742 dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask);
743 dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask);
744 dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask);
745
746 platform_device_register(&orion_xor1_shared);
747 }
748
749 /*****************************************************************************
750 * EHCI
751 ****************************************************************************/
752 static struct orion_ehci_data orion_ehci_data;
753 static u64 ehci_dmamask = DMA_BIT_MASK(32);
754
755
756 /*****************************************************************************
757 * EHCI0
758 ****************************************************************************/
759 static struct resource orion_ehci_resources[2];
760
761 static struct platform_device orion_ehci = {
762 .name = "orion-ehci",
763 .id = 0,
764 .dev = {
765 .dma_mask = &ehci_dmamask,
766 .coherent_dma_mask = DMA_BIT_MASK(32),
767 .platform_data = &orion_ehci_data,
768 },
769 };
770
771 void __init orion_ehci_init(unsigned long mapbase,
772 unsigned long irq,
773 enum orion_ehci_phy_ver phy_version)
774 {
775 orion_ehci_data.phy_version = phy_version;
776 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1,
777 irq);
778
779 platform_device_register(&orion_ehci);
780 }
781
782 /*****************************************************************************
783 * EHCI1
784 ****************************************************************************/
785 static struct resource orion_ehci_1_resources[2];
786
787 static struct platform_device orion_ehci_1 = {
788 .name = "orion-ehci",
789 .id = 1,
790 .dev = {
791 .dma_mask = &ehci_dmamask,
792 .coherent_dma_mask = DMA_BIT_MASK(32),
793 .platform_data = &orion_ehci_data,
794 },
795 };
796
797 void __init orion_ehci_1_init(unsigned long mapbase,
798 unsigned long irq)
799 {
800 fill_resources(&orion_ehci_1, orion_ehci_1_resources,
801 mapbase, SZ_4K - 1, irq);
802
803 platform_device_register(&orion_ehci_1);
804 }
805
806 /*****************************************************************************
807 * EHCI2
808 ****************************************************************************/
809 static struct resource orion_ehci_2_resources[2];
810
811 static struct platform_device orion_ehci_2 = {
812 .name = "orion-ehci",
813 .id = 2,
814 .dev = {
815 .dma_mask = &ehci_dmamask,
816 .coherent_dma_mask = DMA_BIT_MASK(32),
817 .platform_data = &orion_ehci_data,
818 },
819 };
820
821 void __init orion_ehci_2_init(unsigned long mapbase,
822 unsigned long irq)
823 {
824 fill_resources(&orion_ehci_2, orion_ehci_2_resources,
825 mapbase, SZ_4K - 1, irq);
826
827 platform_device_register(&orion_ehci_2);
828 }
829
830 /*****************************************************************************
831 * SATA
832 ****************************************************************************/
833 static struct resource orion_sata_resources[2] = {
834 {
835 .name = "sata base",
836 }, {
837 .name = "sata irq",
838 },
839 };
840
841 static struct platform_device orion_sata = {
842 .name = "sata_mv",
843 .id = 0,
844 .dev = {
845 .coherent_dma_mask = DMA_BIT_MASK(32),
846 },
847 };
848
849 void __init orion_sata_init(struct mv_sata_platform_data *sata_data,
850 unsigned long mapbase,
851 unsigned long irq)
852 {
853 orion_sata.dev.platform_data = sata_data;
854 fill_resources(&orion_sata, orion_sata_resources,
855 mapbase, 0x5000 - 1, irq);
856
857 platform_device_register(&orion_sata);
858 }
859
860 /*****************************************************************************
861 * Cryptographic Engines and Security Accelerator (CESA)
862 ****************************************************************************/
863 static struct resource orion_crypto_resources[] = {
864 {
865 .name = "regs",
866 }, {
867 .name = "crypto interrupt",
868 }, {
869 .name = "sram",
870 .flags = IORESOURCE_MEM,
871 },
872 };
873
874 static struct platform_device orion_crypto = {
875 .name = "mv_crypto",
876 .id = -1,
877 };
878
879 void __init orion_crypto_init(unsigned long mapbase,
880 unsigned long srambase,
881 unsigned long sram_size,
882 unsigned long irq)
883 {
884 fill_resources(&orion_crypto, orion_crypto_resources,
885 mapbase, 0xffff, irq);
886 orion_crypto.num_resources = 3;
887 orion_crypto_resources[2].start = srambase;
888 orion_crypto_resources[2].end = srambase + sram_size - 1;
889
890 platform_device_register(&orion_crypto);
891 }
Linux with added FPC-III support