2 * Copyright (C) 2000-2007, Axis Communications AB.
5 #include <linux/kernel.h>
6 #include <linux/sched.h>
9 #include <linux/errno.h>
10 #include <linux/ptrace.h>
11 #include <linux/user.h>
12 #include <linux/signal.h>
13 #include <linux/security.h>
15 #include <asm/uaccess.h>
17 #include <asm/pgtable.h>
18 #include <asm/processor.h>
19 #include <arch/hwregs/supp_reg.h>
22 * Determines which bits in CCS the user has access to.
23 * 1 = access, 0 = no access.
25 #define CCS_MASK 0x00087c00 /* SXNZVC */
27 #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
29 static int put_debugreg(long pid
, unsigned int regno
, long data
);
30 static long get_debugreg(long pid
, unsigned int regno
);
31 static unsigned long get_pseudo_pc(struct task_struct
*child
);
32 void deconfigure_bp(long pid
);
34 extern unsigned long cris_signal_return_page
;
37 * Get contents of register REGNO in task TASK.
39 long get_reg(struct task_struct
*task
, unsigned int regno
)
41 /* USP is a special case, it's not in the pt_regs struct but
42 * in the tasks thread struct
47 ret
= ((unsigned long *)task_pt_regs(task
))[regno
];
48 else if (regno
== PT_USP
)
49 ret
= task
->thread
.usp
;
50 else if (regno
== PT_PPC
)
51 ret
= get_pseudo_pc(task
);
52 else if (regno
<= PT_MAX
)
53 ret
= get_debugreg(task
->pid
, regno
);
61 * Write contents of register REGNO in task TASK.
63 int put_reg(struct task_struct
*task
, unsigned int regno
, unsigned long data
)
66 ((unsigned long *)task_pt_regs(task
))[regno
] = data
;
67 else if (regno
== PT_USP
)
68 task
->thread
.usp
= data
;
69 else if (regno
== PT_PPC
) {
70 /* Write pseudo-PC to ERP only if changed. */
71 if (data
!= get_pseudo_pc(task
))
72 task_pt_regs(task
)->erp
= data
;
73 } else if (regno
<= PT_MAX
)
74 return put_debugreg(task
->pid
, regno
, data
);
80 void user_enable_single_step(struct task_struct
*child
)
85 * Set up SPC if not set already (in which case we have no other
86 * choice but to trust it).
88 if (!get_reg(child
, PT_SPC
)) {
89 /* In case we're stopped in a delay slot. */
90 tmp
= get_reg(child
, PT_ERP
) & ~1;
91 put_reg(child
, PT_SPC
, tmp
);
93 tmp
= get_reg(child
, PT_CCS
) | SBIT_USER
;
94 put_reg(child
, PT_CCS
, tmp
);
97 void user_disable_single_step(struct task_struct
*child
)
99 put_reg(child
, PT_SPC
, 0);
101 if (!get_debugreg(child
->pid
, PT_BP_CTRL
)) {
103 /* If no h/w bp configured, disable S bit. */
104 tmp
= get_reg(child
, PT_CCS
) & ~SBIT_USER
;
105 put_reg(child
, PT_CCS
, tmp
);
110 * Called by kernel/ptrace.c when detaching.
112 * Make sure the single step bit is not set.
115 ptrace_disable(struct task_struct
*child
)
117 /* Deconfigure SPC and S-bit. */
118 user_disable_single_step(child
);
119 put_reg(child
, PT_SPC
, 0);
121 /* Deconfigure any watchpoints associated with the child. */
122 deconfigure_bp(child
->pid
);
126 long arch_ptrace(struct task_struct
*child
, long request
,
127 unsigned long addr
, unsigned long data
)
130 unsigned int regno
= addr
>> 2;
131 unsigned long __user
*datap
= (unsigned long __user
*)data
;
134 /* Read word at location address. */
135 case PTRACE_PEEKTEXT
:
136 case PTRACE_PEEKDATA
: {
142 /* The signal trampoline page is outside the normal user-addressable
143 * space but still accessible. This is hack to make it possible to
144 * access the signal handler code in GDB.
146 if ((addr
& PAGE_MASK
) == cris_signal_return_page
) {
147 /* The trampoline page is globally mapped, no page table to traverse.*/
148 tmp
= *(unsigned long*)addr
;
150 copied
= access_process_vm(child
, addr
, &tmp
, sizeof(tmp
), 0);
152 if (copied
!= sizeof(tmp
))
156 ret
= put_user(tmp
,datap
);
160 /* Read the word at location address in the USER area. */
161 case PTRACE_PEEKUSR
: {
165 if ((addr
& 3) || regno
> PT_MAX
)
168 tmp
= get_reg(child
, regno
);
169 ret
= put_user(tmp
, datap
);
173 /* Write the word at location address. */
174 case PTRACE_POKETEXT
:
175 case PTRACE_POKEDATA
:
176 ret
= generic_ptrace_pokedata(child
, addr
, data
);
179 /* Write the word at location address in the USER area. */
182 if ((addr
& 3) || regno
> PT_MAX
)
185 if (regno
== PT_CCS
) {
186 /* don't allow the tracing process to change stuff like
187 * interrupt enable, kernel/user bit, dma enables etc.
190 data
|= get_reg(child
, PT_CCS
) & ~CCS_MASK
;
192 if (put_reg(child
, regno
, data
))
197 /* Get all GP registers from the child. */
198 case PTRACE_GETREGS
: {
202 for (i
= 0; i
<= PT_MAX
; i
++) {
203 tmp
= get_reg(child
, i
);
205 if (put_user(tmp
, datap
)) {
217 /* Set all GP registers in the child. */
218 case PTRACE_SETREGS
: {
222 for (i
= 0; i
<= PT_MAX
; i
++) {
223 if (get_user(tmp
, datap
)) {
230 tmp
|= get_reg(child
, PT_CCS
) & ~CCS_MASK
;
233 put_reg(child
, i
, tmp
);
242 ret
= ptrace_request(child
, request
, addr
, data
);
250 void do_syscall_trace(void)
252 if (!test_thread_flag(TIF_SYSCALL_TRACE
))
255 if (!(current
->ptrace
& PT_PTRACED
))
258 /* the 0x80 provides a way for the tracing parent to distinguish
259 between a syscall stop and SIGTRAP delivery */
260 ptrace_notify(SIGTRAP
| ((current
->ptrace
& PT_TRACESYSGOOD
)
264 * This isn't the same as continuing with a signal, but it will do for
267 if (current
->exit_code
) {
268 send_sig(current
->exit_code
, current
, 1);
269 current
->exit_code
= 0;
273 /* Returns the size of an instruction that has a delay slot. */
275 static int insn_size(struct task_struct
*child
, unsigned long pc
)
277 unsigned long opcode
;
281 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
282 copied
= access_process_vm(child
, pc
, &opcode
, sizeof(opcode
), 0);
283 if (copied
!= sizeof(opcode
))
286 switch ((opcode
& 0x0f00) >> 8) {
297 /* Could be 4 or 6; check more bits. */
298 if ((opcode
& 0xff) == 0xff)
304 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
311 static unsigned long get_pseudo_pc(struct task_struct
*child
)
313 /* Default value for PC is ERP. */
314 unsigned long pc
= get_reg(child
, PT_ERP
);
317 unsigned long spc
= get_reg(child
, PT_SPC
);
318 /* Delay slot bit set. Report as stopped on proper
321 /* Rely on SPC if set. FIXME: We might want to check
322 that EXS indicates we stopped due to a single-step
326 /* Calculate the PC from the size of the instruction
327 that the delay slot we're in belongs to. */
328 pc
+= insn_size(child
, pc
& ~1) - 1;
334 static long bp_owner
= 0;
336 /* Reachable from exit_thread in signal.c, so not static. */
337 void deconfigure_bp(long pid
)
341 /* Only deconfigure if the pid is the owner. */
345 for (bp
= 0; bp
< 6; bp
++) {
347 /* Deconfigure start and end address (also gets rid of ownership). */
348 put_debugreg(pid
, PT_BP
+ 3 + (bp
* 2), 0);
349 put_debugreg(pid
, PT_BP
+ 4 + (bp
* 2), 0);
351 /* Deconfigure relevant bits in control register. */
352 tmp
= get_debugreg(pid
, PT_BP_CTRL
) & ~(3 << (2 + (bp
* 4)));
353 put_debugreg(pid
, PT_BP_CTRL
, tmp
);
359 static int put_debugreg(long pid
, unsigned int regno
, long data
)
362 register int old_srs
;
364 #ifdef CONFIG_ETRAX_KGDB
365 /* Ignore write, but pretend it was ok if value is 0
366 (we don't want POKEUSR/SETREGS failing unnessecarily). */
367 return (data
== 0) ? ret
: -1;
370 /* Simple owner management. */
373 else if (bp_owner
!= pid
) {
374 /* Ignore write, but pretend it was ok if value is 0
375 (we don't want POKEUSR/SETREGS failing unnessecarily). */
376 return (data
== 0) ? ret
: -1;
379 /* Remember old SRS. */
380 SPEC_REG_RD(SPEC_REG_SRS
, old_srs
);
381 /* Switch to BP bank. */
382 SUPP_BANK_SEL(BANK_BP
);
384 switch (regno
- PT_BP
) {
386 SUPP_REG_WR(0, data
); break;
393 SUPP_REG_WR(3, data
); break;
395 SUPP_REG_WR(4, data
); break;
397 SUPP_REG_WR(5, data
); break;
399 SUPP_REG_WR(6, data
); break;
401 SUPP_REG_WR(7, data
); break;
403 SUPP_REG_WR(8, data
); break;
405 SUPP_REG_WR(9, data
); break;
407 SUPP_REG_WR(10, data
); break;
409 SUPP_REG_WR(11, data
); break;
411 SUPP_REG_WR(12, data
); break;
413 SUPP_REG_WR(13, data
); break;
415 SUPP_REG_WR(14, data
); break;
422 SPEC_REG_WR(SPEC_REG_SRS
, old_srs
);
431 static long get_debugreg(long pid
, unsigned int regno
)
433 register int old_srs
;
436 if (pid
!= bp_owner
) {
440 /* Remember old SRS. */
441 SPEC_REG_RD(SPEC_REG_SRS
, old_srs
);
442 /* Switch to BP bank. */
443 SUPP_BANK_SEL(BANK_BP
);
445 switch (regno
- PT_BP
) {
447 SUPP_REG_RD(0, data
); break;
450 /* error return value? */
454 SUPP_REG_RD(3, data
); break;
456 SUPP_REG_RD(4, data
); break;
458 SUPP_REG_RD(5, data
); break;
460 SUPP_REG_RD(6, data
); break;
462 SUPP_REG_RD(7, data
); break;
464 SUPP_REG_RD(8, data
); break;
466 SUPP_REG_RD(9, data
); break;
468 SUPP_REG_RD(10, data
); break;
470 SUPP_REG_RD(11, data
); break;
472 SUPP_REG_RD(12, data
); break;
474 SUPP_REG_RD(13, data
); break;
476 SUPP_REG_RD(14, data
); break;
478 /* error return value? */
483 SPEC_REG_WR(SPEC_REG_SRS
, old_srs
);