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spi: sprd: adi: Add a reset reason for watchdog mode
[linux/fpc-iii.git] / drivers / staging / vt6655 / card.c
blobeba4ee0750dc61bcaed74abbbb7a791c5245b0b6
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
4 * All rights reserved.
5 *
6 * File: card.c
7 * Purpose: Provide functions to setup NIC operation mode
8 * Functions:
9 * s_vSafeResetTx - Rest Tx
10 * CARDvSetRSPINF - Set RSPINF
11 * CARDvUpdateBasicTopRate - Update BasicTopRate
12 * CARDbAddBasicRate - Add to BasicRateSet
13 * CARDbIsOFDMinBasicRate - Check if any OFDM rate is in BasicRateSet
14 * CARDvSetLoopbackMode - Set Loopback mode
15 * CARDbSoftwareReset - Sortware reset NIC
16 * CARDqGetTSFOffset - Calculate TSFOffset
17 * CARDbGetCurrentTSF - Read Current NIC TSF counter
18 * CARDqGetNextTBTT - Calculate Next Beacon TSF counter
19 * CARDvSetFirstNextTBTT - Set NIC Beacon time
20 * CARDvUpdateNextTBTT - Sync. NIC Beacon time
21 * CARDbRadioPowerOff - Turn Off NIC Radio Power
22 * CARDbRadioPowerOn - Turn On NIC Radio Power
23 *
24 * Revision History:
25 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
26 * 08-26-2003 Kyle Hsu: Modify the defination type of iobase.
27 * 09-01-2003 Bryan YC Fan: Add vUpdateIFS().
28 *
29 */
30
31 #include "tmacro.h"
32 #include "card.h"
33 #include "baseband.h"
34 #include "mac.h"
35 #include "desc.h"
36 #include "rf.h"
37 #include "power.h"
38
39 /*--------------------- Static Definitions -------------------------*/
40
41 #define C_SIFS_A 16 /* micro sec. */
42 #define C_SIFS_BG 10
43
44 #define C_EIFS 80 /* micro sec. */
45
46 #define C_SLOT_SHORT 9 /* micro sec. */
47 #define C_SLOT_LONG 20
48
49 #define C_CWMIN_A 15 /* slot time */
50 #define C_CWMIN_B 31
51
52 #define C_CWMAX 1023 /* slot time */
53
54 #define WAIT_BEACON_TX_DOWN_TMO 3 /* Times */
55
56 /*--------------------- Static Variables --------------------------*/
57
58 static const unsigned short cwRXBCNTSFOff[MAX_RATE] = {
59 17, 17, 17, 17, 34, 23, 17, 11, 8, 5, 4, 3};
60
61 /*--------------------- Static Functions --------------------------*/
62
63 static void s_vCalculateOFDMRParameter(unsigned char byRate, u8 bb_type,
64 unsigned char *pbyTxRate,
65 unsigned char *pbyRsvTime);
66
67 /*--------------------- Export Functions --------------------------*/
68
69 /*
70 * Description: Calculate TxRate and RsvTime fields for RSPINF in OFDM mode.
71 *
72 * Parameters:
73 * In:
74 * wRate - Tx Rate
75 * byPktType - Tx Packet type
76 * Out:
77 * pbyTxRate - pointer to RSPINF TxRate field
78 * pbyRsvTime - pointer to RSPINF RsvTime field
79 *
80 * Return Value: none
81 */
82 static
83 void
84 s_vCalculateOFDMRParameter(
85 unsigned char byRate,
86 u8 bb_type,
87 unsigned char *pbyTxRate,
88 unsigned char *pbyRsvTime
89 )
90 {
91 switch (byRate) {
92 case RATE_6M:
93 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
94 *pbyTxRate = 0x9B;
95 *pbyRsvTime = 44;
96 } else {
97 *pbyTxRate = 0x8B;
98 *pbyRsvTime = 50;
99 }
100 break;
101
102 case RATE_9M:
103 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
104 *pbyTxRate = 0x9F;
105 *pbyRsvTime = 36;
106 } else {
107 *pbyTxRate = 0x8F;
108 *pbyRsvTime = 42;
109 }
110 break;
111
112 case RATE_12M:
113 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
114 *pbyTxRate = 0x9A;
115 *pbyRsvTime = 32;
116 } else {
117 *pbyTxRate = 0x8A;
118 *pbyRsvTime = 38;
119 }
120 break;
121
122 case RATE_18M:
123 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
124 *pbyTxRate = 0x9E;
125 *pbyRsvTime = 28;
126 } else {
127 *pbyTxRate = 0x8E;
128 *pbyRsvTime = 34;
129 }
130 break;
131
132 case RATE_36M:
133 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
134 *pbyTxRate = 0x9D;
135 *pbyRsvTime = 24;
136 } else {
137 *pbyTxRate = 0x8D;
138 *pbyRsvTime = 30;
139 }
140 break;
141
142 case RATE_48M:
143 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
144 *pbyTxRate = 0x98;
145 *pbyRsvTime = 24;
146 } else {
147 *pbyTxRate = 0x88;
148 *pbyRsvTime = 30;
149 }
150 break;
151
152 case RATE_54M:
153 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
154 *pbyTxRate = 0x9C;
155 *pbyRsvTime = 24;
156 } else {
157 *pbyTxRate = 0x8C;
158 *pbyRsvTime = 30;
159 }
160 break;
161
162 case RATE_24M:
163 default:
164 if (bb_type == BB_TYPE_11A) { /* 5GHZ */
165 *pbyTxRate = 0x99;
166 *pbyRsvTime = 28;
167 } else {
168 *pbyTxRate = 0x89;
169 *pbyRsvTime = 34;
170 }
171 break;
172 }
173 }
174
175 /*--------------------- Export Functions --------------------------*/
176
177 /*
178 * Description: Update IFS
179 *
180 * Parameters:
181 * In:
182 * priv - The adapter to be set
183 * Out:
184 * none
185 *
186 * Return Value: None.
187 */
188 bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type)
189 {
190 unsigned char byCWMaxMin = 0;
191 unsigned char bySlot = 0;
192 unsigned char bySIFS = 0;
193 unsigned char byDIFS = 0;
194 unsigned char byData;
195 int i;
196
197 /* Set SIFS, DIFS, EIFS, SlotTime, CwMin */
198 if (bb_type == BB_TYPE_11A) {
199 if (priv->byRFType == RF_AIROHA7230) {
200 /* AL7230 use single PAPE and connect to PAPE_2.4G */
201 MACvSetBBType(priv->PortOffset, BB_TYPE_11G);
202 priv->abyBBVGA[0] = 0x20;
203 priv->abyBBVGA[2] = 0x10;
204 priv->abyBBVGA[3] = 0x10;
205 BBbReadEmbedded(priv, 0xE7, &byData);
206 if (byData == 0x1C)
207 BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);
208
209 } else if (priv->byRFType == RF_UW2452) {
210 MACvSetBBType(priv->PortOffset, BB_TYPE_11A);
211 priv->abyBBVGA[0] = 0x18;
212 BBbReadEmbedded(priv, 0xE7, &byData);
213 if (byData == 0x14) {
214 BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);
215 BBbWriteEmbedded(priv, 0xE1, 0x57);
216 }
217 } else {
218 MACvSetBBType(priv->PortOffset, BB_TYPE_11A);
219 }
220 BBbWriteEmbedded(priv, 0x88, 0x03);
221 bySlot = C_SLOT_SHORT;
222 bySIFS = C_SIFS_A;
223 byDIFS = C_SIFS_A + 2 * C_SLOT_SHORT;
224 byCWMaxMin = 0xA4;
225 } else if (bb_type == BB_TYPE_11B) {
226 MACvSetBBType(priv->PortOffset, BB_TYPE_11B);
227 if (priv->byRFType == RF_AIROHA7230) {
228 priv->abyBBVGA[0] = 0x1C;
229 priv->abyBBVGA[2] = 0x00;
230 priv->abyBBVGA[3] = 0x00;
231 BBbReadEmbedded(priv, 0xE7, &byData);
232 if (byData == 0x20)
233 BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);
234
235 } else if (priv->byRFType == RF_UW2452) {
236 priv->abyBBVGA[0] = 0x14;
237 BBbReadEmbedded(priv, 0xE7, &byData);
238 if (byData == 0x18) {
239 BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);
240 BBbWriteEmbedded(priv, 0xE1, 0xD3);
241 }
242 }
243 BBbWriteEmbedded(priv, 0x88, 0x02);
244 bySlot = C_SLOT_LONG;
245 bySIFS = C_SIFS_BG;
246 byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
247 byCWMaxMin = 0xA5;
248 } else { /* PK_TYPE_11GA & PK_TYPE_11GB */
249 MACvSetBBType(priv->PortOffset, BB_TYPE_11G);
250 if (priv->byRFType == RF_AIROHA7230) {
251 priv->abyBBVGA[0] = 0x1C;
252 priv->abyBBVGA[2] = 0x00;
253 priv->abyBBVGA[3] = 0x00;
254 BBbReadEmbedded(priv, 0xE7, &byData);
255 if (byData == 0x20)
256 BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);
257
258 } else if (priv->byRFType == RF_UW2452) {
259 priv->abyBBVGA[0] = 0x14;
260 BBbReadEmbedded(priv, 0xE7, &byData);
261 if (byData == 0x18) {
262 BBbWriteEmbedded(priv, 0xE7, priv->abyBBVGA[0]);
263 BBbWriteEmbedded(priv, 0xE1, 0xD3);
264 }
265 }
266 BBbWriteEmbedded(priv, 0x88, 0x08);
267 bySIFS = C_SIFS_BG;
268
269 if (priv->bShortSlotTime) {
270 bySlot = C_SLOT_SHORT;
271 byDIFS = C_SIFS_BG + 2 * C_SLOT_SHORT;
272 } else {
273 bySlot = C_SLOT_LONG;
274 byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
275 }
276
277 byCWMaxMin = 0xa4;
278
279 for (i = RATE_54M; i >= RATE_6M; i--) {
280 if (priv->basic_rates & ((u32)(0x1 << i))) {
281 byCWMaxMin |= 0x1;
282 break;
283 }
284 }
285 }
286
287 if (priv->byRFType == RF_RFMD2959) {
288 /*
289 * bcs TX_PE will reserve 3 us hardware's processing
290 * time here is 2 us.
291 */
292 bySIFS -= 3;
293 byDIFS -= 3;
294 /*
295 * TX_PE will reserve 3 us for MAX2829 A mode only, it is for
296 * better TX throughput; MAC will need 2 us to process, so the
297 * SIFS, DIFS can be shorter by 2 us.
298 */
299 }
300
301 if (priv->bySIFS != bySIFS) {
302 priv->bySIFS = bySIFS;
303 VNSvOutPortB(priv->PortOffset + MAC_REG_SIFS, priv->bySIFS);
304 }
305 if (priv->byDIFS != byDIFS) {
306 priv->byDIFS = byDIFS;
307 VNSvOutPortB(priv->PortOffset + MAC_REG_DIFS, priv->byDIFS);
308 }
309 if (priv->byEIFS != C_EIFS) {
310 priv->byEIFS = C_EIFS;
311 VNSvOutPortB(priv->PortOffset + MAC_REG_EIFS, priv->byEIFS);
312 }
313 if (priv->bySlot != bySlot) {
314 priv->bySlot = bySlot;
315 VNSvOutPortB(priv->PortOffset + MAC_REG_SLOT, priv->bySlot);
316
317 BBvSetShortSlotTime(priv);
318 }
319 if (priv->byCWMaxMin != byCWMaxMin) {
320 priv->byCWMaxMin = byCWMaxMin;
321 VNSvOutPortB(priv->PortOffset + MAC_REG_CWMAXMIN0,
322 priv->byCWMaxMin);
323 }
324
325 priv->byPacketType = CARDbyGetPktType(priv);
326
327 CARDvSetRSPINF(priv, bb_type);
328
329 return true;
330 }
331
332 /*
333 * Description: Sync. TSF counter to BSS
334 * Get TSF offset and write to HW
335 *
336 * Parameters:
337 * In:
338 * priv - The adapter to be sync.
339 * byRxRate - data rate of receive beacon
340 * qwBSSTimestamp - Rx BCN's TSF
341 * qwLocalTSF - Local TSF
342 * Out:
343 * none
344 *
345 * Return Value: none
346 */
347 bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate,
348 u64 qwBSSTimestamp)
349 {
350 u64 local_tsf;
351 u64 qwTSFOffset = 0;
352
353 CARDbGetCurrentTSF(priv, &local_tsf);
354
355 if (qwBSSTimestamp != local_tsf) {
356 qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp,
357 local_tsf);
358 /* adjust TSF, HW's TSF add TSF Offset reg */
359 VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST,
360 (u32)qwTSFOffset);
361 VNSvOutPortD(priv->PortOffset + MAC_REG_TSFOFST + 4,
362 (u32)(qwTSFOffset >> 32));
363 MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL,
364 TFTCTL_TSFSYNCEN);
365 }
366 return true;
367 }
368
369 /*
370 * Description: Set NIC TSF counter for first Beacon time
371 * Get NEXTTBTT from adjusted TSF and Beacon Interval
372 *
373 * Parameters:
374 * In:
375 * priv - The adapter to be set.
376 * wBeaconInterval - Beacon Interval
377 * Out:
378 * none
379 *
380 * Return Value: true if succeed; otherwise false
381 */
382 bool CARDbSetBeaconPeriod(struct vnt_private *priv,
383 unsigned short wBeaconInterval)
384 {
385 u64 qwNextTBTT = 0;
386
387 CARDbGetCurrentTSF(priv, &qwNextTBTT); /* Get Local TSF counter */
388
389 qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
390
391 /* set HW beacon interval */
392 VNSvOutPortW(priv->PortOffset + MAC_REG_BI, wBeaconInterval);
393 priv->wBeaconInterval = wBeaconInterval;
394 /* Set NextTBTT */
395 VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT, (u32)qwNextTBTT);
396 VNSvOutPortD(priv->PortOffset + MAC_REG_NEXTTBTT + 4,
397 (u32)(qwNextTBTT >> 32));
398 MACvRegBitsOn(priv->PortOffset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
399
400 return true;
401 }
402
403 /*
404 * Description: Turn off Radio power
405 *
406 * Parameters:
407 * In:
408 * priv - The adapter to be turned off
409 * Out:
410 * none
411 *
412 */
413 void CARDbRadioPowerOff(struct vnt_private *priv)
414 {
415 if (priv->bRadioOff)
416 return;
417
418 switch (priv->byRFType) {
419 case RF_RFMD2959:
420 MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL,
421 SOFTPWRCTL_TXPEINV);
422 MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL,
423 SOFTPWRCTL_SWPE1);
424 break;
425
426 case RF_AIROHA:
427 case RF_AL2230S:
428 case RF_AIROHA7230:
429 MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL,
430 SOFTPWRCTL_SWPE2);
431 MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL,
432 SOFTPWRCTL_SWPE3);
433 break;
434 }
435
436 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_RXON);
437
438 BBvSetDeepSleep(priv, priv->byLocalID);
439
440 priv->bRadioOff = true;
441 pr_debug("chester power off\n");
442 MACvRegBitsOn(priv->PortOffset, MAC_REG_GPIOCTL0,
443 LED_ACTSET); /* LED issue */
444 }
445
446 /*
447 * Description: Turn on Radio power
448 *
449 * Parameters:
450 * In:
451 * priv - The adapter to be turned on
452 * Out:
453 * none
454 *
455 * Return Value: true if success; otherwise false
456 */
457 bool CARDbRadioPowerOn(struct vnt_private *priv)
458 {
459 bool bResult = true;
460
461 pr_debug("chester power on\n");
462 if (priv->bRadioControlOff) {
463 if (priv->bHWRadioOff)
464 pr_debug("chester bHWRadioOff\n");
465 if (priv->bRadioControlOff)
466 pr_debug("chester bRadioControlOff\n");
467 return false; }
468
469 if (!priv->bRadioOff) {
470 pr_debug("chester pbRadioOff\n");
471 return true; }
472
473 BBvExitDeepSleep(priv, priv->byLocalID);
474
475 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_RXON);
476
477 switch (priv->byRFType) {
478 case RF_RFMD2959:
479 MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL,
480 SOFTPWRCTL_TXPEINV);
481 MACvWordRegBitsOff(priv->PortOffset, MAC_REG_SOFTPWRCTL,
482 SOFTPWRCTL_SWPE1);
483 break;
484
485 case RF_AIROHA:
486 case RF_AL2230S:
487 case RF_AIROHA7230:
488 MACvWordRegBitsOn(priv->PortOffset, MAC_REG_SOFTPWRCTL,
489 (SOFTPWRCTL_SWPE2 | SOFTPWRCTL_SWPE3));
490 break;
491 }
492
493 priv->bRadioOff = false;
494 pr_debug("chester power on\n");
495 MACvRegBitsOff(priv->PortOffset, MAC_REG_GPIOCTL0,
496 LED_ACTSET); /* LED issue */
497 return bResult;
498 }
499
500 void CARDvSafeResetTx(struct vnt_private *priv)
501 {
502 unsigned int uu;
503 struct vnt_tx_desc *pCurrTD;
504
505 /* initialize TD index */
506 priv->apTailTD[0] = &priv->apTD0Rings[0];
507 priv->apCurrTD[0] = &priv->apTD0Rings[0];
508
509 priv->apTailTD[1] = &priv->apTD1Rings[0];
510 priv->apCurrTD[1] = &priv->apTD1Rings[0];
511
512 for (uu = 0; uu < TYPE_MAXTD; uu++)
513 priv->iTDUsed[uu] = 0;
514
515 for (uu = 0; uu < priv->opts.tx_descs[0]; uu++) {
516 pCurrTD = &priv->apTD0Rings[uu];
517 pCurrTD->td0.owner = OWNED_BY_HOST;
518 /* init all Tx Packet pointer to NULL */
519 }
520 for (uu = 0; uu < priv->opts.tx_descs[1]; uu++) {
521 pCurrTD = &priv->apTD1Rings[uu];
522 pCurrTD->td0.owner = OWNED_BY_HOST;
523 /* init all Tx Packet pointer to NULL */
524 }
525
526 /* set MAC TD pointer */
527 MACvSetCurrTXDescAddr(TYPE_TXDMA0, priv, priv->td0_pool_dma);
528
529 MACvSetCurrTXDescAddr(TYPE_AC0DMA, priv, priv->td1_pool_dma);
530
531 /* set MAC Beacon TX pointer */
532 MACvSetCurrBCNTxDescAddr(priv->PortOffset,
533 (priv->tx_beacon_dma));
534 }
535
536 /*
537 * Description:
538 * Reset Rx
539 *
540 * Parameters:
541 * In:
542 * priv - Pointer to the adapter
543 * Out:
544 * none
545 *
546 * Return Value: none
547 */
548 void CARDvSafeResetRx(struct vnt_private *priv)
549 {
550 unsigned int uu;
551 struct vnt_rx_desc *pDesc;
552
553 /* initialize RD index */
554 priv->pCurrRD[0] = &priv->aRD0Ring[0];
555 priv->pCurrRD[1] = &priv->aRD1Ring[0];
556
557 /* init state, all RD is chip's */
558 for (uu = 0; uu < priv->opts.rx_descs0; uu++) {
559 pDesc = &priv->aRD0Ring[uu];
560 pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
561 pDesc->rd0.owner = OWNED_BY_NIC;
562 pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
563 }
564
565 /* init state, all RD is chip's */
566 for (uu = 0; uu < priv->opts.rx_descs1; uu++) {
567 pDesc = &priv->aRD1Ring[uu];
568 pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
569 pDesc->rd0.owner = OWNED_BY_NIC;
570 pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
571 }
572
573 /* set perPkt mode */
574 MACvRx0PerPktMode(priv->PortOffset);
575 MACvRx1PerPktMode(priv->PortOffset);
576 /* set MAC RD pointer */
577 MACvSetCurrRx0DescAddr(priv, priv->rd0_pool_dma);
578
579 MACvSetCurrRx1DescAddr(priv, priv->rd1_pool_dma);
580 }
581
582 /*
583 * Description: Get response Control frame rate in CCK mode
584 *
585 * Parameters:
586 * In:
587 * priv - The adapter to be set
588 * wRateIdx - Receiving data rate
589 * Out:
590 * none
591 *
592 * Return Value: response Control frame rate
593 */
594 static unsigned short CARDwGetCCKControlRate(struct vnt_private *priv,
595 unsigned short wRateIdx)
596 {
597 unsigned int ui = (unsigned int)wRateIdx;
598
599 while (ui > RATE_1M) {
600 if (priv->basic_rates & ((u32)0x1 << ui))
601 return (unsigned short)ui;
602
603 ui--;
604 }
605 return (unsigned short)RATE_1M;
606 }
607
608 /*
609 * Description: Get response Control frame rate in OFDM mode
610 *
611 * Parameters:
612 * In:
613 * priv - The adapter to be set
614 * wRateIdx - Receiving data rate
615 * Out:
616 * none
617 *
618 * Return Value: response Control frame rate
619 */
620 static unsigned short CARDwGetOFDMControlRate(struct vnt_private *priv,
621 unsigned short wRateIdx)
622 {
623 unsigned int ui = (unsigned int)wRateIdx;
624
625 pr_debug("BASIC RATE: %X\n", priv->basic_rates);
626
627 if (!CARDbIsOFDMinBasicRate((void *)priv)) {
628 pr_debug("%s:(NO OFDM) %d\n", __func__, wRateIdx);
629 if (wRateIdx > RATE_24M)
630 wRateIdx = RATE_24M;
631 return wRateIdx;
632 }
633 while (ui > RATE_11M) {
634 if (priv->basic_rates & ((u32)0x1 << ui)) {
635 pr_debug("%s : %d\n", __func__, ui);
636 return (unsigned short)ui;
637 }
638 ui--;
639 }
640 pr_debug("%s: 6M\n", __func__);
641 return (unsigned short)RATE_24M;
642 }
643
644 /*
645 * Description: Set RSPINF
646 *
647 * Parameters:
648 * In:
649 * priv - The adapter to be set
650 * Out:
651 * none
652 *
653 * Return Value: None.
654 */
655 void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
656 {
657 union vnt_phy_field_swap phy;
658 unsigned char byTxRate, byRsvTime; /* For OFDM */
659 unsigned long flags;
660
661 spin_lock_irqsave(&priv->lock, flags);
662
663 /* Set to Page1 */
664 MACvSelectPage1(priv->PortOffset);
665
666 /* RSPINF_b_1 */
667 vnt_get_phy_field(priv, 14,
668 CARDwGetCCKControlRate(priv, RATE_1M),
669 PK_TYPE_11B, &phy.field_read);
670
671 /* swap over to get correct write order */
672 swap(phy.swap[0], phy.swap[1]);
673
674 VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_1, phy.field_write);
675
676 /* RSPINF_b_2 */
677 vnt_get_phy_field(priv, 14,
678 CARDwGetCCKControlRate(priv, RATE_2M),
679 PK_TYPE_11B, &phy.field_read);
680
681 swap(phy.swap[0], phy.swap[1]);
682
683 VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_2, phy.field_write);
684
685 /* RSPINF_b_5 */
686 vnt_get_phy_field(priv, 14,
687 CARDwGetCCKControlRate(priv, RATE_5M),
688 PK_TYPE_11B, &phy.field_read);
689
690 swap(phy.swap[0], phy.swap[1]);
691
692 VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_5, phy.field_write);
693
694 /* RSPINF_b_11 */
695 vnt_get_phy_field(priv, 14,
696 CARDwGetCCKControlRate(priv, RATE_11M),
697 PK_TYPE_11B, &phy.field_read);
698
699 swap(phy.swap[0], phy.swap[1]);
700
701 VNSvOutPortD(priv->PortOffset + MAC_REG_RSPINF_B_11, phy.field_write);
702
703 /* RSPINF_a_6 */
704 s_vCalculateOFDMRParameter(RATE_6M,
705 bb_type,
706 &byTxRate,
707 &byRsvTime);
708 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_6,
709 MAKEWORD(byTxRate, byRsvTime));
710 /* RSPINF_a_9 */
711 s_vCalculateOFDMRParameter(RATE_9M,
712 bb_type,
713 &byTxRate,
714 &byRsvTime);
715 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_9,
716 MAKEWORD(byTxRate, byRsvTime));
717 /* RSPINF_a_12 */
718 s_vCalculateOFDMRParameter(RATE_12M,
719 bb_type,
720 &byTxRate,
721 &byRsvTime);
722 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_12,
723 MAKEWORD(byTxRate, byRsvTime));
724 /* RSPINF_a_18 */
725 s_vCalculateOFDMRParameter(RATE_18M,
726 bb_type,
727 &byTxRate,
728 &byRsvTime);
729 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_18,
730 MAKEWORD(byTxRate, byRsvTime));
731 /* RSPINF_a_24 */
732 s_vCalculateOFDMRParameter(RATE_24M,
733 bb_type,
734 &byTxRate,
735 &byRsvTime);
736 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_24,
737 MAKEWORD(byTxRate, byRsvTime));
738 /* RSPINF_a_36 */
739 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate(
740 (void *)priv,
741 RATE_36M),
742 bb_type,
743 &byTxRate,
744 &byRsvTime);
745 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_36,
746 MAKEWORD(byTxRate, byRsvTime));
747 /* RSPINF_a_48 */
748 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate(
749 (void *)priv,
750 RATE_48M),
751 bb_type,
752 &byTxRate,
753 &byRsvTime);
754 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_48,
755 MAKEWORD(byTxRate, byRsvTime));
756 /* RSPINF_a_54 */
757 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate(
758 (void *)priv,
759 RATE_54M),
760 bb_type,
761 &byTxRate,
762 &byRsvTime);
763 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_54,
764 MAKEWORD(byTxRate, byRsvTime));
765 /* RSPINF_a_72 */
766 s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate(
767 (void *)priv,
768 RATE_54M),
769 bb_type,
770 &byTxRate,
771 &byRsvTime);
772 VNSvOutPortW(priv->PortOffset + MAC_REG_RSPINF_A_72,
773 MAKEWORD(byTxRate, byRsvTime));
774 /* Set to Page0 */
775 MACvSelectPage0(priv->PortOffset);
776
777 spin_unlock_irqrestore(&priv->lock, flags);
778 }
779
780 void CARDvUpdateBasicTopRate(struct vnt_private *priv)
781 {
782 unsigned char byTopOFDM = RATE_24M, byTopCCK = RATE_1M;
783 unsigned char ii;
784
785 /* Determines the highest basic rate. */
786 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
787 if ((priv->basic_rates) & ((u32)(1 << ii))) {
788 byTopOFDM = ii;
789 break;
790 }
791 }
792 priv->byTopOFDMBasicRate = byTopOFDM;
793
794 for (ii = RATE_11M;; ii--) {
795 if ((priv->basic_rates) & ((u32)(1 << ii))) {
796 byTopCCK = ii;
797 break;
798 }
799 if (ii == RATE_1M)
800 break;
801 }
802 priv->byTopCCKBasicRate = byTopCCK;
803 }
804
805 bool CARDbIsOFDMinBasicRate(struct vnt_private *priv)
806 {
807 int ii;
808
809 for (ii = RATE_54M; ii >= RATE_6M; ii--) {
810 if ((priv->basic_rates) & ((u32)BIT(ii)))
811 return true;
812 }
813 return false;
814 }
815
816 unsigned char CARDbyGetPktType(struct vnt_private *priv)
817 {
818 if (priv->byBBType == BB_TYPE_11A || priv->byBBType == BB_TYPE_11B)
819 return (unsigned char)priv->byBBType;
820 else if (CARDbIsOFDMinBasicRate((void *)priv))
821 return PK_TYPE_11GA;
822 else
823 return PK_TYPE_11GB;
824 }
825
826 /*
827 * Description: Set NIC Loopback mode
828 *
829 * Parameters:
830 * In:
831 * priv - The adapter to be set
832 * wLoopbackMode - Loopback mode to be set
833 * Out:
834 * none
835 *
836 * Return Value: none
837 */
838 void CARDvSetLoopbackMode(struct vnt_private *priv,
839 unsigned short wLoopbackMode)
840 {
841 switch (wLoopbackMode) {
842 case CARD_LB_NONE:
843 case CARD_LB_MAC:
844 case CARD_LB_PHY:
845 break;
846 default:
847 break;
848 }
849 /* set MAC loopback */
850 MACvSetLoopbackMode(priv, LOBYTE(wLoopbackMode));
851 /* set Baseband loopback */
852 }
853
854 /*
855 * Description: Software Reset NIC
856 *
857 * Parameters:
858 * In:
859 * priv - The adapter to be reset
860 * Out:
861 * none
862 *
863 * Return Value: none
864 */
865 bool CARDbSoftwareReset(struct vnt_private *priv)
866 {
867 /* reset MAC */
868 if (!MACbSafeSoftwareReset(priv))
869 return false;
870
871 return true;
872 }
873
874 /*
875 * Description: Calculate TSF offset of two TSF input
876 * Get TSF Offset from RxBCN's TSF and local TSF
877 *
878 * Parameters:
879 * In:
880 * priv - The adapter to be sync.
881 * qwTSF1 - Rx BCN's TSF
882 * qwTSF2 - Local TSF
883 * Out:
884 * none
885 *
886 * Return Value: TSF Offset value
887 */
888 u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2)
889 {
890 unsigned short wRxBcnTSFOffst;
891
892 wRxBcnTSFOffst = cwRXBCNTSFOff[byRxRate % MAX_RATE];
893
894 qwTSF2 += (u64)wRxBcnTSFOffst;
895
896 return qwTSF1 - qwTSF2;
897 }
898
899 /*
900 * Description: Read NIC TSF counter
901 * Get local TSF counter
902 *
903 * Parameters:
904 * In:
905 * priv - The adapter to be read
906 * Out:
907 * qwCurrTSF - Current TSF counter
908 *
909 * Return Value: true if success; otherwise false
910 */
911 bool CARDbGetCurrentTSF(struct vnt_private *priv, u64 *pqwCurrTSF)
912 {
913 void __iomem *iobase = priv->PortOffset;
914 unsigned short ww;
915 unsigned char byData;
916
917 MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
918 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
919 VNSvInPortB(iobase + MAC_REG_TFTCTL, &byData);
920 if (!(byData & TFTCTL_TSFCNTRRD))
921 break;
922 }
923 if (ww == W_MAX_TIMEOUT)
924 return false;
925 VNSvInPortD(iobase + MAC_REG_TSFCNTR, (u32 *)pqwCurrTSF);
926 VNSvInPortD(iobase + MAC_REG_TSFCNTR + 4, (u32 *)pqwCurrTSF + 1);
927
928 return true;
929 }
930
931 /*
932 * Description: Read NIC TSF counter
933 * Get NEXTTBTT from adjusted TSF and Beacon Interval
934 *
935 * Parameters:
936 * In:
937 * qwTSF - Current TSF counter
938 * wbeaconInterval - Beacon Interval
939 * Out:
940 * qwCurrTSF - Current TSF counter
941 *
942 * Return Value: TSF value of next Beacon
943 */
944 u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval)
945 {
946 u32 beacon_int;
947
948 beacon_int = wBeaconInterval * 1024;
949 if (beacon_int) {
950 do_div(qwTSF, beacon_int);
951 qwTSF += 1;
952 qwTSF *= beacon_int;
953 }
954
955 return qwTSF;
956 }
957
958 /*
959 * Description: Set NIC TSF counter for first Beacon time
960 * Get NEXTTBTT from adjusted TSF and Beacon Interval
961 *
962 * Parameters:
963 * In:
964 * iobase - IO Base
965 * wBeaconInterval - Beacon Interval
966 * Out:
967 * none
968 *
969 * Return Value: none
970 */
971 void CARDvSetFirstNextTBTT(struct vnt_private *priv,
972 unsigned short wBeaconInterval)
973 {
974 void __iomem *iobase = priv->PortOffset;
975 u64 qwNextTBTT = 0;
976
977 CARDbGetCurrentTSF(priv, &qwNextTBTT); /* Get Local TSF counter */
978
979 qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
980 /* Set NextTBTT */
981 VNSvOutPortD(iobase + MAC_REG_NEXTTBTT, (u32)qwNextTBTT);
982 VNSvOutPortD(iobase + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32));
983 MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
984 }
985
986 /*
987 * Description: Sync NIC TSF counter for Beacon time
988 * Get NEXTTBTT and write to HW
989 *
990 * Parameters:
991 * In:
992 * priv - The adapter to be set
993 * qwTSF - Current TSF counter
994 * wBeaconInterval - Beacon Interval
995 * Out:
996 * none
997 *
998 * Return Value: none
999 */
1000 void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF,
1001 unsigned short wBeaconInterval)
1002 {
1003 void __iomem *iobase = priv->PortOffset;
1004
1005 qwTSF = CARDqGetNextTBTT(qwTSF, wBeaconInterval);
1006 /* Set NextTBTT */
1007 VNSvOutPortD(iobase + MAC_REG_NEXTTBTT, (u32)qwTSF);
1008 VNSvOutPortD(iobase + MAC_REG_NEXTTBTT + 4, (u32)(qwTSF >> 32));
1009 MACvRegBitsOn(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
1010 pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);
1011 }
Linux with added FPC-III support