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drm/i915: Move non-phys cursors into the GTT
[linux/fpc-iii.git] / drivers / net / atl1c / atl1c_main.c
blob1c3c046d5f34d610a05caed24fd69cff28042397
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.0.2-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
32
33 #define L2CB_V10 0xc0
34 #define L2CB_V11 0xc1
35
36 /*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
51 /* required last entry */
52 { 0 }
53 };
54 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
55
56 MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
57 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
58 MODULE_LICENSE("GPL");
59 MODULE_VERSION(ATL1C_DRV_VERSION);
60
61 static int atl1c_stop_mac(struct atl1c_hw *hw);
62 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
63 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
64 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
65 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
66 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
67 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
68 int *work_done, int work_to_do);
69
70 static const u16 atl1c_pay_load_size[] = {
71 128, 256, 512, 1024, 2048, 4096,
72 };
73
74 static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
75 {
76 REG_MB_RFD0_PROD_IDX,
77 REG_MB_RFD1_PROD_IDX,
78 REG_MB_RFD2_PROD_IDX,
79 REG_MB_RFD3_PROD_IDX
80 };
81
82 static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
83 {
84 REG_RFD0_HEAD_ADDR_LO,
85 REG_RFD1_HEAD_ADDR_LO,
86 REG_RFD2_HEAD_ADDR_LO,
87 REG_RFD3_HEAD_ADDR_LO
88 };
89
90 static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
91 {
92 REG_RRD0_HEAD_ADDR_LO,
93 REG_RRD1_HEAD_ADDR_LO,
94 REG_RRD2_HEAD_ADDR_LO,
95 REG_RRD3_HEAD_ADDR_LO
96 };
97
98 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
99 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
100
101 /*
102 * atl1c_init_pcie - init PCIE module
103 */
104 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
105 {
106 u32 data;
107 u32 pci_cmd;
108 struct pci_dev *pdev = hw->adapter->pdev;
109
110 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
111 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
112 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
113 PCI_COMMAND_IO);
114 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
115
116 /*
117 * Clear any PowerSaveing Settings
118 */
119 pci_enable_wake(pdev, PCI_D3hot, 0);
120 pci_enable_wake(pdev, PCI_D3cold, 0);
121
122 /*
123 * Mask some pcie error bits
124 */
125 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
126 data &= ~PCIE_UC_SERVRITY_DLP;
127 data &= ~PCIE_UC_SERVRITY_FCP;
128 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
129
130 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
131 atl1c_disable_l0s_l1(hw);
132 if (flag & ATL1C_PCIE_PHY_RESET)
133 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
134 else
135 AT_WRITE_REG(hw, REG_GPHY_CTRL,
136 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
137
138 msleep(1);
139 }
140
141 /*
142 * atl1c_irq_enable - Enable default interrupt generation settings
143 * @adapter: board private structure
144 */
145 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
146 {
147 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
148 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
149 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
150 AT_WRITE_FLUSH(&adapter->hw);
151 }
152 }
153
154 /*
155 * atl1c_irq_disable - Mask off interrupt generation on the NIC
156 * @adapter: board private structure
157 */
158 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
159 {
160 atomic_inc(&adapter->irq_sem);
161 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
162 AT_WRITE_FLUSH(&adapter->hw);
163 synchronize_irq(adapter->pdev->irq);
164 }
165
166 /*
167 * atl1c_irq_reset - reset interrupt confiure on the NIC
168 * @adapter: board private structure
169 */
170 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
171 {
172 atomic_set(&adapter->irq_sem, 1);
173 atl1c_irq_enable(adapter);
174 }
175
176 /*
177 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
178 * of the idle status register until the device is actually idle
179 */
180 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
181 {
182 int timeout;
183 u32 data;
184
185 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
186 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
187 if ((data & IDLE_STATUS_MASK) == 0)
188 return 0;
189 msleep(1);
190 }
191 return data;
192 }
193
194 /*
195 * atl1c_phy_config - Timer Call-back
196 * @data: pointer to netdev cast into an unsigned long
197 */
198 static void atl1c_phy_config(unsigned long data)
199 {
200 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
201 struct atl1c_hw *hw = &adapter->hw;
202 unsigned long flags;
203
204 spin_lock_irqsave(&adapter->mdio_lock, flags);
205 atl1c_restart_autoneg(hw);
206 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
207 }
208
209 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
210 {
211 WARN_ON(in_interrupt());
212 atl1c_down(adapter);
213 atl1c_up(adapter);
214 clear_bit(__AT_RESETTING, &adapter->flags);
215 }
216
217 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
218 {
219 struct atl1c_hw *hw = &adapter->hw;
220 struct net_device *netdev = adapter->netdev;
221 struct pci_dev *pdev = adapter->pdev;
222 int err;
223 unsigned long flags;
224 u16 speed, duplex, phy_data;
225
226 spin_lock_irqsave(&adapter->mdio_lock, flags);
227 /* MII_BMSR must read twise */
228 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
229 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
230 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
231
232 if ((phy_data & BMSR_LSTATUS) == 0) {
233 /* link down */
234 if (netif_carrier_ok(netdev)) {
235 hw->hibernate = true;
236 if (atl1c_stop_mac(hw) != 0)
237 if (netif_msg_hw(adapter))
238 dev_warn(&pdev->dev,
239 "stop mac failed\n");
240 atl1c_set_aspm(hw, false);
241 }
242 netif_carrier_off(netdev);
243 } else {
244 /* Link Up */
245 hw->hibernate = false;
246 spin_lock_irqsave(&adapter->mdio_lock, flags);
247 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
248 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
249 if (unlikely(err))
250 return;
251 /* link result is our setting */
252 if (adapter->link_speed != speed ||
253 adapter->link_duplex != duplex) {
254 adapter->link_speed = speed;
255 adapter->link_duplex = duplex;
256 atl1c_set_aspm(hw, true);
257 atl1c_enable_tx_ctrl(hw);
258 atl1c_enable_rx_ctrl(hw);
259 atl1c_setup_mac_ctrl(adapter);
260 if (netif_msg_link(adapter))
261 dev_info(&pdev->dev,
262 "%s: %s NIC Link is Up<%d Mbps %s>\n",
263 atl1c_driver_name, netdev->name,
264 adapter->link_speed,
265 adapter->link_duplex == FULL_DUPLEX ?
266 "Full Duplex" : "Half Duplex");
267 }
268 if (!netif_carrier_ok(netdev))
269 netif_carrier_on(netdev);
270 }
271 }
272
273 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
274 {
275 struct net_device *netdev = adapter->netdev;
276 struct pci_dev *pdev = adapter->pdev;
277 u16 phy_data;
278 u16 link_up;
279
280 spin_lock(&adapter->mdio_lock);
281 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
282 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
283 spin_unlock(&adapter->mdio_lock);
284 link_up = phy_data & BMSR_LSTATUS;
285 /* notify upper layer link down ASAP */
286 if (!link_up) {
287 if (netif_carrier_ok(netdev)) {
288 /* old link state: Up */
289 netif_carrier_off(netdev);
290 if (netif_msg_link(adapter))
291 dev_info(&pdev->dev,
292 "%s: %s NIC Link is Down\n",
293 atl1c_driver_name, netdev->name);
294 adapter->link_speed = SPEED_0;
295 }
296 }
297
298 adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE;
299 schedule_work(&adapter->common_task);
300 }
301
302 static void atl1c_common_task(struct work_struct *work)
303 {
304 struct atl1c_adapter *adapter;
305 struct net_device *netdev;
306
307 adapter = container_of(work, struct atl1c_adapter, common_task);
308 netdev = adapter->netdev;
309
310 if (adapter->work_event & ATL1C_WORK_EVENT_RESET) {
311 netif_device_detach(netdev);
312 atl1c_down(adapter);
313 atl1c_up(adapter);
314 netif_device_attach(netdev);
315 return;
316 }
317
318 if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE)
319 atl1c_check_link_status(adapter);
320 }
321
322
323 static void atl1c_del_timer(struct atl1c_adapter *adapter)
324 {
325 del_timer_sync(&adapter->phy_config_timer);
326 }
327
328
329 /*
330 * atl1c_tx_timeout - Respond to a Tx Hang
331 * @netdev: network interface device structure
332 */
333 static void atl1c_tx_timeout(struct net_device *netdev)
334 {
335 struct atl1c_adapter *adapter = netdev_priv(netdev);
336
337 /* Do the reset outside of interrupt context */
338 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
339 schedule_work(&adapter->common_task);
340 }
341
342 /*
343 * atl1c_set_multi - Multicast and Promiscuous mode set
344 * @netdev: network interface device structure
345 *
346 * The set_multi entry point is called whenever the multicast address
347 * list or the network interface flags are updated. This routine is
348 * responsible for configuring the hardware for proper multicast,
349 * promiscuous mode, and all-multi behavior.
350 */
351 static void atl1c_set_multi(struct net_device *netdev)
352 {
353 struct atl1c_adapter *adapter = netdev_priv(netdev);
354 struct atl1c_hw *hw = &adapter->hw;
355 struct netdev_hw_addr *ha;
356 u32 mac_ctrl_data;
357 u32 hash_value;
358
359 /* Check for Promiscuous and All Multicast modes */
360 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
361
362 if (netdev->flags & IFF_PROMISC) {
363 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
364 } else if (netdev->flags & IFF_ALLMULTI) {
365 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
366 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
367 } else {
368 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
369 }
370
371 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
372
373 /* clear the old settings from the multicast hash table */
374 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
375 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
376
377 /* comoute mc addresses' hash value ,and put it into hash table */
378 netdev_for_each_mc_addr(ha, netdev) {
379 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
380 atl1c_hash_set(hw, hash_value);
381 }
382 }
383
384 static void atl1c_vlan_rx_register(struct net_device *netdev,
385 struct vlan_group *grp)
386 {
387 struct atl1c_adapter *adapter = netdev_priv(netdev);
388 struct pci_dev *pdev = adapter->pdev;
389 u32 mac_ctrl_data = 0;
390
391 if (netif_msg_pktdata(adapter))
392 dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
393
394 atl1c_irq_disable(adapter);
395
396 adapter->vlgrp = grp;
397 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
398
399 if (grp) {
400 /* enable VLAN tag insert/strip */
401 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
402 } else {
403 /* disable VLAN tag insert/strip */
404 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
405 }
406
407 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
408 atl1c_irq_enable(adapter);
409 }
410
411 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
412 {
413 struct pci_dev *pdev = adapter->pdev;
414
415 if (netif_msg_pktdata(adapter))
416 dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
417 atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
418 }
419 /*
420 * atl1c_set_mac - Change the Ethernet Address of the NIC
421 * @netdev: network interface device structure
422 * @p: pointer to an address structure
423 *
424 * Returns 0 on success, negative on failure
425 */
426 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
427 {
428 struct atl1c_adapter *adapter = netdev_priv(netdev);
429 struct sockaddr *addr = p;
430
431 if (!is_valid_ether_addr(addr->sa_data))
432 return -EADDRNOTAVAIL;
433
434 if (netif_running(netdev))
435 return -EBUSY;
436
437 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
438 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
439
440 atl1c_hw_set_mac_addr(&adapter->hw);
441
442 return 0;
443 }
444
445 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
446 struct net_device *dev)
447 {
448 int mtu = dev->mtu;
449
450 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
451 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
452 }
453 /*
454 * atl1c_change_mtu - Change the Maximum Transfer Unit
455 * @netdev: network interface device structure
456 * @new_mtu: new value for maximum frame size
457 *
458 * Returns 0 on success, negative on failure
459 */
460 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
461 {
462 struct atl1c_adapter *adapter = netdev_priv(netdev);
463 int old_mtu = netdev->mtu;
464 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
465
466 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
467 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
468 if (netif_msg_link(adapter))
469 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
470 return -EINVAL;
471 }
472 /* set MTU */
473 if (old_mtu != new_mtu && netif_running(netdev)) {
474 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
475 msleep(1);
476 netdev->mtu = new_mtu;
477 adapter->hw.max_frame_size = new_mtu;
478 atl1c_set_rxbufsize(adapter, netdev);
479 atl1c_down(adapter);
480 atl1c_up(adapter);
481 clear_bit(__AT_RESETTING, &adapter->flags);
482 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
483 u32 phy_data;
484
485 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
486 phy_data |= 0x10000000;
487 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
488 }
489
490 }
491 return 0;
492 }
493
494 /*
495 * caller should hold mdio_lock
496 */
497 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
498 {
499 struct atl1c_adapter *adapter = netdev_priv(netdev);
500 u16 result;
501
502 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
503 return result;
504 }
505
506 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
507 int reg_num, int val)
508 {
509 struct atl1c_adapter *adapter = netdev_priv(netdev);
510
511 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
512 }
513
514 /*
515 * atl1c_mii_ioctl -
516 * @netdev:
517 * @ifreq:
518 * @cmd:
519 */
520 static int atl1c_mii_ioctl(struct net_device *netdev,
521 struct ifreq *ifr, int cmd)
522 {
523 struct atl1c_adapter *adapter = netdev_priv(netdev);
524 struct pci_dev *pdev = adapter->pdev;
525 struct mii_ioctl_data *data = if_mii(ifr);
526 unsigned long flags;
527 int retval = 0;
528
529 if (!netif_running(netdev))
530 return -EINVAL;
531
532 spin_lock_irqsave(&adapter->mdio_lock, flags);
533 switch (cmd) {
534 case SIOCGMIIPHY:
535 data->phy_id = 0;
536 break;
537
538 case SIOCGMIIREG:
539 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
540 &data->val_out)) {
541 retval = -EIO;
542 goto out;
543 }
544 break;
545
546 case SIOCSMIIREG:
547 if (data->reg_num & ~(0x1F)) {
548 retval = -EFAULT;
549 goto out;
550 }
551
552 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
553 data->reg_num, data->val_in);
554 if (atl1c_write_phy_reg(&adapter->hw,
555 data->reg_num, data->val_in)) {
556 retval = -EIO;
557 goto out;
558 }
559 break;
560
561 default:
562 retval = -EOPNOTSUPP;
563 break;
564 }
565 out:
566 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
567 return retval;
568 }
569
570 /*
571 * atl1c_ioctl -
572 * @netdev:
573 * @ifreq:
574 * @cmd:
575 */
576 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
577 {
578 switch (cmd) {
579 case SIOCGMIIPHY:
580 case SIOCGMIIREG:
581 case SIOCSMIIREG:
582 return atl1c_mii_ioctl(netdev, ifr, cmd);
583 default:
584 return -EOPNOTSUPP;
585 }
586 }
587
588 /*
589 * atl1c_alloc_queues - Allocate memory for all rings
590 * @adapter: board private structure to initialize
591 *
592 */
593 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
594 {
595 return 0;
596 }
597
598 static void atl1c_set_mac_type(struct atl1c_hw *hw)
599 {
600 switch (hw->device_id) {
601 case PCI_DEVICE_ID_ATTANSIC_L2C:
602 hw->nic_type = athr_l2c;
603 break;
604 case PCI_DEVICE_ID_ATTANSIC_L1C:
605 hw->nic_type = athr_l1c;
606 break;
607 case PCI_DEVICE_ID_ATHEROS_L2C_B:
608 hw->nic_type = athr_l2c_b;
609 break;
610 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
611 hw->nic_type = athr_l2c_b2;
612 break;
613 case PCI_DEVICE_ID_ATHEROS_L1D:
614 hw->nic_type = athr_l1d;
615 break;
616 default:
617 break;
618 }
619 }
620
621 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
622 {
623 u32 phy_status_data;
624 u32 link_ctrl_data;
625
626 atl1c_set_mac_type(hw);
627 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
628 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
629
630 hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
631 ATL1C_INTR_MODRT_ENABLE |
632 ATL1C_RX_IPV6_CHKSUM |
633 ATL1C_TXQ_MODE_ENHANCE;
634 if (link_ctrl_data & LINK_CTRL_L0S_EN)
635 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
636 if (link_ctrl_data & LINK_CTRL_L1_EN)
637 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
638 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
639 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
640
641 if (hw->nic_type == athr_l1c ||
642 hw->nic_type == athr_l1d) {
643 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
644 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
645 }
646 return 0;
647 }
648 /*
649 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
650 * @adapter: board private structure to initialize
651 *
652 * atl1c_sw_init initializes the Adapter private data structure.
653 * Fields are initialized based on PCI device information and
654 * OS network device settings (MTU size).
655 */
656 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
657 {
658 struct atl1c_hw *hw = &adapter->hw;
659 struct pci_dev *pdev = adapter->pdev;
660
661 adapter->wol = 0;
662 adapter->link_speed = SPEED_0;
663 adapter->link_duplex = FULL_DUPLEX;
664 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
665 adapter->tpd_ring[0].count = 1024;
666 adapter->rfd_ring[0].count = 512;
667
668 hw->vendor_id = pdev->vendor;
669 hw->device_id = pdev->device;
670 hw->subsystem_vendor_id = pdev->subsystem_vendor;
671 hw->subsystem_id = pdev->subsystem_device;
672
673 /* before link up, we assume hibernate is true */
674 hw->hibernate = true;
675 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
676 if (atl1c_setup_mac_funcs(hw) != 0) {
677 dev_err(&pdev->dev, "set mac function pointers failed\n");
678 return -1;
679 }
680 hw->intr_mask = IMR_NORMAL_MASK;
681 hw->phy_configured = false;
682 hw->preamble_len = 7;
683 hw->max_frame_size = adapter->netdev->mtu;
684 if (adapter->num_rx_queues < 2) {
685 hw->rss_type = atl1c_rss_disable;
686 hw->rss_mode = atl1c_rss_mode_disable;
687 } else {
688 hw->rss_type = atl1c_rss_ipv4;
689 hw->rss_mode = atl1c_rss_mul_que_mul_int;
690 hw->rss_hash_bits = 16;
691 }
692 hw->autoneg_advertised = ADVERTISED_Autoneg;
693 hw->indirect_tab = 0xE4E4E4E4;
694 hw->base_cpu = 0;
695
696 hw->ict = 50000; /* 100ms */
697 hw->smb_timer = 200000; /* 400ms */
698 hw->cmb_tpd = 4;
699 hw->cmb_tx_timer = 1; /* 2 us */
700 hw->rx_imt = 200;
701 hw->tx_imt = 1000;
702
703 hw->tpd_burst = 5;
704 hw->rfd_burst = 8;
705 hw->dma_order = atl1c_dma_ord_out;
706 hw->dmar_block = atl1c_dma_req_1024;
707 hw->dmaw_block = atl1c_dma_req_1024;
708 hw->dmar_dly_cnt = 15;
709 hw->dmaw_dly_cnt = 4;
710
711 if (atl1c_alloc_queues(adapter)) {
712 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
713 return -ENOMEM;
714 }
715 /* TODO */
716 atl1c_set_rxbufsize(adapter, adapter->netdev);
717 atomic_set(&adapter->irq_sem, 1);
718 spin_lock_init(&adapter->mdio_lock);
719 spin_lock_init(&adapter->tx_lock);
720 set_bit(__AT_DOWN, &adapter->flags);
721
722 return 0;
723 }
724
725 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
726 struct atl1c_buffer *buffer_info, int in_irq)
727 {
728 u16 pci_driection;
729 if (buffer_info->flags & ATL1C_BUFFER_FREE)
730 return;
731 if (buffer_info->dma) {
732 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
733 pci_driection = PCI_DMA_FROMDEVICE;
734 else
735 pci_driection = PCI_DMA_TODEVICE;
736
737 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
738 pci_unmap_single(pdev, buffer_info->dma,
739 buffer_info->length, pci_driection);
740 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
741 pci_unmap_page(pdev, buffer_info->dma,
742 buffer_info->length, pci_driection);
743 }
744 if (buffer_info->skb) {
745 if (in_irq)
746 dev_kfree_skb_irq(buffer_info->skb);
747 else
748 dev_kfree_skb(buffer_info->skb);
749 }
750 buffer_info->dma = 0;
751 buffer_info->skb = NULL;
752 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
753 }
754 /*
755 * atl1c_clean_tx_ring - Free Tx-skb
756 * @adapter: board private structure
757 */
758 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
759 enum atl1c_trans_queue type)
760 {
761 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
762 struct atl1c_buffer *buffer_info;
763 struct pci_dev *pdev = adapter->pdev;
764 u16 index, ring_count;
765
766 ring_count = tpd_ring->count;
767 for (index = 0; index < ring_count; index++) {
768 buffer_info = &tpd_ring->buffer_info[index];
769 atl1c_clean_buffer(pdev, buffer_info, 0);
770 }
771
772 /* Zero out Tx-buffers */
773 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
774 ring_count);
775 atomic_set(&tpd_ring->next_to_clean, 0);
776 tpd_ring->next_to_use = 0;
777 }
778
779 /*
780 * atl1c_clean_rx_ring - Free rx-reservation skbs
781 * @adapter: board private structure
782 */
783 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
784 {
785 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
786 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
787 struct atl1c_buffer *buffer_info;
788 struct pci_dev *pdev = adapter->pdev;
789 int i, j;
790
791 for (i = 0; i < adapter->num_rx_queues; i++) {
792 for (j = 0; j < rfd_ring[i].count; j++) {
793 buffer_info = &rfd_ring[i].buffer_info[j];
794 atl1c_clean_buffer(pdev, buffer_info, 0);
795 }
796 /* zero out the descriptor ring */
797 memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
798 rfd_ring[i].next_to_clean = 0;
799 rfd_ring[i].next_to_use = 0;
800 rrd_ring[i].next_to_use = 0;
801 rrd_ring[i].next_to_clean = 0;
802 }
803 }
804
805 /*
806 * Read / Write Ptr Initialize:
807 */
808 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
809 {
810 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
811 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
812 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
813 struct atl1c_buffer *buffer_info;
814 int i, j;
815
816 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
817 tpd_ring[i].next_to_use = 0;
818 atomic_set(&tpd_ring[i].next_to_clean, 0);
819 buffer_info = tpd_ring[i].buffer_info;
820 for (j = 0; j < tpd_ring->count; j++)
821 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
822 ATL1C_BUFFER_FREE);
823 }
824 for (i = 0; i < adapter->num_rx_queues; i++) {
825 rfd_ring[i].next_to_use = 0;
826 rfd_ring[i].next_to_clean = 0;
827 rrd_ring[i].next_to_use = 0;
828 rrd_ring[i].next_to_clean = 0;
829 for (j = 0; j < rfd_ring[i].count; j++) {
830 buffer_info = &rfd_ring[i].buffer_info[j];
831 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
832 }
833 }
834 }
835
836 /*
837 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
838 * @adapter: board private structure
839 *
840 * Free all transmit software resources
841 */
842 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
843 {
844 struct pci_dev *pdev = adapter->pdev;
845
846 pci_free_consistent(pdev, adapter->ring_header.size,
847 adapter->ring_header.desc,
848 adapter->ring_header.dma);
849 adapter->ring_header.desc = NULL;
850
851 /* Note: just free tdp_ring.buffer_info,
852 * it contain rfd_ring.buffer_info, do not double free */
853 if (adapter->tpd_ring[0].buffer_info) {
854 kfree(adapter->tpd_ring[0].buffer_info);
855 adapter->tpd_ring[0].buffer_info = NULL;
856 }
857 }
858
859 /*
860 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
861 * @adapter: board private structure
862 *
863 * Return 0 on success, negative on failure
864 */
865 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
866 {
867 struct pci_dev *pdev = adapter->pdev;
868 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
869 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
870 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
871 struct atl1c_ring_header *ring_header = &adapter->ring_header;
872 int num_rx_queues = adapter->num_rx_queues;
873 int size;
874 int i;
875 int count = 0;
876 int rx_desc_count = 0;
877 u32 offset = 0;
878
879 rrd_ring[0].count = rfd_ring[0].count;
880 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
881 tpd_ring[i].count = tpd_ring[0].count;
882
883 for (i = 1; i < adapter->num_rx_queues; i++)
884 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
885
886 /* 2 tpd queue, one high priority queue,
887 * another normal priority queue */
888 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
889 rfd_ring->count * num_rx_queues);
890 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
891 if (unlikely(!tpd_ring->buffer_info)) {
892 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
893 size);
894 goto err_nomem;
895 }
896 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
897 tpd_ring[i].buffer_info =
898 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
899 count += tpd_ring[i].count;
900 }
901
902 for (i = 0; i < num_rx_queues; i++) {
903 rfd_ring[i].buffer_info =
904 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
905 count += rfd_ring[i].count;
906 rx_desc_count += rfd_ring[i].count;
907 }
908 /*
909 * real ring DMA buffer
910 * each ring/block may need up to 8 bytes for alignment, hence the
911 * additional bytes tacked onto the end.
912 */
913 ring_header->size = size =
914 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
915 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
916 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
917 sizeof(struct atl1c_hw_stats) +
918 8 * 4 + 8 * 2 * num_rx_queues;
919
920 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
921 &ring_header->dma);
922 if (unlikely(!ring_header->desc)) {
923 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
924 goto err_nomem;
925 }
926 memset(ring_header->desc, 0, ring_header->size);
927 /* init TPD ring */
928
929 tpd_ring[0].dma = roundup(ring_header->dma, 8);
930 offset = tpd_ring[0].dma - ring_header->dma;
931 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
932 tpd_ring[i].dma = ring_header->dma + offset;
933 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
934 tpd_ring[i].size =
935 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
936 offset += roundup(tpd_ring[i].size, 8);
937 }
938 /* init RFD ring */
939 for (i = 0; i < num_rx_queues; i++) {
940 rfd_ring[i].dma = ring_header->dma + offset;
941 rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
942 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
943 rfd_ring[i].count;
944 offset += roundup(rfd_ring[i].size, 8);
945 }
946
947 /* init RRD ring */
948 for (i = 0; i < num_rx_queues; i++) {
949 rrd_ring[i].dma = ring_header->dma + offset;
950 rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
951 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
952 rrd_ring[i].count;
953 offset += roundup(rrd_ring[i].size, 8);
954 }
955
956 adapter->smb.dma = ring_header->dma + offset;
957 adapter->smb.smb = (u8 *)ring_header->desc + offset;
958 return 0;
959
960 err_nomem:
961 kfree(tpd_ring->buffer_info);
962 return -ENOMEM;
963 }
964
965 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
966 {
967 struct atl1c_hw *hw = &adapter->hw;
968 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
969 adapter->rfd_ring;
970 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
971 adapter->rrd_ring;
972 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
973 adapter->tpd_ring;
974 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
975 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
976 int i;
977
978 /* TPD */
979 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
980 (u32)((tpd_ring[atl1c_trans_normal].dma &
981 AT_DMA_HI_ADDR_MASK) >> 32));
982 /* just enable normal priority TX queue */
983 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
984 (u32)(tpd_ring[atl1c_trans_normal].dma &
985 AT_DMA_LO_ADDR_MASK));
986 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
987 (u32)(tpd_ring[atl1c_trans_high].dma &
988 AT_DMA_LO_ADDR_MASK));
989 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
990 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
991
992
993 /* RFD */
994 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
995 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
996 for (i = 0; i < adapter->num_rx_queues; i++)
997 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
998 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
999
1000 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1001 rfd_ring[0].count & RFD_RING_SIZE_MASK);
1002 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1003 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1004
1005 /* RRD */
1006 for (i = 0; i < adapter->num_rx_queues; i++)
1007 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
1008 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1009 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1010 (rrd_ring[0].count & RRD_RING_SIZE_MASK));
1011
1012 /* CMB */
1013 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
1014
1015 /* SMB */
1016 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
1017 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1018 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
1019 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
1020 /* Load all of base address above */
1021 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1022 }
1023
1024 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1025 {
1026 struct atl1c_hw *hw = &adapter->hw;
1027 u32 dev_ctrl_data;
1028 u32 max_pay_load;
1029 u16 tx_offload_thresh;
1030 u32 txq_ctrl_data;
1031 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
1032
1033 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
1034 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1035 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1036 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1037 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1038 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1039 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1040 hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
1041 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1042 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1043 hw->dmar_block = min(max_pay_load, hw->dmar_block);
1044
1045 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1046 TXQ_NUM_TPD_BURST_SHIFT;
1047 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1048 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1049 txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
1050 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1051
1052 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1053 }
1054
1055 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1056 {
1057 struct atl1c_hw *hw = &adapter->hw;
1058 u32 rxq_ctrl_data;
1059
1060 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1061 RXQ_RFD_BURST_NUM_SHIFT;
1062
1063 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1064 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1065 if (hw->rss_type == atl1c_rss_ipv4)
1066 rxq_ctrl_data |= RSS_HASH_IPV4;
1067 if (hw->rss_type == atl1c_rss_ipv4_tcp)
1068 rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
1069 if (hw->rss_type == atl1c_rss_ipv6)
1070 rxq_ctrl_data |= RSS_HASH_IPV6;
1071 if (hw->rss_type == atl1c_rss_ipv6_tcp)
1072 rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
1073 if (hw->rss_type != atl1c_rss_disable)
1074 rxq_ctrl_data |= RRS_HASH_CTRL_EN;
1075
1076 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
1077 RSS_MODE_SHIFT;
1078 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
1079 RSS_HASH_BITS_SHIFT;
1080 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1081 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
1082 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1083
1084 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1085 }
1086
1087 static void atl1c_configure_rss(struct atl1c_adapter *adapter)
1088 {
1089 struct atl1c_hw *hw = &adapter->hw;
1090
1091 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1092 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1093 }
1094
1095 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1096 {
1097 struct atl1c_hw *hw = &adapter->hw;
1098 u32 dma_ctrl_data;
1099
1100 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1101 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1102 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1103 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1104 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1105 else
1106 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1107
1108 switch (hw->dma_order) {
1109 case atl1c_dma_ord_in:
1110 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1111 break;
1112 case atl1c_dma_ord_enh:
1113 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1114 break;
1115 case atl1c_dma_ord_out:
1116 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1117 break;
1118 default:
1119 break;
1120 }
1121
1122 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1123 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1124 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1125 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1126 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1127 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1128 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1129 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1130
1131 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1132 }
1133
1134 /*
1135 * Stop the mac, transmit and receive units
1136 * hw - Struct containing variables accessed by shared code
1137 * return : 0 or idle status (if error)
1138 */
1139 static int atl1c_stop_mac(struct atl1c_hw *hw)
1140 {
1141 u32 data;
1142
1143 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1144 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1145 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1146 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1147
1148 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1149 data &= ~TXQ_CTRL_EN;
1150 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1151
1152 atl1c_wait_until_idle(hw);
1153
1154 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1155 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1156 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1157
1158 return (int)atl1c_wait_until_idle(hw);
1159 }
1160
1161 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1162 {
1163 u32 data;
1164
1165 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1166 switch (hw->adapter->num_rx_queues) {
1167 case 4:
1168 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1169 break;
1170 case 3:
1171 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1172 break;
1173 case 2:
1174 data |= RXQ1_CTRL_EN;
1175 break;
1176 default:
1177 break;
1178 }
1179 data |= RXQ_CTRL_EN;
1180 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1181 }
1182
1183 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1184 {
1185 u32 data;
1186
1187 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1188 data |= TXQ_CTRL_EN;
1189 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1190 }
1191
1192 /*
1193 * Reset the transmit and receive units; mask and clear all interrupts.
1194 * hw - Struct containing variables accessed by shared code
1195 * return : 0 or idle status (if error)
1196 */
1197 static int atl1c_reset_mac(struct atl1c_hw *hw)
1198 {
1199 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1200 struct pci_dev *pdev = adapter->pdev;
1201 int ret;
1202
1203 AT_WRITE_REG(hw, REG_IMR, 0);
1204 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1205
1206 ret = atl1c_stop_mac(hw);
1207 if (ret)
1208 return ret;
1209 /*
1210 * Issue Soft Reset to the MAC. This will reset the chip's
1211 * transmit, receive, DMA. It will not effect
1212 * the current PCI configuration. The global reset bit is self-
1213 * clearing, and should clear within a microsecond.
1214 */
1215 AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
1216 AT_WRITE_FLUSH(hw);
1217 msleep(10);
1218 /* Wait at least 10ms for All module to be Idle */
1219
1220 if (atl1c_wait_until_idle(hw)) {
1221 dev_err(&pdev->dev,
1222 "MAC state machine can't be idle since"
1223 " disabled for 10ms second\n");
1224 return -1;
1225 }
1226 return 0;
1227 }
1228
1229 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1230 {
1231 u32 pm_ctrl_data;
1232
1233 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1234 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1235 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1236 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1237 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1238 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1239 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1240 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1241
1242 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1243 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1244 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1245 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1246 }
1247
1248 /*
1249 * Set ASPM state.
1250 * Enable/disable L0s/L1 depend on link state.
1251 */
1252 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1253 {
1254 u32 pm_ctrl_data;
1255 u32 link_ctrl_data;
1256
1257 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1258 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
1259 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1260
1261 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1262 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1263 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
1264 PM_CTRL_LCKDET_TIMER_SHIFT);
1265
1266 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1267 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1268 pm_ctrl_data |= PM_CTRL_RBER_EN;
1269 pm_ctrl_data |= PM_CTRL_SDES_EN;
1270
1271 if (hw->nic_type == athr_l2c_b ||
1272 hw->nic_type == athr_l1d ||
1273 hw->nic_type == athr_l2c_b2) {
1274 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1275 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
1276 if (hw->nic_type == athr_l2c_b &&
1277 hw->revision_id == L2CB_V10)
1278 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1279 }
1280
1281 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1282
1283 pm_ctrl_data |= PM_CTRL_PCIE_RECV;
1284 pm_ctrl_data |= AT_ASPM_L1_TIMER << PM_CTRL_PM_REQ_TIMER_SHIFT;
1285 pm_ctrl_data &= ~PM_CTRL_EN_BUFS_RX_L0S;
1286 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1287 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1288 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1289 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1290 }
1291
1292 if (linkup) {
1293 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1294 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1295 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1296 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1297 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1298 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1299
1300 if (hw->nic_type == athr_l2c_b ||
1301 hw->nic_type == athr_l1d ||
1302 hw->nic_type == athr_l2c_b2) {
1303 if (hw->nic_type == athr_l2c_b)
1304 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
1305 pm_ctrl_data &= PM_CTRL_ASPM_L0S_EN;
1306 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1307 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1308 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1309 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1310 if (hw->adapter->link_speed == SPEED_100 ||
1311 hw->adapter->link_speed == SPEED_1000) {
1312 pm_ctrl_data &=
1313 ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1314 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1315 if (hw->nic_type == athr_l1d)
1316 pm_ctrl_data |= 0xF <<
1317 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1318 else
1319 pm_ctrl_data |= 7 <<
1320 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1321 }
1322 } else {
1323 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1324 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1325 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1326 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1327 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1328 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1329 }
1330 atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x29);
1331 if (hw->adapter->link_speed == SPEED_10)
1332 if (hw->nic_type == athr_l1d)
1333 atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0xB69D);
1334 else
1335 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB6DD);
1336 else if (hw->adapter->link_speed == SPEED_100)
1337 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB2DD);
1338 else
1339 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0x96DD);
1340
1341 } else {
1342 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1343 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1344 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1345 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1346
1347 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1348
1349 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1350 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1351 else
1352 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1353 }
1354
1355 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1356 }
1357
1358 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1359 {
1360 struct atl1c_hw *hw = &adapter->hw;
1361 struct net_device *netdev = adapter->netdev;
1362 u32 mac_ctrl_data;
1363
1364 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1365 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1366
1367 if (adapter->link_duplex == FULL_DUPLEX) {
1368 hw->mac_duplex = true;
1369 mac_ctrl_data |= MAC_CTRL_DUPLX;
1370 }
1371
1372 if (adapter->link_speed == SPEED_1000)
1373 hw->mac_speed = atl1c_mac_speed_1000;
1374 else
1375 hw->mac_speed = atl1c_mac_speed_10_100;
1376
1377 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1378 MAC_CTRL_SPEED_SHIFT;
1379
1380 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1381 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1382 MAC_CTRL_PRMLEN_SHIFT);
1383
1384 if (adapter->vlgrp)
1385 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
1386
1387 mac_ctrl_data |= MAC_CTRL_BC_EN;
1388 if (netdev->flags & IFF_PROMISC)
1389 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1390 if (netdev->flags & IFF_ALLMULTI)
1391 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1392
1393 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1394 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2) {
1395 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1396 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1397 }
1398 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1399 }
1400
1401 /*
1402 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1403 * @adapter: board private structure
1404 *
1405 * Configure the Tx /Rx unit of the MAC after a reset.
1406 */
1407 static int atl1c_configure(struct atl1c_adapter *adapter)
1408 {
1409 struct atl1c_hw *hw = &adapter->hw;
1410 u32 master_ctrl_data = 0;
1411 u32 intr_modrt_data;
1412
1413 /* clear interrupt status */
1414 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1415 /* Clear any WOL status */
1416 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1417 /* set Interrupt Clear Timer
1418 * HW will enable self to assert interrupt event to system after
1419 * waiting x-time for software to notify it accept interrupt.
1420 */
1421 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1422 hw->ict & INT_RETRIG_TIMER_MASK);
1423
1424 atl1c_configure_des_ring(adapter);
1425
1426 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1427 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1428 IRQ_MODRT_TX_TIMER_SHIFT;
1429 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1430 IRQ_MODRT_RX_TIMER_SHIFT;
1431 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1432 master_ctrl_data |=
1433 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1434 }
1435
1436 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1437 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1438
1439 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1440
1441 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1442 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1443 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1444 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1445 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1446 }
1447
1448 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1449 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1450 hw->smb_timer & SMB_STAT_TIMER_MASK);
1451 /* set MTU */
1452 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1453 VLAN_HLEN + ETH_FCS_LEN);
1454 /* HDS, disable */
1455 AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
1456
1457 atl1c_configure_tx(adapter);
1458 atl1c_configure_rx(adapter);
1459 atl1c_configure_rss(adapter);
1460 atl1c_configure_dma(adapter);
1461
1462 return 0;
1463 }
1464
1465 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1466 {
1467 u16 hw_reg_addr = 0;
1468 unsigned long *stats_item = NULL;
1469 u32 data;
1470
1471 /* update rx status */
1472 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1473 stats_item = &adapter->hw_stats.rx_ok;
1474 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1475 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1476 *stats_item += data;
1477 stats_item++;
1478 hw_reg_addr += 4;
1479 }
1480 /* update tx status */
1481 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1482 stats_item = &adapter->hw_stats.tx_ok;
1483 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1484 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1485 *stats_item += data;
1486 stats_item++;
1487 hw_reg_addr += 4;
1488 }
1489 }
1490
1491 /*
1492 * atl1c_get_stats - Get System Network Statistics
1493 * @netdev: network interface device structure
1494 *
1495 * Returns the address of the device statistics structure.
1496 * The statistics are actually updated from the timer callback.
1497 */
1498 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1499 {
1500 struct atl1c_adapter *adapter = netdev_priv(netdev);
1501 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1502 struct net_device_stats *net_stats = &adapter->net_stats;
1503
1504 atl1c_update_hw_stats(adapter);
1505 net_stats->rx_packets = hw_stats->rx_ok;
1506 net_stats->tx_packets = hw_stats->tx_ok;
1507 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1508 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1509 net_stats->multicast = hw_stats->rx_mcast;
1510 net_stats->collisions = hw_stats->tx_1_col +
1511 hw_stats->tx_2_col * 2 +
1512 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1513 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1514 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1515 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1516 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1517 net_stats->rx_length_errors = hw_stats->rx_len_err;
1518 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1519 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1520 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1521
1522 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1523
1524 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1525 hw_stats->tx_underrun + hw_stats->tx_trunc;
1526 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1527 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1528 net_stats->tx_window_errors = hw_stats->tx_late_col;
1529
1530 return &adapter->net_stats;
1531 }
1532
1533 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1534 {
1535 u16 phy_data;
1536
1537 spin_lock(&adapter->mdio_lock);
1538 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1539 spin_unlock(&adapter->mdio_lock);
1540 }
1541
1542 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1543 enum atl1c_trans_queue type)
1544 {
1545 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1546 &adapter->tpd_ring[type];
1547 struct atl1c_buffer *buffer_info;
1548 struct pci_dev *pdev = adapter->pdev;
1549 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1550 u16 hw_next_to_clean;
1551 u16 shift;
1552 u32 data;
1553
1554 if (type == atl1c_trans_high)
1555 shift = MB_HTPD_CONS_IDX_SHIFT;
1556 else
1557 shift = MB_NTPD_CONS_IDX_SHIFT;
1558
1559 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1560 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1561
1562 while (next_to_clean != hw_next_to_clean) {
1563 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1564 atl1c_clean_buffer(pdev, buffer_info, 1);
1565 if (++next_to_clean == tpd_ring->count)
1566 next_to_clean = 0;
1567 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1568 }
1569
1570 if (netif_queue_stopped(adapter->netdev) &&
1571 netif_carrier_ok(adapter->netdev)) {
1572 netif_wake_queue(adapter->netdev);
1573 }
1574
1575 return true;
1576 }
1577
1578 /*
1579 * atl1c_intr - Interrupt Handler
1580 * @irq: interrupt number
1581 * @data: pointer to a network interface device structure
1582 * @pt_regs: CPU registers structure
1583 */
1584 static irqreturn_t atl1c_intr(int irq, void *data)
1585 {
1586 struct net_device *netdev = data;
1587 struct atl1c_adapter *adapter = netdev_priv(netdev);
1588 struct pci_dev *pdev = adapter->pdev;
1589 struct atl1c_hw *hw = &adapter->hw;
1590 int max_ints = AT_MAX_INT_WORK;
1591 int handled = IRQ_NONE;
1592 u32 status;
1593 u32 reg_data;
1594
1595 do {
1596 AT_READ_REG(hw, REG_ISR, &reg_data);
1597 status = reg_data & hw->intr_mask;
1598
1599 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1600 if (max_ints != AT_MAX_INT_WORK)
1601 handled = IRQ_HANDLED;
1602 break;
1603 }
1604 /* link event */
1605 if (status & ISR_GPHY)
1606 atl1c_clear_phy_int(adapter);
1607 /* Ack ISR */
1608 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1609 if (status & ISR_RX_PKT) {
1610 if (likely(napi_schedule_prep(&adapter->napi))) {
1611 hw->intr_mask &= ~ISR_RX_PKT;
1612 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1613 __napi_schedule(&adapter->napi);
1614 }
1615 }
1616 if (status & ISR_TX_PKT)
1617 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1618
1619 handled = IRQ_HANDLED;
1620 /* check if PCIE PHY Link down */
1621 if (status & ISR_ERROR) {
1622 if (netif_msg_hw(adapter))
1623 dev_err(&pdev->dev,
1624 "atl1c hardware error (status = 0x%x)\n",
1625 status & ISR_ERROR);
1626 /* reset MAC */
1627 hw->intr_mask &= ~ISR_ERROR;
1628 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1629 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
1630 schedule_work(&adapter->common_task);
1631 break;
1632 }
1633
1634 if (status & ISR_OVER)
1635 if (netif_msg_intr(adapter))
1636 dev_warn(&pdev->dev,
1637 "TX/RX overflow (status = 0x%x)\n",
1638 status & ISR_OVER);
1639
1640 /* link event */
1641 if (status & (ISR_GPHY | ISR_MANUAL)) {
1642 adapter->net_stats.tx_carrier_errors++;
1643 atl1c_link_chg_event(adapter);
1644 break;
1645 }
1646
1647 } while (--max_ints > 0);
1648 /* re-enable Interrupt*/
1649 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1650 return handled;
1651 }
1652
1653 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1654 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1655 {
1656 /*
1657 * The pid field in RRS in not correct sometimes, so we
1658 * cannot figure out if the packet is fragmented or not,
1659 * so we tell the KERNEL CHECKSUM_NONE
1660 */
1661 skb->ip_summed = CHECKSUM_NONE;
1662 }
1663
1664 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
1665 {
1666 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
1667 struct pci_dev *pdev = adapter->pdev;
1668 struct atl1c_buffer *buffer_info, *next_info;
1669 struct sk_buff *skb;
1670 void *vir_addr = NULL;
1671 u16 num_alloc = 0;
1672 u16 rfd_next_to_use, next_next;
1673 struct atl1c_rx_free_desc *rfd_desc;
1674
1675 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1676 if (++next_next == rfd_ring->count)
1677 next_next = 0;
1678 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1679 next_info = &rfd_ring->buffer_info[next_next];
1680
1681 while (next_info->flags & ATL1C_BUFFER_FREE) {
1682 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1683
1684 skb = dev_alloc_skb(adapter->rx_buffer_len);
1685 if (unlikely(!skb)) {
1686 if (netif_msg_rx_err(adapter))
1687 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1688 break;
1689 }
1690
1691 /*
1692 * Make buffer alignment 2 beyond a 16 byte boundary
1693 * this will result in a 16 byte aligned IP header after
1694 * the 14 byte MAC header is removed
1695 */
1696 vir_addr = skb->data;
1697 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1698 buffer_info->skb = skb;
1699 buffer_info->length = adapter->rx_buffer_len;
1700 buffer_info->dma = pci_map_single(pdev, vir_addr,
1701 buffer_info->length,
1702 PCI_DMA_FROMDEVICE);
1703 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1704 ATL1C_PCIMAP_FROMDEVICE);
1705 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1706 rfd_next_to_use = next_next;
1707 if (++next_next == rfd_ring->count)
1708 next_next = 0;
1709 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1710 next_info = &rfd_ring->buffer_info[next_next];
1711 num_alloc++;
1712 }
1713
1714 if (num_alloc) {
1715 /* TODO: update mailbox here */
1716 wmb();
1717 rfd_ring->next_to_use = rfd_next_to_use;
1718 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
1719 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1720 }
1721
1722 return num_alloc;
1723 }
1724
1725 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1726 struct atl1c_recv_ret_status *rrs, u16 num)
1727 {
1728 u16 i;
1729 /* the relationship between rrd and rfd is one map one */
1730 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1731 rrd_ring->next_to_clean)) {
1732 rrs->word3 &= ~RRS_RXD_UPDATED;
1733 if (++rrd_ring->next_to_clean == rrd_ring->count)
1734 rrd_ring->next_to_clean = 0;
1735 }
1736 }
1737
1738 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1739 struct atl1c_recv_ret_status *rrs, u16 num)
1740 {
1741 u16 i;
1742 u16 rfd_index;
1743 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1744
1745 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1746 RRS_RX_RFD_INDEX_MASK;
1747 for (i = 0; i < num; i++) {
1748 buffer_info[rfd_index].skb = NULL;
1749 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1750 ATL1C_BUFFER_FREE);
1751 if (++rfd_index == rfd_ring->count)
1752 rfd_index = 0;
1753 }
1754 rfd_ring->next_to_clean = rfd_index;
1755 }
1756
1757 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
1758 int *work_done, int work_to_do)
1759 {
1760 u16 rfd_num, rfd_index;
1761 u16 count = 0;
1762 u16 length;
1763 struct pci_dev *pdev = adapter->pdev;
1764 struct net_device *netdev = adapter->netdev;
1765 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
1766 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
1767 struct sk_buff *skb;
1768 struct atl1c_recv_ret_status *rrs;
1769 struct atl1c_buffer *buffer_info;
1770
1771 while (1) {
1772 if (*work_done >= work_to_do)
1773 break;
1774 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1775 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1776 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1777 RRS_RX_RFD_CNT_MASK;
1778 if (unlikely(rfd_num != 1))
1779 /* TODO support mul rfd*/
1780 if (netif_msg_rx_err(adapter))
1781 dev_warn(&pdev->dev,
1782 "Multi rfd not support yet!\n");
1783 goto rrs_checked;
1784 } else {
1785 break;
1786 }
1787 rrs_checked:
1788 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1789 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1790 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1791 if (netif_msg_rx_err(adapter))
1792 dev_warn(&pdev->dev,
1793 "wrong packet! rrs word3 is %x\n",
1794 rrs->word3);
1795 continue;
1796 }
1797
1798 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1799 RRS_PKT_SIZE_MASK);
1800 /* Good Receive */
1801 if (likely(rfd_num == 1)) {
1802 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1803 RRS_RX_RFD_INDEX_MASK;
1804 buffer_info = &rfd_ring->buffer_info[rfd_index];
1805 pci_unmap_single(pdev, buffer_info->dma,
1806 buffer_info->length, PCI_DMA_FROMDEVICE);
1807 skb = buffer_info->skb;
1808 } else {
1809 /* TODO */
1810 if (netif_msg_rx_err(adapter))
1811 dev_warn(&pdev->dev,
1812 "Multi rfd not support yet!\n");
1813 break;
1814 }
1815 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1816 skb_put(skb, length - ETH_FCS_LEN);
1817 skb->protocol = eth_type_trans(skb, netdev);
1818 atl1c_rx_checksum(adapter, skb, rrs);
1819 if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
1820 u16 vlan;
1821
1822 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1823 vlan = le16_to_cpu(vlan);
1824 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
1825 } else
1826 netif_receive_skb(skb);
1827
1828 (*work_done)++;
1829 count++;
1830 }
1831 if (count)
1832 atl1c_alloc_rx_buffer(adapter, que);
1833 }
1834
1835 /*
1836 * atl1c_clean - NAPI Rx polling callback
1837 * @adapter: board private structure
1838 */
1839 static int atl1c_clean(struct napi_struct *napi, int budget)
1840 {
1841 struct atl1c_adapter *adapter =
1842 container_of(napi, struct atl1c_adapter, napi);
1843 int work_done = 0;
1844
1845 /* Keep link state information with original netdev */
1846 if (!netif_carrier_ok(adapter->netdev))
1847 goto quit_polling;
1848 /* just enable one RXQ */
1849 atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
1850
1851 if (work_done < budget) {
1852 quit_polling:
1853 napi_complete(napi);
1854 adapter->hw.intr_mask |= ISR_RX_PKT;
1855 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1856 }
1857 return work_done;
1858 }
1859
1860 #ifdef CONFIG_NET_POLL_CONTROLLER
1861
1862 /*
1863 * Polling 'interrupt' - used by things like netconsole to send skbs
1864 * without having to re-enable interrupts. It's not called while
1865 * the interrupt routine is executing.
1866 */
1867 static void atl1c_netpoll(struct net_device *netdev)
1868 {
1869 struct atl1c_adapter *adapter = netdev_priv(netdev);
1870
1871 disable_irq(adapter->pdev->irq);
1872 atl1c_intr(adapter->pdev->irq, netdev);
1873 enable_irq(adapter->pdev->irq);
1874 }
1875 #endif
1876
1877 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1878 {
1879 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1880 u16 next_to_use = 0;
1881 u16 next_to_clean = 0;
1882
1883 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1884 next_to_use = tpd_ring->next_to_use;
1885
1886 return (u16)(next_to_clean > next_to_use) ?
1887 (next_to_clean - next_to_use - 1) :
1888 (tpd_ring->count + next_to_clean - next_to_use - 1);
1889 }
1890
1891 /*
1892 * get next usable tpd
1893 * Note: should call atl1c_tdp_avail to make sure
1894 * there is enough tpd to use
1895 */
1896 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1897 enum atl1c_trans_queue type)
1898 {
1899 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1900 struct atl1c_tpd_desc *tpd_desc;
1901 u16 next_to_use = 0;
1902
1903 next_to_use = tpd_ring->next_to_use;
1904 if (++tpd_ring->next_to_use == tpd_ring->count)
1905 tpd_ring->next_to_use = 0;
1906 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1907 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1908 return tpd_desc;
1909 }
1910
1911 static struct atl1c_buffer *
1912 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1913 {
1914 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1915
1916 return &tpd_ring->buffer_info[tpd -
1917 (struct atl1c_tpd_desc *)tpd_ring->desc];
1918 }
1919
1920 /* Calculate the transmit packet descript needed*/
1921 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1922 {
1923 u16 tpd_req;
1924 u16 proto_hdr_len = 0;
1925
1926 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1927
1928 if (skb_is_gso(skb)) {
1929 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1930 if (proto_hdr_len < skb_headlen(skb))
1931 tpd_req++;
1932 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1933 tpd_req++;
1934 }
1935 return tpd_req;
1936 }
1937
1938 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1939 struct sk_buff *skb,
1940 struct atl1c_tpd_desc **tpd,
1941 enum atl1c_trans_queue type)
1942 {
1943 struct pci_dev *pdev = adapter->pdev;
1944 u8 hdr_len;
1945 u32 real_len;
1946 unsigned short offload_type;
1947 int err;
1948
1949 if (skb_is_gso(skb)) {
1950 if (skb_header_cloned(skb)) {
1951 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1952 if (unlikely(err))
1953 return -1;
1954 }
1955 offload_type = skb_shinfo(skb)->gso_type;
1956
1957 if (offload_type & SKB_GSO_TCPV4) {
1958 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1959 + ntohs(ip_hdr(skb)->tot_len));
1960
1961 if (real_len < skb->len)
1962 pskb_trim(skb, real_len);
1963
1964 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1965 if (unlikely(skb->len == hdr_len)) {
1966 /* only xsum need */
1967 if (netif_msg_tx_queued(adapter))
1968 dev_warn(&pdev->dev,
1969 "IPV4 tso with zero data??\n");
1970 goto check_sum;
1971 } else {
1972 ip_hdr(skb)->check = 0;
1973 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1974 ip_hdr(skb)->saddr,
1975 ip_hdr(skb)->daddr,
1976 0, IPPROTO_TCP, 0);
1977 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1978 }
1979 }
1980
1981 if (offload_type & SKB_GSO_TCPV6) {
1982 struct atl1c_tpd_ext_desc *etpd =
1983 *(struct atl1c_tpd_ext_desc **)(tpd);
1984
1985 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1986 *tpd = atl1c_get_tpd(adapter, type);
1987 ipv6_hdr(skb)->payload_len = 0;
1988 /* check payload == 0 byte ? */
1989 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1990 if (unlikely(skb->len == hdr_len)) {
1991 /* only xsum need */
1992 if (netif_msg_tx_queued(adapter))
1993 dev_warn(&pdev->dev,
1994 "IPV6 tso with zero data??\n");
1995 goto check_sum;
1996 } else
1997 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1998 &ipv6_hdr(skb)->saddr,
1999 &ipv6_hdr(skb)->daddr,
2000 0, IPPROTO_TCP, 0);
2001 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2002 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2003 etpd->pkt_len = cpu_to_le32(skb->len);
2004 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2005 }
2006
2007 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2008 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2009 TPD_TCPHDR_OFFSET_SHIFT;
2010 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2011 TPD_MSS_SHIFT;
2012 return 0;
2013 }
2014
2015 check_sum:
2016 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2017 u8 css, cso;
2018 cso = skb_transport_offset(skb);
2019
2020 if (unlikely(cso & 0x1)) {
2021 if (netif_msg_tx_err(adapter))
2022 dev_err(&adapter->pdev->dev,
2023 "payload offset should not an event number\n");
2024 return -1;
2025 } else {
2026 css = cso + skb->csum_offset;
2027
2028 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2029 TPD_PLOADOFFSET_SHIFT;
2030 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2031 TPD_CCSUM_OFFSET_SHIFT;
2032 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2033 }
2034 }
2035 return 0;
2036 }
2037
2038 static void atl1c_tx_map(struct atl1c_adapter *adapter,
2039 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2040 enum atl1c_trans_queue type)
2041 {
2042 struct atl1c_tpd_desc *use_tpd = NULL;
2043 struct atl1c_buffer *buffer_info = NULL;
2044 u16 buf_len = skb_headlen(skb);
2045 u16 map_len = 0;
2046 u16 mapped_len = 0;
2047 u16 hdr_len = 0;
2048 u16 nr_frags;
2049 u16 f;
2050 int tso;
2051
2052 nr_frags = skb_shinfo(skb)->nr_frags;
2053 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2054 if (tso) {
2055 /* TSO */
2056 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2057 use_tpd = tpd;
2058
2059 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2060 buffer_info->length = map_len;
2061 buffer_info->dma = pci_map_single(adapter->pdev,
2062 skb->data, hdr_len, PCI_DMA_TODEVICE);
2063 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2064 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2065 ATL1C_PCIMAP_TODEVICE);
2066 mapped_len += map_len;
2067 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2068 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2069 }
2070
2071 if (mapped_len < buf_len) {
2072 /* mapped_len == 0, means we should use the first tpd,
2073 which is given by caller */
2074 if (mapped_len == 0)
2075 use_tpd = tpd;
2076 else {
2077 use_tpd = atl1c_get_tpd(adapter, type);
2078 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2079 }
2080 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2081 buffer_info->length = buf_len - mapped_len;
2082 buffer_info->dma =
2083 pci_map_single(adapter->pdev, skb->data + mapped_len,
2084 buffer_info->length, PCI_DMA_TODEVICE);
2085 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2086 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2087 ATL1C_PCIMAP_TODEVICE);
2088 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2089 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2090 }
2091
2092 for (f = 0; f < nr_frags; f++) {
2093 struct skb_frag_struct *frag;
2094
2095 frag = &skb_shinfo(skb)->frags[f];
2096
2097 use_tpd = atl1c_get_tpd(adapter, type);
2098 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2099
2100 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2101 buffer_info->length = frag->size;
2102 buffer_info->dma =
2103 pci_map_page(adapter->pdev, frag->page,
2104 frag->page_offset,
2105 buffer_info->length,
2106 PCI_DMA_TODEVICE);
2107 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2108 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2109 ATL1C_PCIMAP_TODEVICE);
2110 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2111 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2112 }
2113
2114 /* The last tpd */
2115 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2116 /* The last buffer info contain the skb address,
2117 so it will be free after unmap */
2118 buffer_info->skb = skb;
2119 }
2120
2121 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2122 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2123 {
2124 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2125 u32 prod_data;
2126
2127 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2128 switch (type) {
2129 case atl1c_trans_high:
2130 prod_data &= 0xFFFF0000;
2131 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2132 break;
2133 case atl1c_trans_normal:
2134 prod_data &= 0x0000FFFF;
2135 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2136 break;
2137 default:
2138 break;
2139 }
2140 wmb();
2141 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2142 }
2143
2144 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2145 struct net_device *netdev)
2146 {
2147 struct atl1c_adapter *adapter = netdev_priv(netdev);
2148 unsigned long flags;
2149 u16 tpd_req = 1;
2150 struct atl1c_tpd_desc *tpd;
2151 enum atl1c_trans_queue type = atl1c_trans_normal;
2152
2153 if (test_bit(__AT_DOWN, &adapter->flags)) {
2154 dev_kfree_skb_any(skb);
2155 return NETDEV_TX_OK;
2156 }
2157
2158 tpd_req = atl1c_cal_tpd_req(skb);
2159 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2160 if (netif_msg_pktdata(adapter))
2161 dev_info(&adapter->pdev->dev, "tx locked\n");
2162 return NETDEV_TX_LOCKED;
2163 }
2164 if (skb->mark == 0x01)
2165 type = atl1c_trans_high;
2166 else
2167 type = atl1c_trans_normal;
2168
2169 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2170 /* no enough descriptor, just stop queue */
2171 netif_stop_queue(netdev);
2172 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2173 return NETDEV_TX_BUSY;
2174 }
2175
2176 tpd = atl1c_get_tpd(adapter, type);
2177
2178 /* do TSO and check sum */
2179 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2180 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2181 dev_kfree_skb_any(skb);
2182 return NETDEV_TX_OK;
2183 }
2184
2185 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2186 u16 vlan = vlan_tx_tag_get(skb);
2187 __le16 tag;
2188
2189 vlan = cpu_to_le16(vlan);
2190 AT_VLAN_TO_TAG(vlan, tag);
2191 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2192 tpd->vlan_tag = tag;
2193 }
2194
2195 if (skb_network_offset(skb) != ETH_HLEN)
2196 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2197
2198 atl1c_tx_map(adapter, skb, tpd, type);
2199 atl1c_tx_queue(adapter, skb, tpd, type);
2200
2201 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2202 return NETDEV_TX_OK;
2203 }
2204
2205 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2206 {
2207 struct net_device *netdev = adapter->netdev;
2208
2209 free_irq(adapter->pdev->irq, netdev);
2210
2211 if (adapter->have_msi)
2212 pci_disable_msi(adapter->pdev);
2213 }
2214
2215 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2216 {
2217 struct pci_dev *pdev = adapter->pdev;
2218 struct net_device *netdev = adapter->netdev;
2219 int flags = 0;
2220 int err = 0;
2221
2222 adapter->have_msi = true;
2223 err = pci_enable_msi(adapter->pdev);
2224 if (err) {
2225 if (netif_msg_ifup(adapter))
2226 dev_err(&pdev->dev,
2227 "Unable to allocate MSI interrupt Error: %d\n",
2228 err);
2229 adapter->have_msi = false;
2230 } else
2231 netdev->irq = pdev->irq;
2232
2233 if (!adapter->have_msi)
2234 flags |= IRQF_SHARED;
2235 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2236 netdev->name, netdev);
2237 if (err) {
2238 if (netif_msg_ifup(adapter))
2239 dev_err(&pdev->dev,
2240 "Unable to allocate interrupt Error: %d\n",
2241 err);
2242 if (adapter->have_msi)
2243 pci_disable_msi(adapter->pdev);
2244 return err;
2245 }
2246 if (netif_msg_ifup(adapter))
2247 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2248 return err;
2249 }
2250
2251 int atl1c_up(struct atl1c_adapter *adapter)
2252 {
2253 struct net_device *netdev = adapter->netdev;
2254 int num;
2255 int err;
2256 int i;
2257
2258 netif_carrier_off(netdev);
2259 atl1c_init_ring_ptrs(adapter);
2260 atl1c_set_multi(netdev);
2261 atl1c_restore_vlan(adapter);
2262
2263 for (i = 0; i < adapter->num_rx_queues; i++) {
2264 num = atl1c_alloc_rx_buffer(adapter, i);
2265 if (unlikely(num == 0)) {
2266 err = -ENOMEM;
2267 goto err_alloc_rx;
2268 }
2269 }
2270
2271 if (atl1c_configure(adapter)) {
2272 err = -EIO;
2273 goto err_up;
2274 }
2275
2276 err = atl1c_request_irq(adapter);
2277 if (unlikely(err))
2278 goto err_up;
2279
2280 clear_bit(__AT_DOWN, &adapter->flags);
2281 napi_enable(&adapter->napi);
2282 atl1c_irq_enable(adapter);
2283 atl1c_check_link_status(adapter);
2284 netif_start_queue(netdev);
2285 return err;
2286
2287 err_up:
2288 err_alloc_rx:
2289 atl1c_clean_rx_ring(adapter);
2290 return err;
2291 }
2292
2293 void atl1c_down(struct atl1c_adapter *adapter)
2294 {
2295 struct net_device *netdev = adapter->netdev;
2296
2297 atl1c_del_timer(adapter);
2298 adapter->work_event = 0; /* clear all event */
2299 /* signal that we're down so the interrupt handler does not
2300 * reschedule our watchdog timer */
2301 set_bit(__AT_DOWN, &adapter->flags);
2302 netif_carrier_off(netdev);
2303 napi_disable(&adapter->napi);
2304 atl1c_irq_disable(adapter);
2305 atl1c_free_irq(adapter);
2306 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
2307 /* reset MAC to disable all RX/TX */
2308 atl1c_reset_mac(&adapter->hw);
2309 msleep(1);
2310
2311 adapter->link_speed = SPEED_0;
2312 adapter->link_duplex = -1;
2313 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2314 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2315 atl1c_clean_rx_ring(adapter);
2316 }
2317
2318 /*
2319 * atl1c_open - Called when a network interface is made active
2320 * @netdev: network interface device structure
2321 *
2322 * Returns 0 on success, negative value on failure
2323 *
2324 * The open entry point is called when a network interface is made
2325 * active by the system (IFF_UP). At this point all resources needed
2326 * for transmit and receive operations are allocated, the interrupt
2327 * handler is registered with the OS, the watchdog timer is started,
2328 * and the stack is notified that the interface is ready.
2329 */
2330 static int atl1c_open(struct net_device *netdev)
2331 {
2332 struct atl1c_adapter *adapter = netdev_priv(netdev);
2333 int err;
2334
2335 /* disallow open during test */
2336 if (test_bit(__AT_TESTING, &adapter->flags))
2337 return -EBUSY;
2338
2339 /* allocate rx/tx dma buffer & descriptors */
2340 err = atl1c_setup_ring_resources(adapter);
2341 if (unlikely(err))
2342 return err;
2343
2344 err = atl1c_up(adapter);
2345 if (unlikely(err))
2346 goto err_up;
2347
2348 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2349 u32 phy_data;
2350
2351 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2352 phy_data |= MDIO_AP_EN;
2353 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2354 }
2355 return 0;
2356
2357 err_up:
2358 atl1c_free_irq(adapter);
2359 atl1c_free_ring_resources(adapter);
2360 atl1c_reset_mac(&adapter->hw);
2361 return err;
2362 }
2363
2364 /*
2365 * atl1c_close - Disables a network interface
2366 * @netdev: network interface device structure
2367 *
2368 * Returns 0, this is not allowed to fail
2369 *
2370 * The close entry point is called when an interface is de-activated
2371 * by the OS. The hardware is still under the drivers control, but
2372 * needs to be disabled. A global MAC reset is issued to stop the
2373 * hardware, and all transmit and receive resources are freed.
2374 */
2375 static int atl1c_close(struct net_device *netdev)
2376 {
2377 struct atl1c_adapter *adapter = netdev_priv(netdev);
2378
2379 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2380 atl1c_down(adapter);
2381 atl1c_free_ring_resources(adapter);
2382 return 0;
2383 }
2384
2385 static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
2386 {
2387 struct net_device *netdev = pci_get_drvdata(pdev);
2388 struct atl1c_adapter *adapter = netdev_priv(netdev);
2389 struct atl1c_hw *hw = &adapter->hw;
2390 u32 ctrl;
2391 u32 mac_ctrl_data;
2392 u32 master_ctrl_data;
2393 u32 wol_ctrl_data = 0;
2394 u16 mii_bmsr_data;
2395 u16 save_autoneg_advertised;
2396 u16 mii_intr_status_data;
2397 u32 wufc = adapter->wol;
2398 u32 i;
2399 int retval = 0;
2400
2401 if (netif_running(netdev)) {
2402 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2403 atl1c_down(adapter);
2404 }
2405 netif_device_detach(netdev);
2406 atl1c_disable_l0s_l1(hw);
2407 retval = pci_save_state(pdev);
2408 if (retval)
2409 return retval;
2410 if (wufc) {
2411 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2412 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2413
2414 /* get link status */
2415 atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2416 atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2417 save_autoneg_advertised = hw->autoneg_advertised;
2418 hw->autoneg_advertised = ADVERTISED_10baseT_Half;
2419 if (atl1c_restart_autoneg(hw) != 0)
2420 if (netif_msg_link(adapter))
2421 dev_warn(&pdev->dev, "phy autoneg failed\n");
2422 hw->phy_configured = false; /* re-init PHY when resume */
2423 hw->autoneg_advertised = save_autoneg_advertised;
2424 /* turn on magic packet wol */
2425 if (wufc & AT_WUFC_MAG)
2426 wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2427
2428 if (wufc & AT_WUFC_LNKC) {
2429 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2430 msleep(100);
2431 atl1c_read_phy_reg(hw, MII_BMSR,
2432 (u16 *)&mii_bmsr_data);
2433 if (mii_bmsr_data & BMSR_LSTATUS)
2434 break;
2435 }
2436 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2437 if (netif_msg_link(adapter))
2438 dev_warn(&pdev->dev,
2439 "%s: Link may change"
2440 "when suspend\n",
2441 atl1c_driver_name);
2442 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2443 /* only link up can wake up */
2444 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2445 if (netif_msg_link(adapter))
2446 dev_err(&pdev->dev,
2447 "%s: read write phy "
2448 "register failed.\n",
2449 atl1c_driver_name);
2450 goto wol_dis;
2451 }
2452 }
2453 /* clear phy interrupt */
2454 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2455 /* Config MAC Ctrl register */
2456 mac_ctrl_data = MAC_CTRL_RX_EN;
2457 /* set to 10/100M halt duplex */
2458 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2459 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2460 MAC_CTRL_PRMLEN_MASK) <<
2461 MAC_CTRL_PRMLEN_SHIFT);
2462
2463 if (adapter->vlgrp)
2464 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2465
2466 /* magic packet maybe Broadcast&multicast&Unicast frame */
2467 if (wufc & AT_WUFC_MAG)
2468 mac_ctrl_data |= MAC_CTRL_BC_EN;
2469
2470 if (netif_msg_hw(adapter))
2471 dev_dbg(&pdev->dev,
2472 "%s: suspend MAC=0x%x\n",
2473 atl1c_driver_name, mac_ctrl_data);
2474 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2475 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2476 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2477
2478 /* pcie patch */
2479 AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
2480 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2481 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2482
2483 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2484 goto suspend_exit;
2485 }
2486 wol_dis:
2487
2488 /* WOL disabled */
2489 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2490
2491 /* pcie patch */
2492 AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
2493 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2494 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2495
2496 atl1c_phy_disable(hw);
2497 hw->phy_configured = false; /* re-init PHY when resume */
2498
2499 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2500 suspend_exit:
2501
2502 pci_disable_device(pdev);
2503 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2504
2505 return 0;
2506 }
2507
2508 static int atl1c_resume(struct pci_dev *pdev)
2509 {
2510 struct net_device *netdev = pci_get_drvdata(pdev);
2511 struct atl1c_adapter *adapter = netdev_priv(netdev);
2512
2513 pci_set_power_state(pdev, PCI_D0);
2514 pci_restore_state(pdev);
2515 pci_enable_wake(pdev, PCI_D3hot, 0);
2516 pci_enable_wake(pdev, PCI_D3cold, 0);
2517
2518 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2519
2520 atl1c_phy_reset(&adapter->hw);
2521 atl1c_reset_mac(&adapter->hw);
2522 netif_device_attach(netdev);
2523 if (netif_running(netdev))
2524 atl1c_up(adapter);
2525
2526 return 0;
2527 }
2528
2529 static void atl1c_shutdown(struct pci_dev *pdev)
2530 {
2531 atl1c_suspend(pdev, PMSG_SUSPEND);
2532 }
2533
2534 static const struct net_device_ops atl1c_netdev_ops = {
2535 .ndo_open = atl1c_open,
2536 .ndo_stop = atl1c_close,
2537 .ndo_validate_addr = eth_validate_addr,
2538 .ndo_start_xmit = atl1c_xmit_frame,
2539 .ndo_set_mac_address = atl1c_set_mac_addr,
2540 .ndo_set_multicast_list = atl1c_set_multi,
2541 .ndo_change_mtu = atl1c_change_mtu,
2542 .ndo_do_ioctl = atl1c_ioctl,
2543 .ndo_tx_timeout = atl1c_tx_timeout,
2544 .ndo_get_stats = atl1c_get_stats,
2545 .ndo_vlan_rx_register = atl1c_vlan_rx_register,
2546 #ifdef CONFIG_NET_POLL_CONTROLLER
2547 .ndo_poll_controller = atl1c_netpoll,
2548 #endif
2549 };
2550
2551 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2552 {
2553 SET_NETDEV_DEV(netdev, &pdev->dev);
2554 pci_set_drvdata(pdev, netdev);
2555
2556 netdev->irq = pdev->irq;
2557 netdev->netdev_ops = &atl1c_netdev_ops;
2558 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2559 atl1c_set_ethtool_ops(netdev);
2560
2561 /* TODO: add when ready */
2562 netdev->features = NETIF_F_SG |
2563 NETIF_F_HW_CSUM |
2564 NETIF_F_HW_VLAN_TX |
2565 NETIF_F_HW_VLAN_RX |
2566 NETIF_F_TSO |
2567 NETIF_F_TSO6;
2568 return 0;
2569 }
2570
2571 /*
2572 * atl1c_probe - Device Initialization Routine
2573 * @pdev: PCI device information struct
2574 * @ent: entry in atl1c_pci_tbl
2575 *
2576 * Returns 0 on success, negative on failure
2577 *
2578 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2579 * The OS initialization, configuring of the adapter private structure,
2580 * and a hardware reset occur.
2581 */
2582 static int __devinit atl1c_probe(struct pci_dev *pdev,
2583 const struct pci_device_id *ent)
2584 {
2585 struct net_device *netdev;
2586 struct atl1c_adapter *adapter;
2587 static int cards_found;
2588
2589 int err = 0;
2590
2591 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2592 err = pci_enable_device_mem(pdev);
2593 if (err) {
2594 dev_err(&pdev->dev, "cannot enable PCI device\n");
2595 return err;
2596 }
2597
2598 /*
2599 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2600 * shared register for the high 32 bits, so only a single, aligned,
2601 * 4 GB physical address range can be used at a time.
2602 *
2603 * Supporting 64-bit DMA on this hardware is more trouble than it's
2604 * worth. It is far easier to limit to 32-bit DMA than update
2605 * various kernel subsystems to support the mechanics required by a
2606 * fixed-high-32-bit system.
2607 */
2608 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2609 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2610 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2611 goto err_dma;
2612 }
2613
2614 err = pci_request_regions(pdev, atl1c_driver_name);
2615 if (err) {
2616 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2617 goto err_pci_reg;
2618 }
2619
2620 pci_set_master(pdev);
2621
2622 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2623 if (netdev == NULL) {
2624 err = -ENOMEM;
2625 dev_err(&pdev->dev, "etherdev alloc failed\n");
2626 goto err_alloc_etherdev;
2627 }
2628
2629 err = atl1c_init_netdev(netdev, pdev);
2630 if (err) {
2631 dev_err(&pdev->dev, "init netdevice failed\n");
2632 goto err_init_netdev;
2633 }
2634 adapter = netdev_priv(netdev);
2635 adapter->bd_number = cards_found;
2636 adapter->netdev = netdev;
2637 adapter->pdev = pdev;
2638 adapter->hw.adapter = adapter;
2639 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2640 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2641 if (!adapter->hw.hw_addr) {
2642 err = -EIO;
2643 dev_err(&pdev->dev, "cannot map device registers\n");
2644 goto err_ioremap;
2645 }
2646 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2647
2648 /* init mii data */
2649 adapter->mii.dev = netdev;
2650 adapter->mii.mdio_read = atl1c_mdio_read;
2651 adapter->mii.mdio_write = atl1c_mdio_write;
2652 adapter->mii.phy_id_mask = 0x1f;
2653 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2654 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2655 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2656 (unsigned long)adapter);
2657 /* setup the private structure */
2658 err = atl1c_sw_init(adapter);
2659 if (err) {
2660 dev_err(&pdev->dev, "net device private data init failed\n");
2661 goto err_sw_init;
2662 }
2663 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2664 ATL1C_PCIE_PHY_RESET);
2665
2666 /* Init GPHY as early as possible due to power saving issue */
2667 atl1c_phy_reset(&adapter->hw);
2668
2669 err = atl1c_reset_mac(&adapter->hw);
2670 if (err) {
2671 err = -EIO;
2672 goto err_reset;
2673 }
2674
2675 device_init_wakeup(&pdev->dev, 1);
2676 /* reset the controller to
2677 * put the device in a known good starting state */
2678 err = atl1c_phy_init(&adapter->hw);
2679 if (err) {
2680 err = -EIO;
2681 goto err_reset;
2682 }
2683 if (atl1c_read_mac_addr(&adapter->hw) != 0) {
2684 err = -EIO;
2685 dev_err(&pdev->dev, "get mac address failed\n");
2686 goto err_eeprom;
2687 }
2688 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2689 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2690 if (netif_msg_probe(adapter))
2691 dev_dbg(&pdev->dev, "mac address : %pM\n",
2692 adapter->hw.mac_addr);
2693
2694 atl1c_hw_set_mac_addr(&adapter->hw);
2695 INIT_WORK(&adapter->common_task, atl1c_common_task);
2696 adapter->work_event = 0;
2697 err = register_netdev(netdev);
2698 if (err) {
2699 dev_err(&pdev->dev, "register netdevice failed\n");
2700 goto err_register;
2701 }
2702
2703 if (netif_msg_probe(adapter))
2704 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2705 cards_found++;
2706 return 0;
2707
2708 err_reset:
2709 err_register:
2710 err_sw_init:
2711 err_eeprom:
2712 iounmap(adapter->hw.hw_addr);
2713 err_init_netdev:
2714 err_ioremap:
2715 free_netdev(netdev);
2716 err_alloc_etherdev:
2717 pci_release_regions(pdev);
2718 err_pci_reg:
2719 err_dma:
2720 pci_disable_device(pdev);
2721 return err;
2722 }
2723
2724 /*
2725 * atl1c_remove - Device Removal Routine
2726 * @pdev: PCI device information struct
2727 *
2728 * atl1c_remove is called by the PCI subsystem to alert the driver
2729 * that it should release a PCI device. The could be caused by a
2730 * Hot-Plug event, or because the driver is going to be removed from
2731 * memory.
2732 */
2733 static void __devexit atl1c_remove(struct pci_dev *pdev)
2734 {
2735 struct net_device *netdev = pci_get_drvdata(pdev);
2736 struct atl1c_adapter *adapter = netdev_priv(netdev);
2737
2738 unregister_netdev(netdev);
2739 atl1c_phy_disable(&adapter->hw);
2740
2741 iounmap(adapter->hw.hw_addr);
2742
2743 pci_release_regions(pdev);
2744 pci_disable_device(pdev);
2745 free_netdev(netdev);
2746 }
2747
2748 /*
2749 * atl1c_io_error_detected - called when PCI error is detected
2750 * @pdev: Pointer to PCI device
2751 * @state: The current pci connection state
2752 *
2753 * This function is called after a PCI bus error affecting
2754 * this device has been detected.
2755 */
2756 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2757 pci_channel_state_t state)
2758 {
2759 struct net_device *netdev = pci_get_drvdata(pdev);
2760 struct atl1c_adapter *adapter = netdev_priv(netdev);
2761
2762 netif_device_detach(netdev);
2763
2764 if (state == pci_channel_io_perm_failure)
2765 return PCI_ERS_RESULT_DISCONNECT;
2766
2767 if (netif_running(netdev))
2768 atl1c_down(adapter);
2769
2770 pci_disable_device(pdev);
2771
2772 /* Request a slot slot reset. */
2773 return PCI_ERS_RESULT_NEED_RESET;
2774 }
2775
2776 /*
2777 * atl1c_io_slot_reset - called after the pci bus has been reset.
2778 * @pdev: Pointer to PCI device
2779 *
2780 * Restart the card from scratch, as if from a cold-boot. Implementation
2781 * resembles the first-half of the e1000_resume routine.
2782 */
2783 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2784 {
2785 struct net_device *netdev = pci_get_drvdata(pdev);
2786 struct atl1c_adapter *adapter = netdev_priv(netdev);
2787
2788 if (pci_enable_device(pdev)) {
2789 if (netif_msg_hw(adapter))
2790 dev_err(&pdev->dev,
2791 "Cannot re-enable PCI device after reset\n");
2792 return PCI_ERS_RESULT_DISCONNECT;
2793 }
2794 pci_set_master(pdev);
2795
2796 pci_enable_wake(pdev, PCI_D3hot, 0);
2797 pci_enable_wake(pdev, PCI_D3cold, 0);
2798
2799 atl1c_reset_mac(&adapter->hw);
2800
2801 return PCI_ERS_RESULT_RECOVERED;
2802 }
2803
2804 /*
2805 * atl1c_io_resume - called when traffic can start flowing again.
2806 * @pdev: Pointer to PCI device
2807 *
2808 * This callback is called when the error recovery driver tells us that
2809 * its OK to resume normal operation. Implementation resembles the
2810 * second-half of the atl1c_resume routine.
2811 */
2812 static void atl1c_io_resume(struct pci_dev *pdev)
2813 {
2814 struct net_device *netdev = pci_get_drvdata(pdev);
2815 struct atl1c_adapter *adapter = netdev_priv(netdev);
2816
2817 if (netif_running(netdev)) {
2818 if (atl1c_up(adapter)) {
2819 if (netif_msg_hw(adapter))
2820 dev_err(&pdev->dev,
2821 "Cannot bring device back up after reset\n");
2822 return;
2823 }
2824 }
2825
2826 netif_device_attach(netdev);
2827 }
2828
2829 static struct pci_error_handlers atl1c_err_handler = {
2830 .error_detected = atl1c_io_error_detected,
2831 .slot_reset = atl1c_io_slot_reset,
2832 .resume = atl1c_io_resume,
2833 };
2834
2835 static struct pci_driver atl1c_driver = {
2836 .name = atl1c_driver_name,
2837 .id_table = atl1c_pci_tbl,
2838 .probe = atl1c_probe,
2839 .remove = __devexit_p(atl1c_remove),
2840 /* Power Managment Hooks */
2841 .suspend = atl1c_suspend,
2842 .resume = atl1c_resume,
2843 .shutdown = atl1c_shutdown,
2844 .err_handler = &atl1c_err_handler
2845 };
2846
2847 /*
2848 * atl1c_init_module - Driver Registration Routine
2849 *
2850 * atl1c_init_module is the first routine called when the driver is
2851 * loaded. All it does is register with the PCI subsystem.
2852 */
2853 static int __init atl1c_init_module(void)
2854 {
2855 return pci_register_driver(&atl1c_driver);
2856 }
2857
2858 /*
2859 * atl1c_exit_module - Driver Exit Cleanup Routine
2860 *
2861 * atl1c_exit_module is called just before the driver is removed
2862 * from memory.
2863 */
2864 static void __exit atl1c_exit_module(void)
2865 {
2866 pci_unregister_driver(&atl1c_driver);
2867 }
2868
2869 module_init(atl1c_init_module);
2870 module_exit(atl1c_exit_module);
Linux with added FPC-III support