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powerpc/ps3: Make ps3av_set_video_mode mode ID signed
[linux/fpc-iii.git] / sound / pci / cs46xx / dsp_spos.c
blobf4f0c8f5dad76ab71cf57eaf835bfda69922c972
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 *
16 */
17
18 /*
19 * 2002-07 Benny Sjostrand benny@hostmobility.com
20 */
21
22
23 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/pm.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/vmalloc.h>
29 #include <linux/mutex.h>
30
31 #include <sound/core.h>
32 #include <sound/control.h>
33 #include <sound/info.h>
34 #include <sound/asoundef.h>
35 #include <sound/cs46xx.h>
36
37 #include "cs46xx_lib.h"
38 #include "dsp_spos.h"
39
40 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
41 struct dsp_scb_descriptor * fg_entry);
42
43 static enum wide_opcode wide_opcodes[] = {
44 WIDE_FOR_BEGIN_LOOP,
45 WIDE_FOR_BEGIN_LOOP2,
46 WIDE_COND_GOTO_ADDR,
47 WIDE_COND_GOTO_CALL,
48 WIDE_TBEQ_COND_GOTO_ADDR,
49 WIDE_TBEQ_COND_CALL_ADDR,
50 WIDE_TBEQ_NCOND_GOTO_ADDR,
51 WIDE_TBEQ_NCOND_CALL_ADDR,
52 WIDE_TBEQ_COND_GOTO1_ADDR,
53 WIDE_TBEQ_COND_CALL1_ADDR,
54 WIDE_TBEQ_NCOND_GOTOI_ADDR,
55 WIDE_TBEQ_NCOND_CALL1_ADDR
56 };
57
58 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
59 u32 overlay_begin_address)
60 {
61 unsigned int i = 0, j, nreallocated = 0;
62 u32 hival,loval,address;
63 u32 mop_operands,mop_type,wide_op;
64 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
65
66 if (snd_BUG_ON(size %2))
67 return -EINVAL;
68
69 while (i < size) {
70 loval = data[i++];
71 hival = data[i++];
72
73 if (ins->code.offset > 0) {
74 mop_operands = (hival >> 6) & 0x03fff;
75 mop_type = mop_operands >> 10;
76
77 /* check for wide type instruction */
78 if (mop_type == 0 &&
79 (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
80 (mop_operands & WIDE_INSTR_MASK) != 0) {
81 wide_op = loval & 0x7f;
82 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
83 if (wide_opcodes[j] == wide_op) {
84 /* need to reallocate instruction */
85 address = (hival & 0x00FFF) << 5;
86 address |= loval >> 15;
87
88 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
89
90 if ( !(address & 0x8000) ) {
91 address += (ins->code.offset / 2) - overlay_begin_address;
92 } else {
93 snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
94 }
95
96 hival &= 0xFF000;
97 loval &= 0x07FFF;
98
99 hival |= ( (address >> 5) & 0x00FFF);
100 loval |= ( (address << 15) & 0xF8000);
101
102 address = (hival & 0x00FFF) << 5;
103 address |= loval >> 15;
104
105 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
106 nreallocated ++;
107 } /* wide_opcodes[j] == wide_op */
108 } /* for */
109 } /* mod_type == 0 ... */
110 } /* ins->code.offset > 0 */
111
112 ins->code.data[ins->code.size++] = loval;
113 ins->code.data[ins->code.size++] = hival;
114 }
115
116 snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
117 return nreallocated;
118 }
119
120 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
121 {
122 int i;
123 for (i = 0;i < module->nsegments; ++i) {
124 if (module->segments[i].segment_type == seg_type) {
125 return (module->segments + i);
126 }
127 }
128
129 return NULL;
130 };
131
132 static int find_free_symbol_index (struct dsp_spos_instance * ins)
133 {
134 int index = ins->symbol_table.nsymbols,i;
135
136 for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
137 if (ins->symbol_table.symbols[i].deleted) {
138 index = i;
139 break;
140 }
141 }
142
143 return index;
144 }
145
146 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
147 {
148 int i;
149 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
150
151 if (module->symbol_table.nsymbols > 0) {
152 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
153 module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
154 module->overlay_begin_address = module->symbol_table.symbols[0].address;
155 }
156 }
157
158 for (i = 0;i < module->symbol_table.nsymbols; ++i) {
159 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
160 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
161 return -ENOMEM;
162 }
163
164
165 if (cs46xx_dsp_lookup_symbol(chip,
166 module->symbol_table.symbols[i].symbol_name,
167 module->symbol_table.symbols[i].symbol_type) == NULL) {
168
169 ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
170 ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
171 ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
172 ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
173
174 if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
175 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
176
177 ins->symbol_table.nsymbols++;
178 } else {
179 /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
180 module->symbol_table.symbols[i].symbol_name); */
181 }
182 }
183
184 return 0;
185 }
186
187 static struct dsp_symbol_entry *
188 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
189 {
190 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
191 struct dsp_symbol_entry * symbol = NULL;
192 int index;
193
194 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
195 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
196 return NULL;
197 }
198
199 if (cs46xx_dsp_lookup_symbol(chip,
200 symbol_name,
201 type) != NULL) {
202 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
203 return NULL;
204 }
205
206 index = find_free_symbol_index (ins);
207
208 strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
209 ins->symbol_table.symbols[index].address = address;
210 ins->symbol_table.symbols[index].symbol_type = type;
211 ins->symbol_table.symbols[index].module = NULL;
212 ins->symbol_table.symbols[index].deleted = 0;
213 symbol = (ins->symbol_table.symbols + index);
214
215 if (index > ins->symbol_table.highest_frag_index)
216 ins->symbol_table.highest_frag_index = index;
217
218 if (index == ins->symbol_table.nsymbols)
219 ins->symbol_table.nsymbols++; /* no frag. in list */
220
221 return symbol;
222 }
223
224 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
225 {
226 struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
227
228 if (ins == NULL)
229 return NULL;
230
231 /* better to use vmalloc for this big table */
232 ins->symbol_table.nsymbols = 0;
233 ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
234 DSP_MAX_SYMBOLS);
235 ins->symbol_table.highest_frag_index = 0;
236
237 if (ins->symbol_table.symbols == NULL) {
238 cs46xx_dsp_spos_destroy(chip);
239 goto error;
240 }
241
242 ins->code.offset = 0;
243 ins->code.size = 0;
244 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
245
246 if (ins->code.data == NULL) {
247 cs46xx_dsp_spos_destroy(chip);
248 goto error;
249 }
250
251 ins->nscb = 0;
252 ins->ntask = 0;
253
254 ins->nmodules = 0;
255 ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
256
257 if (ins->modules == NULL) {
258 cs46xx_dsp_spos_destroy(chip);
259 goto error;
260 }
261
262 /* default SPDIF input sample rate
263 to 48000 khz */
264 ins->spdif_in_sample_rate = 48000;
265
266 /* maximize volume */
267 ins->dac_volume_right = 0x8000;
268 ins->dac_volume_left = 0x8000;
269 ins->spdif_input_volume_right = 0x8000;
270 ins->spdif_input_volume_left = 0x8000;
271
272 /* set left and right validity bits and
273 default channel status */
274 ins->spdif_csuv_default =
275 ins->spdif_csuv_stream =
276 /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) |
277 /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
278 /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
279 /* left and right validity bits */ (1 << 13) | (1 << 12);
280
281 return ins;
282
283 error:
284 kfree(ins);
285 return NULL;
286 }
287
288 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
289 {
290 int i;
291 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
292
293 if (snd_BUG_ON(!ins))
294 return;
295
296 mutex_lock(&chip->spos_mutex);
297 for (i = 0; i < ins->nscb; ++i) {
298 if (ins->scbs[i].deleted) continue;
299
300 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
301 }
302
303 kfree(ins->code.data);
304 vfree(ins->symbol_table.symbols);
305 kfree(ins->modules);
306 kfree(ins);
307 mutex_unlock(&chip->spos_mutex);
308 }
309
310 static int dsp_load_parameter(struct snd_cs46xx *chip,
311 struct dsp_segment_desc *parameter)
312 {
313 u32 doffset, dsize;
314
315 if (!parameter) {
316 snd_printdd("dsp_spos: module got no parameter segment\n");
317 return 0;
318 }
319
320 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
321 dsize = parameter->size * 4;
322
323 snd_printdd("dsp_spos: "
324 "downloading parameter data to chip (%08x-%08x)\n",
325 doffset,doffset + dsize);
326 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
327 snd_printk(KERN_ERR "dsp_spos: "
328 "failed to download parameter data to DSP\n");
329 return -EINVAL;
330 }
331 return 0;
332 }
333
334 static int dsp_load_sample(struct snd_cs46xx *chip,
335 struct dsp_segment_desc *sample)
336 {
337 u32 doffset, dsize;
338
339 if (!sample) {
340 snd_printdd("dsp_spos: module got no sample segment\n");
341 return 0;
342 }
343
344 doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET);
345 dsize = sample->size * 4;
346
347 snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
348 doffset,doffset + dsize);
349
350 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
351 snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
352 return -EINVAL;
353 }
354 return 0;
355 }
356
357 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
358 {
359 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
360 struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
361 u32 doffset, dsize;
362 int err;
363
364 if (ins->nmodules == DSP_MAX_MODULES - 1) {
365 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
366 return -ENOMEM;
367 }
368
369 snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
370
371 if (ins->nmodules == 0) {
372 snd_printdd("dsp_spos: clearing parameter area\n");
373 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
374 }
375
376 err = dsp_load_parameter(chip, get_segment_desc(module,
377 SEGTYPE_SP_PARAMETER));
378 if (err < 0)
379 return err;
380
381 if (ins->nmodules == 0) {
382 snd_printdd("dsp_spos: clearing sample area\n");
383 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
384 }
385
386 err = dsp_load_sample(chip, get_segment_desc(module,
387 SEGTYPE_SP_SAMPLE));
388 if (err < 0)
389 return err;
390
391 if (ins->nmodules == 0) {
392 snd_printdd("dsp_spos: clearing code area\n");
393 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
394 }
395
396 if (code == NULL) {
397 snd_printdd("dsp_spos: module got no code segment\n");
398 } else {
399 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
400 snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
401 return -ENOMEM;
402 }
403
404 module->load_address = ins->code.offset;
405 module->overlay_begin_address = 0x000;
406
407 /* if module has a code segment it must have
408 symbol table */
409 if (snd_BUG_ON(!module->symbol_table.symbols))
410 return -ENOMEM;
411 if (add_symbols(chip,module)) {
412 snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
413 return -ENOMEM;
414 }
415
416 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
417 dsize = code->size * 4;
418 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
419 doffset,doffset + dsize);
420
421 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
422
423 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
424 snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
425 return -EINVAL;
426 }
427
428 ins->code.offset += code->size;
429 }
430
431 /* NOTE: module segments and symbol table must be
432 statically allocated. Case that module data is
433 not generated by the ospparser */
434 ins->modules[ins->nmodules] = *module;
435 ins->nmodules++;
436
437 return 0;
438 }
439
440 struct dsp_symbol_entry *
441 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
442 {
443 int i;
444 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
445
446 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
447
448 if (ins->symbol_table.symbols[i].deleted)
449 continue;
450
451 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
452 ins->symbol_table.symbols[i].symbol_type == symbol_type) {
453 return (ins->symbol_table.symbols + i);
454 }
455 }
456
457 #if 0
458 printk ("dsp_spos: symbol <%s> type %02x not found\n",
459 symbol_name,symbol_type);
460 #endif
461
462 return NULL;
463 }
464
465
466 #ifdef CONFIG_PROC_FS
467 static struct dsp_symbol_entry *
468 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
469 {
470 int i;
471 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
472
473 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
474
475 if (ins->symbol_table.symbols[i].deleted)
476 continue;
477
478 if (ins->symbol_table.symbols[i].address == address &&
479 ins->symbol_table.symbols[i].symbol_type == symbol_type) {
480 return (ins->symbol_table.symbols + i);
481 }
482 }
483
484
485 return NULL;
486 }
487
488
489 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
490 struct snd_info_buffer *buffer)
491 {
492 struct snd_cs46xx *chip = entry->private_data;
493 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
494 int i;
495
496 snd_iprintf(buffer, "SYMBOLS:\n");
497 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
498 char *module_str = "system";
499
500 if (ins->symbol_table.symbols[i].deleted)
501 continue;
502
503 if (ins->symbol_table.symbols[i].module != NULL) {
504 module_str = ins->symbol_table.symbols[i].module->module_name;
505 }
506
507
508 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
509 ins->symbol_table.symbols[i].address,
510 ins->symbol_table.symbols[i].symbol_type,
511 ins->symbol_table.symbols[i].symbol_name,
512 module_str);
513 }
514 }
515
516
517 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
518 struct snd_info_buffer *buffer)
519 {
520 struct snd_cs46xx *chip = entry->private_data;
521 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
522 int i,j;
523
524 mutex_lock(&chip->spos_mutex);
525 snd_iprintf(buffer, "MODULES:\n");
526 for ( i = 0; i < ins->nmodules; ++i ) {
527 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
528 snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols);
529 snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups);
530
531 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
532 struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
533 snd_iprintf(buffer, " segment %02x offset %08x size %08x\n",
534 desc->segment_type,desc->offset, desc->size);
535 }
536 }
537 mutex_unlock(&chip->spos_mutex);
538 }
539
540 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
541 struct snd_info_buffer *buffer)
542 {
543 struct snd_cs46xx *chip = entry->private_data;
544 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
545 int i, j, col;
546 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
547
548 mutex_lock(&chip->spos_mutex);
549 snd_iprintf(buffer, "TASK TREES:\n");
550 for ( i = 0; i < ins->ntask; ++i) {
551 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
552
553 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
554 u32 val;
555 if (col == 4) {
556 snd_iprintf(buffer,"\n");
557 col = 0;
558 }
559 val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
560 snd_iprintf(buffer,"%08x ",val);
561 }
562 }
563
564 snd_iprintf(buffer,"\n");
565 mutex_unlock(&chip->spos_mutex);
566 }
567
568 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
569 struct snd_info_buffer *buffer)
570 {
571 struct snd_cs46xx *chip = entry->private_data;
572 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
573 int i;
574
575 mutex_lock(&chip->spos_mutex);
576 snd_iprintf(buffer, "SCB's:\n");
577 for ( i = 0; i < ins->nscb; ++i) {
578 if (ins->scbs[i].deleted)
579 continue;
580 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
581
582 if (ins->scbs[i].parent_scb_ptr != NULL) {
583 snd_iprintf(buffer,"parent [%s:%04x] ",
584 ins->scbs[i].parent_scb_ptr->scb_name,
585 ins->scbs[i].parent_scb_ptr->address);
586 } else snd_iprintf(buffer,"parent [none] ");
587
588 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n",
589 ins->scbs[i].sub_list_ptr->scb_name,
590 ins->scbs[i].sub_list_ptr->address,
591 ins->scbs[i].next_scb_ptr->scb_name,
592 ins->scbs[i].next_scb_ptr->address,
593 ins->scbs[i].task_entry->symbol_name,
594 ins->scbs[i].task_entry->address);
595 }
596
597 snd_iprintf(buffer,"\n");
598 mutex_unlock(&chip->spos_mutex);
599 }
600
601 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
602 struct snd_info_buffer *buffer)
603 {
604 struct snd_cs46xx *chip = entry->private_data;
605 /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
606 unsigned int i, col = 0;
607 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
608 struct dsp_symbol_entry * symbol;
609
610 for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
611 if (col == 4) {
612 snd_iprintf(buffer,"\n");
613 col = 0;
614 }
615
616 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
617 col = 0;
618 snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
619 }
620
621 if (col == 0) {
622 snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
623 }
624
625 snd_iprintf(buffer,"%08X ",readl(dst + i));
626 }
627 }
628
629 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
630 struct snd_info_buffer *buffer)
631 {
632 struct snd_cs46xx *chip = entry->private_data;
633 int i,col = 0;
634 void __iomem *dst = chip->region.idx[2].remap_addr;
635
636 snd_iprintf(buffer,"PCMREADER:\n");
637 for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
638 if (col == 4) {
639 snd_iprintf(buffer,"\n");
640 col = 0;
641 }
642
643 if (col == 0) {
644 snd_iprintf(buffer, "%04X ",i);
645 }
646
647 snd_iprintf(buffer,"%08X ",readl(dst + i));
648 }
649
650 snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
651
652 col = 0;
653 for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
654 if (col == 4) {
655 snd_iprintf(buffer,"\n");
656 col = 0;
657 }
658
659 if (col == 0) {
660 snd_iprintf(buffer, "%04X ",i);
661 }
662
663 snd_iprintf(buffer,"%08X ",readl(dst + i));
664 }
665
666 snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
667 col = 0;
668 for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
669 if (col == 4) {
670 snd_iprintf(buffer,"\n");
671 col = 0;
672 }
673
674 if (col == 0) {
675 snd_iprintf(buffer, "%04X ",i);
676 }
677
678 snd_iprintf(buffer,"%08X ",readl(dst + i));
679 }
680
681
682 snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
683 col = 0;
684 for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
685 if (col == 4) {
686 snd_iprintf(buffer,"\n");
687 col = 0;
688 }
689
690 if (col == 0) {
691 snd_iprintf(buffer, "%04X ",i);
692 }
693
694 snd_iprintf(buffer,"%08X ",readl(dst + i));
695 }
696
697 snd_iprintf(buffer,"\n...\n");
698 col = 0;
699
700 for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
701 if (col == 4) {
702 snd_iprintf(buffer,"\n");
703 col = 0;
704 }
705
706 if (col == 0) {
707 snd_iprintf(buffer, "%04X ",i);
708 }
709
710 snd_iprintf(buffer,"%08X ",readl(dst + i));
711 }
712
713
714 snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
715 col = 0;
716 for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
717 if (col == 4) {
718 snd_iprintf(buffer,"\n");
719 col = 0;
720 }
721
722 if (col == 0) {
723 snd_iprintf(buffer, "%04X ",i);
724 }
725
726 snd_iprintf(buffer,"%08X ",readl(dst + i));
727 }
728
729 snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
730 col = 0;
731 for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
732 if (col == 4) {
733 snd_iprintf(buffer,"\n");
734 col = 0;
735 }
736
737 if (col == 0) {
738 snd_iprintf(buffer, "%04X ",i);
739 }
740
741 snd_iprintf(buffer,"%08X ",readl(dst + i));
742 }
743 #if 0
744 snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
745 col = 0;
746 for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
747 if (col == 4) {
748 snd_iprintf(buffer,"\n");
749 col = 0;
750 }
751
752 if (col == 0) {
753 snd_iprintf(buffer, "%04X ",i);
754 }
755
756 snd_iprintf(buffer,"%08X ",readl(dst + i));
757 }
758 #endif
759
760 snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
761 col = 0;
762 for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
763 if (col == 4) {
764 snd_iprintf(buffer,"\n");
765 col = 0;
766 }
767
768 if (col == 0) {
769 snd_iprintf(buffer, "%04X ",i);
770 }
771
772 snd_iprintf(buffer,"%08X ",readl(dst + i));
773 }
774 snd_iprintf(buffer,"\n");
775 }
776
777 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
778 {
779 struct snd_info_entry *entry;
780 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
781 int i;
782
783 ins->snd_card = card;
784
785 if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
786 entry->content = SNDRV_INFO_CONTENT_TEXT;
787 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
788
789 if (snd_info_register(entry) < 0) {
790 snd_info_free_entry(entry);
791 entry = NULL;
792 }
793 }
794
795 ins->proc_dsp_dir = entry;
796
797 if (!ins->proc_dsp_dir)
798 return -ENOMEM;
799
800 if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
801 entry->content = SNDRV_INFO_CONTENT_TEXT;
802 entry->private_data = chip;
803 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
804 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
805 if (snd_info_register(entry) < 0) {
806 snd_info_free_entry(entry);
807 entry = NULL;
808 }
809 }
810 ins->proc_sym_info_entry = entry;
811
812 if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
813 entry->content = SNDRV_INFO_CONTENT_TEXT;
814 entry->private_data = chip;
815 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
816 entry->c.text.read = cs46xx_dsp_proc_modules_read;
817 if (snd_info_register(entry) < 0) {
818 snd_info_free_entry(entry);
819 entry = NULL;
820 }
821 }
822 ins->proc_modules_info_entry = entry;
823
824 if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
825 entry->content = SNDRV_INFO_CONTENT_TEXT;
826 entry->private_data = chip;
827 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
828 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
829 if (snd_info_register(entry) < 0) {
830 snd_info_free_entry(entry);
831 entry = NULL;
832 }
833 }
834 ins->proc_parameter_dump_info_entry = entry;
835
836 if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
837 entry->content = SNDRV_INFO_CONTENT_TEXT;
838 entry->private_data = chip;
839 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
840 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
841 if (snd_info_register(entry) < 0) {
842 snd_info_free_entry(entry);
843 entry = NULL;
844 }
845 }
846 ins->proc_sample_dump_info_entry = entry;
847
848 if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
849 entry->content = SNDRV_INFO_CONTENT_TEXT;
850 entry->private_data = chip;
851 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
852 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
853 if (snd_info_register(entry) < 0) {
854 snd_info_free_entry(entry);
855 entry = NULL;
856 }
857 }
858 ins->proc_task_info_entry = entry;
859
860 if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
861 entry->content = SNDRV_INFO_CONTENT_TEXT;
862 entry->private_data = chip;
863 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
864 entry->c.text.read = cs46xx_dsp_proc_scb_read;
865 if (snd_info_register(entry) < 0) {
866 snd_info_free_entry(entry);
867 entry = NULL;
868 }
869 }
870 ins->proc_scb_info_entry = entry;
871
872 mutex_lock(&chip->spos_mutex);
873 /* register/update SCB's entries on proc */
874 for (i = 0; i < ins->nscb; ++i) {
875 if (ins->scbs[i].deleted) continue;
876
877 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
878 }
879 mutex_unlock(&chip->spos_mutex);
880
881 return 0;
882 }
883
884 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
885 {
886 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
887 int i;
888
889 snd_info_free_entry(ins->proc_sym_info_entry);
890 ins->proc_sym_info_entry = NULL;
891
892 snd_info_free_entry(ins->proc_modules_info_entry);
893 ins->proc_modules_info_entry = NULL;
894
895 snd_info_free_entry(ins->proc_parameter_dump_info_entry);
896 ins->proc_parameter_dump_info_entry = NULL;
897
898 snd_info_free_entry(ins->proc_sample_dump_info_entry);
899 ins->proc_sample_dump_info_entry = NULL;
900
901 snd_info_free_entry(ins->proc_scb_info_entry);
902 ins->proc_scb_info_entry = NULL;
903
904 snd_info_free_entry(ins->proc_task_info_entry);
905 ins->proc_task_info_entry = NULL;
906
907 mutex_lock(&chip->spos_mutex);
908 for (i = 0; i < ins->nscb; ++i) {
909 if (ins->scbs[i].deleted) continue;
910 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
911 }
912 mutex_unlock(&chip->spos_mutex);
913
914 snd_info_free_entry(ins->proc_dsp_dir);
915 ins->proc_dsp_dir = NULL;
916
917 return 0;
918 }
919 #endif /* CONFIG_PROC_FS */
920
921 static int debug_tree;
922 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
923 u32 dest, int size)
924 {
925 void __iomem *spdst = chip->region.idx[1].remap_addr +
926 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
927 int i;
928
929 for (i = 0; i < size; ++i) {
930 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
931 writel(task_data[i],spdst);
932 spdst += sizeof(u32);
933 }
934 }
935
936 static int debug_scb;
937 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
938 {
939 void __iomem *spdst = chip->region.idx[1].remap_addr +
940 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
941 int i;
942
943 for (i = 0; i < 0x10; ++i) {
944 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
945 writel(scb_data[i],spdst);
946 spdst += sizeof(u32);
947 }
948 }
949
950 static int find_free_scb_index (struct dsp_spos_instance * ins)
951 {
952 int index = ins->nscb, i;
953
954 for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
955 if (ins->scbs[i].deleted) {
956 index = i;
957 break;
958 }
959 }
960
961 return index;
962 }
963
964 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
965 {
966 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
967 struct dsp_scb_descriptor * desc = NULL;
968 int index;
969
970 if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
971 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
972 return NULL;
973 }
974
975 index = find_free_scb_index (ins);
976
977 strcpy(ins->scbs[index].scb_name, name);
978 ins->scbs[index].address = dest;
979 ins->scbs[index].index = index;
980 ins->scbs[index].proc_info = NULL;
981 ins->scbs[index].ref_count = 1;
982 ins->scbs[index].deleted = 0;
983 spin_lock_init(&ins->scbs[index].lock);
984
985 desc = (ins->scbs + index);
986 ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
987
988 if (index > ins->scb_highest_frag_index)
989 ins->scb_highest_frag_index = index;
990
991 if (index == ins->nscb)
992 ins->nscb++;
993
994 return desc;
995 }
996
997 static struct dsp_task_descriptor *
998 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
999 {
1000 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1001 struct dsp_task_descriptor * desc = NULL;
1002
1003 if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1004 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
1005 return NULL;
1006 }
1007
1008 if (name)
1009 strcpy(ins->tasks[ins->ntask].task_name, name);
1010 else
1011 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)");
1012 ins->tasks[ins->ntask].address = dest;
1013 ins->tasks[ins->ntask].size = size;
1014
1015 /* quick find in list */
1016 ins->tasks[ins->ntask].index = ins->ntask;
1017 desc = (ins->tasks + ins->ntask);
1018 ins->ntask++;
1019
1020 if (name)
1021 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1022 return desc;
1023 }
1024
1025 struct dsp_scb_descriptor *
1026 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1027 {
1028 struct dsp_scb_descriptor * desc;
1029
1030 desc = _map_scb (chip,name,dest);
1031 if (desc) {
1032 desc->data = scb_data;
1033 _dsp_create_scb(chip,scb_data,dest);
1034 } else {
1035 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1036 }
1037
1038 return desc;
1039 }
1040
1041
1042 static struct dsp_task_descriptor *
1043 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1044 u32 dest, int size)
1045 {
1046 struct dsp_task_descriptor * desc;
1047
1048 desc = _map_task_tree (chip,name,dest,size);
1049 if (desc) {
1050 desc->data = task_data;
1051 _dsp_create_task_tree(chip,task_data,dest,size);
1052 } else {
1053 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1054 }
1055
1056 return desc;
1057 }
1058
1059 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1060 {
1061 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1062 struct dsp_symbol_entry * fg_task_tree_header_code;
1063 struct dsp_symbol_entry * task_tree_header_code;
1064 struct dsp_symbol_entry * task_tree_thread;
1065 struct dsp_symbol_entry * null_algorithm;
1066 struct dsp_symbol_entry * magic_snoop_task;
1067
1068 struct dsp_scb_descriptor * timing_master_scb;
1069 struct dsp_scb_descriptor * codec_out_scb;
1070 struct dsp_scb_descriptor * codec_in_scb;
1071 struct dsp_scb_descriptor * src_task_scb;
1072 struct dsp_scb_descriptor * master_mix_scb;
1073 struct dsp_scb_descriptor * rear_mix_scb;
1074 struct dsp_scb_descriptor * record_mix_scb;
1075 struct dsp_scb_descriptor * write_back_scb;
1076 struct dsp_scb_descriptor * vari_decimate_scb;
1077 struct dsp_scb_descriptor * rear_codec_out_scb;
1078 struct dsp_scb_descriptor * clfe_codec_out_scb;
1079 struct dsp_scb_descriptor * magic_snoop_scb;
1080
1081 int fifo_addr, fifo_span, valid_slots;
1082
1083 static struct dsp_spos_control_block sposcb = {
1084 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1085 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1086 /* 2 */ DSP_SPOS_DC,0,
1087 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1088 /* 4 */ 0,0,
1089 /* 5 */ DSP_SPOS_UU,0,
1090 /* 6 */ FG_TASK_HEADER_ADDR,0,
1091 /* 7 */ 0,0,
1092 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1093 /* 9 */ 0,
1094 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1095 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1096 /* C */ DSP_SPOS_DC_DC,
1097 /* D */ DSP_SPOS_DC_DC,
1098 /* E */ DSP_SPOS_DC_DC,
1099 /* F */ DSP_SPOS_DC_DC
1100 };
1101
1102 cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1103
1104 null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1105 if (null_algorithm == NULL) {
1106 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1107 return -EIO;
1108 }
1109
1110 fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1111 if (fg_task_tree_header_code == NULL) {
1112 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1113 return -EIO;
1114 }
1115
1116 task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1117 if (task_tree_header_code == NULL) {
1118 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1119 return -EIO;
1120 }
1121
1122 task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1123 if (task_tree_thread == NULL) {
1124 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1125 return -EIO;
1126 }
1127
1128 magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1129 if (magic_snoop_task == NULL) {
1130 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1131 return -EIO;
1132 }
1133
1134 {
1135 /* create the null SCB */
1136 static struct dsp_generic_scb null_scb = {
1137 { 0, 0, 0, 0 },
1138 { 0, 0, 0, 0, 0 },
1139 NULL_SCB_ADDR, NULL_SCB_ADDR,
1140 0, 0, 0, 0, 0,
1141 {
1142 0,0,
1143 0,0,
1144 }
1145 };
1146
1147 null_scb.entry_point = null_algorithm->address;
1148 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1149 ins->the_null_scb->task_entry = null_algorithm;
1150 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1151 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1152 ins->the_null_scb->parent_scb_ptr = NULL;
1153 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1154 }
1155
1156 {
1157 /* setup foreground task tree */
1158 static struct dsp_task_tree_control_block fg_task_tree_hdr = {
1159 { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1160 DSP_SPOS_DC_DC,
1161 DSP_SPOS_DC_DC,
1162 0x0000,DSP_SPOS_DC,
1163 DSP_SPOS_DC, DSP_SPOS_DC,
1164 DSP_SPOS_DC_DC,
1165 DSP_SPOS_DC_DC,
1166 DSP_SPOS_DC_DC,
1167 DSP_SPOS_DC,DSP_SPOS_DC },
1168
1169 {
1170 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1171 0,
1172 FG_TASK_HEADER_ADDR + TCBData,
1173 },
1174
1175 {
1176 4,0,
1177 1,0,
1178 2,SPOSCB_ADDR + HFGFlags,
1179 0,0,
1180 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1181 },
1182
1183 {
1184 DSP_SPOS_DC,0,
1185 DSP_SPOS_DC,DSP_SPOS_DC,
1186 DSP_SPOS_DC,DSP_SPOS_DC,
1187 DSP_SPOS_DC,DSP_SPOS_DC,
1188 DSP_SPOS_DC,DSP_SPOS_DC,
1189 DSP_SPOS_DCDC,
1190 DSP_SPOS_UU,1,
1191 DSP_SPOS_DCDC,
1192 DSP_SPOS_DCDC,
1193 DSP_SPOS_DCDC,
1194 DSP_SPOS_DCDC,
1195 DSP_SPOS_DCDC,
1196 DSP_SPOS_DCDC,
1197 DSP_SPOS_DCDC,
1198 DSP_SPOS_DCDC,
1199 DSP_SPOS_DCDC,
1200 DSP_SPOS_DCDC,
1201 DSP_SPOS_DCDC,
1202 DSP_SPOS_DCDC,
1203 DSP_SPOS_DCDC,
1204 DSP_SPOS_DCDC,
1205 DSP_SPOS_DCDC,
1206 DSP_SPOS_DCDC,
1207 DSP_SPOS_DCDC,
1208 DSP_SPOS_DCDC,
1209 DSP_SPOS_DCDC,
1210 DSP_SPOS_DCDC,
1211 DSP_SPOS_DCDC,
1212 DSP_SPOS_DCDC,
1213 DSP_SPOS_DCDC,
1214 DSP_SPOS_DCDC,
1215 DSP_SPOS_DCDC,
1216 DSP_SPOS_DCDC,
1217 DSP_SPOS_DCDC,
1218 DSP_SPOS_DCDC
1219 },
1220 {
1221 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1222 0,0
1223 }
1224 };
1225
1226 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1227 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1228 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1229 }
1230
1231
1232 {
1233 /* setup foreground task tree */
1234 static struct dsp_task_tree_control_block bg_task_tree_hdr = {
1235 { DSP_SPOS_DC_DC,
1236 DSP_SPOS_DC_DC,
1237 DSP_SPOS_DC_DC,
1238 DSP_SPOS_DC, DSP_SPOS_DC,
1239 DSP_SPOS_DC, DSP_SPOS_DC,
1240 DSP_SPOS_DC_DC,
1241 DSP_SPOS_DC_DC,
1242 DSP_SPOS_DC_DC,
1243 DSP_SPOS_DC,DSP_SPOS_DC },
1244
1245 {
1246 NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */
1247 0,
1248 BG_TREE_SCB_ADDR + TCBData,
1249 },
1250
1251 {
1252 9999,0,
1253 0,1,
1254 0,SPOSCB_ADDR + HFGFlags,
1255 0,0,
1256 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1257 },
1258
1259 {
1260 DSP_SPOS_DC,0,
1261 DSP_SPOS_DC,DSP_SPOS_DC,
1262 DSP_SPOS_DC,DSP_SPOS_DC,
1263 DSP_SPOS_DC,DSP_SPOS_DC,
1264 DSP_SPOS_DC,DSP_SPOS_DC,
1265 DSP_SPOS_DCDC,
1266 DSP_SPOS_UU,1,
1267 DSP_SPOS_DCDC,
1268 DSP_SPOS_DCDC,
1269 DSP_SPOS_DCDC,
1270 DSP_SPOS_DCDC,
1271 DSP_SPOS_DCDC,
1272 DSP_SPOS_DCDC,
1273 DSP_SPOS_DCDC,
1274 DSP_SPOS_DCDC,
1275 DSP_SPOS_DCDC,
1276 DSP_SPOS_DCDC,
1277 DSP_SPOS_DCDC,
1278 DSP_SPOS_DCDC,
1279 DSP_SPOS_DCDC,
1280 DSP_SPOS_DCDC,
1281 DSP_SPOS_DCDC,
1282 DSP_SPOS_DCDC,
1283 DSP_SPOS_DCDC,
1284 DSP_SPOS_DCDC,
1285 DSP_SPOS_DCDC,
1286 DSP_SPOS_DCDC,
1287 DSP_SPOS_DCDC,
1288 DSP_SPOS_DCDC,
1289 DSP_SPOS_DCDC,
1290 DSP_SPOS_DCDC,
1291 DSP_SPOS_DCDC,
1292 DSP_SPOS_DCDC,
1293 DSP_SPOS_DCDC,
1294 DSP_SPOS_DCDC
1295 },
1296 {
1297 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1298 0,0
1299 }
1300 };
1301
1302 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1303 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1304 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1305 }
1306
1307 /* create timing master SCB */
1308 timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1309
1310 /* create the CODEC output task */
1311 codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1312 MASTERMIX_SCB_ADDR,
1313 CODECOUT_SCB_ADDR,timing_master_scb,
1314 SCB_ON_PARENT_SUBLIST_SCB);
1315
1316 if (!codec_out_scb) goto _fail_end;
1317 /* create the master mix SCB */
1318 master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1319 MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1320 codec_out_scb,
1321 SCB_ON_PARENT_SUBLIST_SCB);
1322 ins->master_mix_scb = master_mix_scb;
1323
1324 if (!master_mix_scb) goto _fail_end;
1325
1326 /* create codec in */
1327 codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1328 CODEC_INPUT_BUF1,
1329 CODECIN_SCB_ADDR,codec_out_scb,
1330 SCB_ON_PARENT_NEXT_SCB);
1331 if (!codec_in_scb) goto _fail_end;
1332 ins->codec_in_scb = codec_in_scb;
1333
1334 /* create write back scb */
1335 write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1336 WRITE_BACK_BUF1,WRITE_BACK_SPB,
1337 WRITEBACK_SCB_ADDR,
1338 timing_master_scb,
1339 SCB_ON_PARENT_NEXT_SCB);
1340 if (!write_back_scb) goto _fail_end;
1341
1342 {
1343 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1344 0x00020000,
1345 0x0000ffff
1346 };
1347
1348 if (!cs46xx_dsp_create_task_tree(chip, NULL,
1349 (u32 *)&mix2_ostream_spb,
1350 WRITE_BACK_SPB, 2))
1351 goto _fail_end;
1352 }
1353
1354 /* input sample converter */
1355 vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1356 VARI_DECIMATE_BUF0,
1357 VARI_DECIMATE_BUF1,
1358 VARIDECIMATE_SCB_ADDR,
1359 write_back_scb,
1360 SCB_ON_PARENT_SUBLIST_SCB);
1361 if (!vari_decimate_scb) goto _fail_end;
1362
1363 /* create the record mixer SCB */
1364 record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1365 MIX_SAMPLE_BUF2,
1366 RECORD_MIXER_SCB_ADDR,
1367 vari_decimate_scb,
1368 SCB_ON_PARENT_SUBLIST_SCB);
1369 ins->record_mixer_scb = record_mix_scb;
1370
1371 if (!record_mix_scb) goto _fail_end;
1372
1373 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1374
1375 if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2))
1376 goto _fail_end;
1377
1378 if (chip->nr_ac97_codecs == 1) {
1379 /* output on slot 5 and 11
1380 on primary CODEC */
1381 fifo_addr = 0x20;
1382 fifo_span = 0x60;
1383
1384 /* enable slot 5 and 11 */
1385 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1386 } else {
1387 /* output on slot 7 and 8
1388 on secondary CODEC */
1389 fifo_addr = 0x40;
1390 fifo_span = 0x10;
1391
1392 /* enable slot 7 and 8 */
1393 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1394 }
1395 /* create CODEC tasklet for rear speakers output*/
1396 rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1397 REAR_MIXER_SCB_ADDR,
1398 REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1399 SCB_ON_PARENT_NEXT_SCB);
1400 if (!rear_codec_out_scb) goto _fail_end;
1401
1402
1403 /* create the rear PCM channel mixer SCB */
1404 rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1405 MIX_SAMPLE_BUF3,
1406 REAR_MIXER_SCB_ADDR,
1407 rear_codec_out_scb,
1408 SCB_ON_PARENT_SUBLIST_SCB);
1409 ins->rear_mix_scb = rear_mix_scb;
1410 if (!rear_mix_scb) goto _fail_end;
1411
1412 if (chip->nr_ac97_codecs == 2) {
1413 /* create CODEC tasklet for rear Center/LFE output
1414 slot 6 and 9 on seconadry CODEC */
1415 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1416 CLFE_MIXER_SCB_ADDR,
1417 CLFE_CODEC_SCB_ADDR,
1418 rear_codec_out_scb,
1419 SCB_ON_PARENT_NEXT_SCB);
1420 if (!clfe_codec_out_scb) goto _fail_end;
1421
1422
1423 /* create the rear PCM channel mixer SCB */
1424 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1425 MIX_SAMPLE_BUF4,
1426 CLFE_MIXER_SCB_ADDR,
1427 clfe_codec_out_scb,
1428 SCB_ON_PARENT_SUBLIST_SCB);
1429 if (!ins->center_lfe_mix_scb) goto _fail_end;
1430
1431 /* enable slot 6 and 9 */
1432 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1433 } else {
1434 clfe_codec_out_scb = rear_codec_out_scb;
1435 ins->center_lfe_mix_scb = rear_mix_scb;
1436 }
1437
1438 /* enable slots depending on CODEC configuration */
1439 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1440
1441 /* the magic snooper */
1442 magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1443 OUTPUT_SNOOP_BUFFER,
1444 codec_out_scb,
1445 clfe_codec_out_scb,
1446 SCB_ON_PARENT_NEXT_SCB);
1447
1448
1449 if (!magic_snoop_scb) goto _fail_end;
1450 ins->ref_snoop_scb = magic_snoop_scb;
1451
1452 /* SP IO access */
1453 if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1454 magic_snoop_scb,
1455 SCB_ON_PARENT_NEXT_SCB))
1456 goto _fail_end;
1457
1458 /* SPDIF input sampel rate converter */
1459 src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1460 ins->spdif_in_sample_rate,
1461 SRC_OUTPUT_BUF1,
1462 SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1463 master_mix_scb,
1464 SCB_ON_PARENT_SUBLIST_SCB,1);
1465
1466 if (!src_task_scb) goto _fail_end;
1467 cs46xx_src_unlink(chip,src_task_scb);
1468
1469 /* NOTE: when we now how to detect the SPDIF input
1470 sample rate we will use this SRC to adjust it */
1471 ins->spdif_in_src = src_task_scb;
1472
1473 cs46xx_dsp_async_init(chip,timing_master_scb);
1474 return 0;
1475
1476 _fail_end:
1477 snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1478 return -EINVAL;
1479 }
1480
1481 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1482 struct dsp_scb_descriptor * fg_entry)
1483 {
1484 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1485 struct dsp_symbol_entry * s16_async_codec_input_task;
1486 struct dsp_symbol_entry * spdifo_task;
1487 struct dsp_symbol_entry * spdifi_task;
1488 struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1489
1490 s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1491 if (s16_async_codec_input_task == NULL) {
1492 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1493 return -EIO;
1494 }
1495 spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1496 if (spdifo_task == NULL) {
1497 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1498 return -EIO;
1499 }
1500
1501 spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1502 if (spdifi_task == NULL) {
1503 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1504 return -EIO;
1505 }
1506
1507 {
1508 /* 0xBC0 */
1509 struct dsp_spdifoscb spdifo_scb = {
1510 /* 0 */ DSP_SPOS_UUUU,
1511 {
1512 /* 1 */ 0xb0,
1513 /* 2 */ 0,
1514 /* 3 */ 0,
1515 /* 4 */ 0,
1516 },
1517 /* NOTE: the SPDIF output task read samples in mono
1518 format, the AsynchFGTxSCB task writes to buffer
1519 in stereo format
1520 */
1521 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1522 /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC,
1523 /* 7 */ 0,0,
1524 /* 8 */ 0,
1525 /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1526 /* A */ spdifo_task->address,
1527 SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1528 {
1529 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1530 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1531 },
1532 /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1533 /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1534 /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */
1535 };
1536
1537 /* 0xBB0 */
1538 struct dsp_spdifiscb spdifi_scb = {
1539 /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1540 /* 1 */ 0,
1541 /* 2 */ 0,
1542 /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */
1543 /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1544 /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1545 /* 6 */ DSP_SPOS_UUUU, /* Free3 */
1546 /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/
1547 /* 8 */ DSP_SPOS_UUUU, /* TempStatus */
1548 /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1549 /* A */ spdifi_task->address,
1550 SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1551 /* NOTE: The SPDIF input task write the sample in mono
1552 format from the HW FIFO, the AsynchFGRxSCB task reads
1553 them in stereo
1554 */
1555 /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1556 /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1557 /* D */ 0x8048,0,
1558 /* E */ 0x01f0,0x0001,
1559 /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1560 };
1561
1562 /* 0xBA0 */
1563 struct dsp_async_codec_input_scb async_codec_input_scb = {
1564 /* 0 */ DSP_SPOS_UUUU,
1565 /* 1 */ 0,
1566 /* 2 */ 0,
1567 /* 3 */ 1,4000,
1568 /* 4 */ 0x0118,0x0001,
1569 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1570 /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1571 /* 7 */ DSP_SPOS_UU,0x3,
1572 /* 8 */ DSP_SPOS_UUUU,
1573 /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1574 /* A */ s16_async_codec_input_task->address,
1575 HFG_TREE_SCB + AsyncCIOFIFOPointer,
1576
1577 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1578 /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1579
1580 #ifdef UseASER1Input
1581 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1582 Init. 0000:8042: for ASER1
1583 0000:8044: for ASER2 */
1584 /* D */ 0x8042,0,
1585
1586 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1587 Init 1 stero:8050 ASER1
1588 Init 0 mono:8070 ASER2
1589 Init 1 Stereo : 0100 ASER1 (Set by script) */
1590 /* E */ 0x0100,0x0001,
1591
1592 #endif
1593
1594 #ifdef UseASER2Input
1595 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1596 Init. 0000:8042: for ASER1
1597 0000:8044: for ASER2 */
1598 /* D */ 0x8044,0,
1599
1600 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1601 Init 1 stero:8050 ASER1
1602 Init 0 mono:8070 ASER2
1603 Init 1 Stereo : 0100 ASER1 (Set by script) */
1604 /* E */ 0x0110,0x0001,
1605
1606 #endif
1607
1608 /* short AsyncCIOutputBufModulo:AsyncCIFree;
1609 AsyncCIOutputBufModulo: The modulo size for
1610 the output buffer of this task */
1611 /* F */ 0, /* DSP_SPOS_UUUU */
1612 };
1613
1614 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1615
1616 if (snd_BUG_ON(!spdifo_scb_desc))
1617 return -EIO;
1618 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1619 if (snd_BUG_ON(!spdifi_scb_desc))
1620 return -EIO;
1621 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1622 if (snd_BUG_ON(!async_codec_scb_desc))
1623 return -EIO;
1624
1625 async_codec_scb_desc->parent_scb_ptr = NULL;
1626 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1627 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1628 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1629
1630 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1631 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1632 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1633 spdifi_scb_desc->task_entry = spdifi_task;
1634
1635 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1636 spdifo_scb_desc->next_scb_ptr = fg_entry;
1637 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1638 spdifo_scb_desc->task_entry = spdifo_task;
1639
1640 /* this one is faked, as the parnet of SPDIFO task
1641 is the FG task tree */
1642 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1643
1644 /* for proc fs */
1645 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1646 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1647 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1648
1649 /* Async MASTER ENABLE, affects both SPDIF input and output */
1650 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1651 }
1652
1653 return 0;
1654 }
1655
1656 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1657 {
1658 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1659
1660 /* set SPDIF output FIFO slot */
1661 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1662
1663 /* SPDIF output MASTER ENABLE */
1664 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1665
1666 /* right and left validate bit */
1667 /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1668 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1669
1670 /* clear fifo pointer */
1671 cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1672
1673 /* monitor state */
1674 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1675 }
1676
1677 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1678 {
1679 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1680
1681 /* if hw-ctrl already enabled, turn off to reset logic ... */
1682 cs46xx_dsp_disable_spdif_hw (chip);
1683 udelay(50);
1684
1685 /* set SPDIF output FIFO slot */
1686 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1687
1688 /* SPDIF output MASTER ENABLE */
1689 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1690
1691 /* right and left validate bit */
1692 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1693
1694 /* monitor state */
1695 ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1696
1697 return 0;
1698 }
1699
1700 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1701 {
1702 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1703
1704 /* turn on amplifier */
1705 chip->active_ctrl(chip, 1);
1706 chip->amplifier_ctrl(chip, 1);
1707
1708 if (snd_BUG_ON(ins->asynch_rx_scb))
1709 return -EINVAL;
1710 if (snd_BUG_ON(!ins->spdif_in_src))
1711 return -EINVAL;
1712
1713 mutex_lock(&chip->spos_mutex);
1714
1715 if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1716 /* time countdown enable */
1717 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1718 /* NOTE: 80000005 value is just magic. With all values
1719 that I've tested this one seem to give the best result.
1720 Got no explication why. (Benny) */
1721
1722 /* SPDIF input MASTER ENABLE */
1723 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1724
1725 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1726 }
1727
1728 /* create and start the asynchronous receiver SCB */
1729 ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1730 ASYNCRX_SCB_ADDR,
1731 SPDIFI_SCB_INST,
1732 SPDIFI_IP_OUTPUT_BUFFER1,
1733 ins->spdif_in_src,
1734 SCB_ON_PARENT_SUBLIST_SCB);
1735
1736 spin_lock_irq(&chip->reg_lock);
1737
1738 /* reset SPDIF input sample buffer pointer */
1739 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1740 (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1741
1742 /* reset FIFO ptr */
1743 /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1744 cs46xx_src_link(chip,ins->spdif_in_src);
1745
1746 /* unmute SRC volume */
1747 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1748
1749 spin_unlock_irq(&chip->reg_lock);
1750
1751 /* set SPDIF input sample rate and unmute
1752 NOTE: only 48khz support for SPDIF input this time */
1753 /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1754
1755 /* monitor state */
1756 ins->spdif_status_in = 1;
1757 mutex_unlock(&chip->spos_mutex);
1758
1759 return 0;
1760 }
1761
1762 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1763 {
1764 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1765
1766 if (snd_BUG_ON(!ins->asynch_rx_scb))
1767 return -EINVAL;
1768 if (snd_BUG_ON(!ins->spdif_in_src))
1769 return -EINVAL;
1770
1771 mutex_lock(&chip->spos_mutex);
1772
1773 /* Remove the asynchronous receiver SCB */
1774 cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1775 ins->asynch_rx_scb = NULL;
1776
1777 cs46xx_src_unlink(chip,ins->spdif_in_src);
1778
1779 /* monitor state */
1780 ins->spdif_status_in = 0;
1781 mutex_unlock(&chip->spos_mutex);
1782
1783 /* restore amplifier */
1784 chip->active_ctrl(chip, -1);
1785 chip->amplifier_ctrl(chip, -1);
1786
1787 return 0;
1788 }
1789
1790 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1791 {
1792 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1793
1794 if (snd_BUG_ON(ins->pcm_input))
1795 return -EINVAL;
1796 if (snd_BUG_ON(!ins->ref_snoop_scb))
1797 return -EINVAL;
1798
1799 mutex_lock(&chip->spos_mutex);
1800 ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1801 "PCMSerialInput_Wave");
1802 mutex_unlock(&chip->spos_mutex);
1803
1804 return 0;
1805 }
1806
1807 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1808 {
1809 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1810
1811 if (snd_BUG_ON(!ins->pcm_input))
1812 return -EINVAL;
1813
1814 mutex_lock(&chip->spos_mutex);
1815 cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1816 ins->pcm_input = NULL;
1817 mutex_unlock(&chip->spos_mutex);
1818
1819 return 0;
1820 }
1821
1822 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1823 {
1824 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1825
1826 if (snd_BUG_ON(ins->adc_input))
1827 return -EINVAL;
1828 if (snd_BUG_ON(!ins->codec_in_scb))
1829 return -EINVAL;
1830
1831 mutex_lock(&chip->spos_mutex);
1832 ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1833 "PCMSerialInput_ADC");
1834 mutex_unlock(&chip->spos_mutex);
1835
1836 return 0;
1837 }
1838
1839 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1840 {
1841 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1842
1843 if (snd_BUG_ON(!ins->adc_input))
1844 return -EINVAL;
1845
1846 mutex_lock(&chip->spos_mutex);
1847 cs46xx_dsp_remove_scb (chip,ins->adc_input);
1848 ins->adc_input = NULL;
1849 mutex_unlock(&chip->spos_mutex);
1850
1851 return 0;
1852 }
1853
1854 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1855 {
1856 u32 temp;
1857 int i;
1858
1859 /* santiy check the parameters. (These numbers are not 100% correct. They are
1860 a rough guess from looking at the controller spec.) */
1861 if (address < 0x8000 || address >= 0x9000)
1862 return -EINVAL;
1863
1864 /* initialize the SP_IO_WRITE SCB with the data. */
1865 temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */
1866
1867 snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp);
1868 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1869 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1870
1871 /* Poke this location to tell the task to start */
1872 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1873
1874 /* Verify that the task ran */
1875 for (i=0; i<25; i++) {
1876 udelay(125);
1877
1878 temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1879 if (temp == 0x00000000)
1880 break;
1881 }
1882
1883 if (i == 25) {
1884 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1885 return -EBUSY;
1886 }
1887
1888 return 0;
1889 }
1890
1891 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1892 {
1893 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1894 struct dsp_scb_descriptor * scb;
1895
1896 mutex_lock(&chip->spos_mutex);
1897
1898 /* main output */
1899 scb = ins->master_mix_scb->sub_list_ptr;
1900 while (scb != ins->the_null_scb) {
1901 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1902 scb = scb->next_scb_ptr;
1903 }
1904
1905 /* rear output */
1906 scb = ins->rear_mix_scb->sub_list_ptr;
1907 while (scb != ins->the_null_scb) {
1908 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1909 scb = scb->next_scb_ptr;
1910 }
1911
1912 ins->dac_volume_left = left;
1913 ins->dac_volume_right = right;
1914
1915 mutex_unlock(&chip->spos_mutex);
1916
1917 return 0;
1918 }
1919
1920 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1921 {
1922 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1923
1924 mutex_lock(&chip->spos_mutex);
1925
1926 if (ins->asynch_rx_scb != NULL)
1927 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1928 left,right);
1929
1930 ins->spdif_input_volume_left = left;
1931 ins->spdif_input_volume_right = right;
1932
1933 mutex_unlock(&chip->spos_mutex);
1934
1935 return 0;
1936 }
1937
1938 #ifdef CONFIG_PM
1939 int cs46xx_dsp_resume(struct snd_cs46xx * chip)
1940 {
1941 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1942 int i, err;
1943
1944 /* clear parameter, sample and code areas */
1945 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
1946 DSP_PARAMETER_BYTE_SIZE);
1947 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
1948 DSP_SAMPLE_BYTE_SIZE);
1949 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
1950
1951 for (i = 0; i < ins->nmodules; i++) {
1952 struct dsp_module_desc *module = &ins->modules[i];
1953 struct dsp_segment_desc *seg;
1954 u32 doffset, dsize;
1955
1956 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
1957 err = dsp_load_parameter(chip, seg);
1958 if (err < 0)
1959 return err;
1960
1961 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
1962 err = dsp_load_sample(chip, seg);
1963 if (err < 0)
1964 return err;
1965
1966 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
1967 if (!seg)
1968 continue;
1969
1970 doffset = seg->offset * 4 + module->load_address * 4
1971 + DSP_CODE_BYTE_OFFSET;
1972 dsize = seg->size * 4;
1973 err = snd_cs46xx_download(chip,
1974 ins->code.data + module->load_address,
1975 doffset, dsize);
1976 if (err < 0)
1977 return err;
1978 }
1979
1980 for (i = 0; i < ins->ntask; i++) {
1981 struct dsp_task_descriptor *t = &ins->tasks[i];
1982 _dsp_create_task_tree(chip, t->data, t->address, t->size);
1983 }
1984
1985 for (i = 0; i < ins->nscb; i++) {
1986 struct dsp_scb_descriptor *s = &ins->scbs[i];
1987 if (s->deleted)
1988 continue;
1989 _dsp_create_scb(chip, s->data, s->address);
1990 }
1991
1992 return 0;
1993 }
1994 #endif
Linux with added FPC-III support