6 config HAVE_CLK_PREPARE
11 select HAVE_CLK_PREPARE
16 The common clock framework is a single definition of struct
17 clk, useful across many platforms, as well as an
18 implementation of the clock API in include/linux/clk.h.
19 Architectures utilizing the common struct clk should select
22 menu "Common Clock Framework"
25 config COMMON_CLK_WM831X
26 tristate "Clock driver for WM831x/2x PMICs"
29 Supports the clocking subsystem of the WM831x/2x series of
30 PMICs from Wolfson Microelectronics.
32 source "drivers/clk/versatile/Kconfig"
34 config COMMON_CLK_MAX77686
35 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
36 depends on MFD_MAX77686 || MFD_MAX77620
38 This driver supports Maxim 77620/77686/77802 crystal oscillator
41 config COMMON_CLK_RK808
42 tristate "Clock driver for RK808/RK818"
45 This driver supports RK808 and RK818 crystal oscillator clock. These
46 multi-function devices have two fixed-rate oscillators,
47 clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
50 config COMMON_CLK_SCPI
51 tristate "Clock driver controlled via SCPI interface"
52 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
54 This driver provides support for clocks that are controlled
55 by firmware that implements the SCPI interface.
57 This driver uses SCPI Message Protocol to interact with the
58 firmware providing all the clock controls.
60 config COMMON_CLK_SI5351
61 tristate "Clock driver for SiLabs 5351A/B/C"
66 This driver supports Silicon Labs 5351A/B/C programmable clock
69 config COMMON_CLK_SI514
70 tristate "Clock driver for SiLabs 514 devices"
76 This driver supports the Silicon Labs 514 programmable clock
79 config COMMON_CLK_SI570
80 tristate "Clock driver for SiLabs 570 and compatible devices"
86 This driver supports Silicon Labs 570/571/598/599 programmable
89 config COMMON_CLK_CDCE706
90 tristate "Clock driver for TI CDCE706 clock synthesizer"
95 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
97 config COMMON_CLK_CDCE925
98 tristate "Clock driver for TI CDCE925 devices"
104 This driver supports the TI CDCE925 programmable clock synthesizer.
105 The chip contains two PLLs with spread-spectrum clocking support and
106 five output dividers. The driver only supports the following setup,
107 and uses a fixed setting for the output muxes.
108 Y1 is derived from the input clock
109 Y2 and Y3 derive from PLL1
110 Y4 and Y5 derive from PLL2
111 Given a target output frequency, the driver will set the PLL and
112 divider to best approximate the desired output.
114 config COMMON_CLK_CS2000_CP
115 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
118 If you say yes here you get support for the CS2000 clock multiplier.
120 config COMMON_CLK_S2MPS11
121 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
122 depends on MFD_SEC_CORE
124 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
125 clock. These multi-function devices have two (S2MPS14) or three
126 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
129 tristate "External McPDM functional clock from twl6040"
130 depends on TWL6040_CORE
132 Enable the external functional clock support on OMAP4+ platforms for
133 McPDM. McPDM module is using the external bit clock on the McPDM bus
136 config COMMON_CLK_AXI_CLKGEN
137 tristate "AXI clkgen driver"
138 depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
141 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
142 FPGAs. It is commonly used in Analog Devices' reference designs.
145 bool "Clock driver for Freescale QorIQ platforms"
146 depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
148 This adds the clock driver support for Freescale QorIQ platforms
149 using common clock framework.
151 config COMMON_CLK_XGENE
152 bool "Clock driver for APM XGene SoC"
154 depends on ARM64 || COMPILE_TEST
156 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
158 config COMMON_CLK_KEYSTONE
159 tristate "Clock drivers for Keystone based SOCs"
160 depends on (ARCH_KEYSTONE || COMPILE_TEST) && OF
162 Supports clock drivers for Keystone based SOCs. These SOCs have local
163 a power sleep control module that gate the clock to the IPs and PLLs.
165 config COMMON_CLK_NXP
166 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
167 select REGMAP_MMIO if ARCH_LPC32XX
168 select MFD_SYSCON if ARCH_LPC18XX
170 Support for clock providers on NXP platforms.
172 config COMMON_CLK_PALMAS
173 tristate "Clock driver for TI Palmas devices"
174 depends on MFD_PALMAS
176 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
177 using common clock framework.
179 config COMMON_CLK_PWM
180 tristate "Clock driver for PWMs used as clock outputs"
183 Adapter driver so that any PWM output can be (mis)used as clock signal
186 config COMMON_CLK_PXA
187 def_bool COMMON_CLK && ARCH_PXA
189 Support for the Marvell PXA SoC.
191 config COMMON_CLK_PIC32
192 def_bool COMMON_CLK && MACH_PIC32
194 config COMMON_CLK_OXNAS
195 bool "Clock driver for the OXNAS SoC Family"
196 depends on ARCH_OXNAS || COMPILE_TEST
199 Support for the OXNAS SoC Family clocks.
201 source "drivers/clk/bcm/Kconfig"
202 source "drivers/clk/hisilicon/Kconfig"
203 source "drivers/clk/mediatek/Kconfig"
204 source "drivers/clk/meson/Kconfig"
205 source "drivers/clk/mvebu/Kconfig"
206 source "drivers/clk/qcom/Kconfig"
207 source "drivers/clk/renesas/Kconfig"
208 source "drivers/clk/samsung/Kconfig"
209 source "drivers/clk/sunxi-ng/Kconfig"
210 source "drivers/clk/tegra/Kconfig"
211 source "drivers/clk/ti/Kconfig"
212 source "drivers/clk/uniphier/Kconfig"