x86/mm: Add TLB purge to free pmd/pte page interfaces
[linux/fpc-iii.git] / drivers / input / serio / i8042.c
blobc84c685056b997ec325900dca1524828fa03b0b5
1 /*
2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
5 */
7 /*
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/types.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/serio.h>
22 #include <linux/err.h>
23 #include <linux/rcupdate.h>
24 #include <linux/platform_device.h>
25 #include <linux/i8042.h>
26 #include <linux/slab.h>
27 #include <linux/suspend.h>
29 #include <asm/io.h>
31 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
32 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
33 MODULE_LICENSE("GPL");
35 static bool i8042_nokbd;
36 module_param_named(nokbd, i8042_nokbd, bool, 0);
37 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
39 static bool i8042_noaux;
40 module_param_named(noaux, i8042_noaux, bool, 0);
41 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
43 static bool i8042_nomux;
44 module_param_named(nomux, i8042_nomux, bool, 0);
45 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
47 static bool i8042_unlock;
48 module_param_named(unlock, i8042_unlock, bool, 0);
49 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
51 enum i8042_controller_reset_mode {
52 I8042_RESET_NEVER,
53 I8042_RESET_ALWAYS,
54 I8042_RESET_ON_S2RAM,
55 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
57 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
58 static int i8042_set_reset(const char *val, const struct kernel_param *kp)
60 enum i8042_controller_reset_mode *arg = kp->arg;
61 int error;
62 bool reset;
64 if (val) {
65 error = kstrtobool(val, &reset);
66 if (error)
67 return error;
68 } else {
69 reset = true;
72 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
73 return 0;
76 static const struct kernel_param_ops param_ops_reset_param = {
77 .flags = KERNEL_PARAM_OPS_FL_NOARG,
78 .set = i8042_set_reset,
80 #define param_check_reset_param(name, p) \
81 __param_check(name, p, enum i8042_controller_reset_mode)
82 module_param_named(reset, i8042_reset, reset_param, 0);
83 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
85 static bool i8042_direct;
86 module_param_named(direct, i8042_direct, bool, 0);
87 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
89 static bool i8042_dumbkbd;
90 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
91 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
93 static bool i8042_noloop;
94 module_param_named(noloop, i8042_noloop, bool, 0);
95 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
97 static bool i8042_notimeout;
98 module_param_named(notimeout, i8042_notimeout, bool, 0);
99 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
101 static bool i8042_kbdreset;
102 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
103 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
105 #ifdef CONFIG_X86
106 static bool i8042_dritek;
107 module_param_named(dritek, i8042_dritek, bool, 0);
108 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
109 #endif
111 #ifdef CONFIG_PNP
112 static bool i8042_nopnp;
113 module_param_named(nopnp, i8042_nopnp, bool, 0);
114 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
115 #endif
117 #define DEBUG
118 #ifdef DEBUG
119 static bool i8042_debug;
120 module_param_named(debug, i8042_debug, bool, 0600);
121 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
123 static bool i8042_unmask_kbd_data;
124 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
125 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
126 #endif
128 static bool i8042_bypass_aux_irq_test;
129 static char i8042_kbd_firmware_id[128];
130 static char i8042_aux_firmware_id[128];
132 #include "i8042.h"
135 * i8042_lock protects serialization between i8042_command and
136 * the interrupt handler.
138 static DEFINE_SPINLOCK(i8042_lock);
141 * Writers to AUX and KBD ports as well as users issuing i8042_command
142 * directly should acquire i8042_mutex (by means of calling
143 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
144 * they do not disturb each other (unfortunately in many i8042
145 * implementations write to one of the ports will immediately abort
146 * command that is being processed by another port).
148 static DEFINE_MUTEX(i8042_mutex);
150 struct i8042_port {
151 struct serio *serio;
152 int irq;
153 bool exists;
154 bool driver_bound;
155 signed char mux;
158 #define I8042_KBD_PORT_NO 0
159 #define I8042_AUX_PORT_NO 1
160 #define I8042_MUX_PORT_NO 2
161 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
163 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
165 static unsigned char i8042_initial_ctr;
166 static unsigned char i8042_ctr;
167 static bool i8042_mux_present;
168 static bool i8042_kbd_irq_registered;
169 static bool i8042_aux_irq_registered;
170 static unsigned char i8042_suppress_kbd_ack;
171 static struct platform_device *i8042_platform_device;
172 static struct notifier_block i8042_kbd_bind_notifier_block;
174 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
175 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
176 struct serio *serio);
178 void i8042_lock_chip(void)
180 mutex_lock(&i8042_mutex);
182 EXPORT_SYMBOL(i8042_lock_chip);
184 void i8042_unlock_chip(void)
186 mutex_unlock(&i8042_mutex);
188 EXPORT_SYMBOL(i8042_unlock_chip);
190 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
191 struct serio *serio))
193 unsigned long flags;
194 int ret = 0;
196 spin_lock_irqsave(&i8042_lock, flags);
198 if (i8042_platform_filter) {
199 ret = -EBUSY;
200 goto out;
203 i8042_platform_filter = filter;
205 out:
206 spin_unlock_irqrestore(&i8042_lock, flags);
207 return ret;
209 EXPORT_SYMBOL(i8042_install_filter);
211 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
212 struct serio *port))
214 unsigned long flags;
215 int ret = 0;
217 spin_lock_irqsave(&i8042_lock, flags);
219 if (i8042_platform_filter != filter) {
220 ret = -EINVAL;
221 goto out;
224 i8042_platform_filter = NULL;
226 out:
227 spin_unlock_irqrestore(&i8042_lock, flags);
228 return ret;
230 EXPORT_SYMBOL(i8042_remove_filter);
233 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
234 * be ready for reading values from it / writing values to it.
235 * Called always with i8042_lock held.
238 static int i8042_wait_read(void)
240 int i = 0;
242 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
243 udelay(50);
244 i++;
246 return -(i == I8042_CTL_TIMEOUT);
249 static int i8042_wait_write(void)
251 int i = 0;
253 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
254 udelay(50);
255 i++;
257 return -(i == I8042_CTL_TIMEOUT);
261 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
262 * of the i8042 down the toilet.
265 static int i8042_flush(void)
267 unsigned long flags;
268 unsigned char data, str;
269 int count = 0;
270 int retval = 0;
272 spin_lock_irqsave(&i8042_lock, flags);
274 while ((str = i8042_read_status()) & I8042_STR_OBF) {
275 if (count++ < I8042_BUFFER_SIZE) {
276 udelay(50);
277 data = i8042_read_data();
278 dbg("%02x <- i8042 (flush, %s)\n",
279 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
280 } else {
281 retval = -EIO;
282 break;
286 spin_unlock_irqrestore(&i8042_lock, flags);
288 return retval;
292 * i8042_command() executes a command on the i8042. It also sends the input
293 * parameter(s) of the commands to it, and receives the output value(s). The
294 * parameters are to be stored in the param array, and the output is placed
295 * into the same array. The number of the parameters and output values is
296 * encoded in bits 8-11 of the command number.
299 static int __i8042_command(unsigned char *param, int command)
301 int i, error;
303 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
304 return -1;
306 error = i8042_wait_write();
307 if (error)
308 return error;
310 dbg("%02x -> i8042 (command)\n", command & 0xff);
311 i8042_write_command(command & 0xff);
313 for (i = 0; i < ((command >> 12) & 0xf); i++) {
314 error = i8042_wait_write();
315 if (error)
316 return error;
317 dbg("%02x -> i8042 (parameter)\n", param[i]);
318 i8042_write_data(param[i]);
321 for (i = 0; i < ((command >> 8) & 0xf); i++) {
322 error = i8042_wait_read();
323 if (error) {
324 dbg(" -- i8042 (timeout)\n");
325 return error;
328 if (command == I8042_CMD_AUX_LOOP &&
329 !(i8042_read_status() & I8042_STR_AUXDATA)) {
330 dbg(" -- i8042 (auxerr)\n");
331 return -1;
334 param[i] = i8042_read_data();
335 dbg("%02x <- i8042 (return)\n", param[i]);
338 return 0;
341 int i8042_command(unsigned char *param, int command)
343 unsigned long flags;
344 int retval;
346 spin_lock_irqsave(&i8042_lock, flags);
347 retval = __i8042_command(param, command);
348 spin_unlock_irqrestore(&i8042_lock, flags);
350 return retval;
352 EXPORT_SYMBOL(i8042_command);
355 * i8042_kbd_write() sends a byte out through the keyboard interface.
358 static int i8042_kbd_write(struct serio *port, unsigned char c)
360 unsigned long flags;
361 int retval = 0;
363 spin_lock_irqsave(&i8042_lock, flags);
365 if (!(retval = i8042_wait_write())) {
366 dbg("%02x -> i8042 (kbd-data)\n", c);
367 i8042_write_data(c);
370 spin_unlock_irqrestore(&i8042_lock, flags);
372 return retval;
376 * i8042_aux_write() sends a byte out through the aux interface.
379 static int i8042_aux_write(struct serio *serio, unsigned char c)
381 struct i8042_port *port = serio->port_data;
383 return i8042_command(&c, port->mux == -1 ?
384 I8042_CMD_AUX_SEND :
385 I8042_CMD_MUX_SEND + port->mux);
390 * i8042_aux_close attempts to clear AUX or KBD port state by disabling
391 * and then re-enabling it.
394 static void i8042_port_close(struct serio *serio)
396 int irq_bit;
397 int disable_bit;
398 const char *port_name;
400 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
401 irq_bit = I8042_CTR_AUXINT;
402 disable_bit = I8042_CTR_AUXDIS;
403 port_name = "AUX";
404 } else {
405 irq_bit = I8042_CTR_KBDINT;
406 disable_bit = I8042_CTR_KBDDIS;
407 port_name = "KBD";
410 i8042_ctr &= ~irq_bit;
411 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
412 pr_warn("Can't write CTR while closing %s port\n", port_name);
414 udelay(50);
416 i8042_ctr &= ~disable_bit;
417 i8042_ctr |= irq_bit;
418 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
419 pr_err("Can't reactivate %s port\n", port_name);
422 * See if there is any data appeared while we were messing with
423 * port state.
425 i8042_interrupt(0, NULL);
429 * i8042_start() is called by serio core when port is about to finish
430 * registering. It will mark port as existing so i8042_interrupt can
431 * start sending data through it.
433 static int i8042_start(struct serio *serio)
435 struct i8042_port *port = serio->port_data;
437 spin_lock_irq(&i8042_lock);
438 port->exists = true;
439 spin_unlock_irq(&i8042_lock);
441 return 0;
445 * i8042_stop() marks serio port as non-existing so i8042_interrupt
446 * will not try to send data to the port that is about to go away.
447 * The function is called by serio core as part of unregister procedure.
449 static void i8042_stop(struct serio *serio)
451 struct i8042_port *port = serio->port_data;
453 spin_lock_irq(&i8042_lock);
454 port->exists = false;
455 port->serio = NULL;
456 spin_unlock_irq(&i8042_lock);
459 * We need to make sure that interrupt handler finishes using
460 * our serio port before we return from this function.
461 * We synchronize with both AUX and KBD IRQs because there is
462 * a (very unlikely) chance that AUX IRQ is raised for KBD port
463 * and vice versa.
465 synchronize_irq(I8042_AUX_IRQ);
466 synchronize_irq(I8042_KBD_IRQ);
470 * i8042_filter() filters out unwanted bytes from the input data stream.
471 * It is called from i8042_interrupt and thus is running with interrupts
472 * off and i8042_lock held.
474 static bool i8042_filter(unsigned char data, unsigned char str,
475 struct serio *serio)
477 if (unlikely(i8042_suppress_kbd_ack)) {
478 if ((~str & I8042_STR_AUXDATA) &&
479 (data == 0xfa || data == 0xfe)) {
480 i8042_suppress_kbd_ack--;
481 dbg("Extra keyboard ACK - filtered out\n");
482 return true;
486 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
487 dbg("Filtered out by platform filter\n");
488 return true;
491 return false;
495 * i8042_interrupt() is the most important function in this driver -
496 * it handles the interrupts from the i8042, and sends incoming bytes
497 * to the upper layers.
500 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
502 struct i8042_port *port;
503 struct serio *serio;
504 unsigned long flags;
505 unsigned char str, data;
506 unsigned int dfl;
507 unsigned int port_no;
508 bool filtered;
509 int ret = 1;
511 spin_lock_irqsave(&i8042_lock, flags);
513 str = i8042_read_status();
514 if (unlikely(~str & I8042_STR_OBF)) {
515 spin_unlock_irqrestore(&i8042_lock, flags);
516 if (irq)
517 dbg("Interrupt %d, without any data\n", irq);
518 ret = 0;
519 goto out;
522 data = i8042_read_data();
524 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
525 static unsigned long last_transmit;
526 static unsigned char last_str;
528 dfl = 0;
529 if (str & I8042_STR_MUXERR) {
530 dbg("MUX error, status is %02x, data is %02x\n",
531 str, data);
533 * When MUXERR condition is signalled the data register can only contain
534 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
535 * it is not always the case. Some KBCs also report 0xfc when there is
536 * nothing connected to the port while others sometimes get confused which
537 * port the data came from and signal error leaving the data intact. They
538 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
539 * to legacy mode yet, when we see one we'll add proper handling).
540 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
541 * rest assume that the data came from the same serio last byte
542 * was transmitted (if transmission happened not too long ago).
545 switch (data) {
546 default:
547 if (time_before(jiffies, last_transmit + HZ/10)) {
548 str = last_str;
549 break;
551 /* fall through - report timeout */
552 case 0xfc:
553 case 0xfd:
554 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
555 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
559 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
560 last_str = str;
561 last_transmit = jiffies;
562 } else {
564 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
565 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
567 port_no = (str & I8042_STR_AUXDATA) ?
568 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
571 port = &i8042_ports[port_no];
572 serio = port->exists ? port->serio : NULL;
574 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
575 port_no, irq,
576 dfl & SERIO_PARITY ? ", bad parity" : "",
577 dfl & SERIO_TIMEOUT ? ", timeout" : "");
579 filtered = i8042_filter(data, str, serio);
581 spin_unlock_irqrestore(&i8042_lock, flags);
583 if (likely(serio && !filtered))
584 serio_interrupt(serio, data, dfl);
586 out:
587 return IRQ_RETVAL(ret);
591 * i8042_enable_kbd_port enables keyboard port on chip
594 static int i8042_enable_kbd_port(void)
596 i8042_ctr &= ~I8042_CTR_KBDDIS;
597 i8042_ctr |= I8042_CTR_KBDINT;
599 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
600 i8042_ctr &= ~I8042_CTR_KBDINT;
601 i8042_ctr |= I8042_CTR_KBDDIS;
602 pr_err("Failed to enable KBD port\n");
603 return -EIO;
606 return 0;
610 * i8042_enable_aux_port enables AUX (mouse) port on chip
613 static int i8042_enable_aux_port(void)
615 i8042_ctr &= ~I8042_CTR_AUXDIS;
616 i8042_ctr |= I8042_CTR_AUXINT;
618 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
619 i8042_ctr &= ~I8042_CTR_AUXINT;
620 i8042_ctr |= I8042_CTR_AUXDIS;
621 pr_err("Failed to enable AUX port\n");
622 return -EIO;
625 return 0;
629 * i8042_enable_mux_ports enables 4 individual AUX ports after
630 * the controller has been switched into Multiplexed mode
633 static int i8042_enable_mux_ports(void)
635 unsigned char param;
636 int i;
638 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
639 i8042_command(&param, I8042_CMD_MUX_PFX + i);
640 i8042_command(&param, I8042_CMD_AUX_ENABLE);
643 return i8042_enable_aux_port();
647 * i8042_set_mux_mode checks whether the controller has an
648 * active multiplexor and puts the chip into Multiplexed (true)
649 * or Legacy (false) mode.
652 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
655 unsigned char param, val;
657 * Get rid of bytes in the queue.
660 i8042_flush();
663 * Internal loopback test - send three bytes, they should come back from the
664 * mouse interface, the last should be version.
667 param = val = 0xf0;
668 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != val)
669 return -1;
670 param = val = multiplex ? 0x56 : 0xf6;
671 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != val)
672 return -1;
673 param = val = multiplex ? 0xa4 : 0xa5;
674 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == val)
675 return -1;
678 * Workaround for interference with USB Legacy emulation
679 * that causes a v10.12 MUX to be found.
681 if (param == 0xac)
682 return -1;
684 if (mux_version)
685 *mux_version = param;
687 return 0;
691 * i8042_check_mux() checks whether the controller supports the PS/2 Active
692 * Multiplexing specification by Synaptics, Phoenix, Insyde and
693 * LCS/Telegraphics.
696 static int __init i8042_check_mux(void)
698 unsigned char mux_version;
700 if (i8042_set_mux_mode(true, &mux_version))
701 return -1;
703 pr_info("Detected active multiplexing controller, rev %d.%d\n",
704 (mux_version >> 4) & 0xf, mux_version & 0xf);
707 * Disable all muxed ports by disabling AUX.
709 i8042_ctr |= I8042_CTR_AUXDIS;
710 i8042_ctr &= ~I8042_CTR_AUXINT;
712 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
713 pr_err("Failed to disable AUX port, can't use MUX\n");
714 return -EIO;
717 i8042_mux_present = true;
719 return 0;
723 * The following is used to test AUX IRQ delivery.
725 static struct completion i8042_aux_irq_delivered __initdata;
726 static bool i8042_irq_being_tested __initdata;
728 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
730 unsigned long flags;
731 unsigned char str, data;
732 int ret = 0;
734 spin_lock_irqsave(&i8042_lock, flags);
735 str = i8042_read_status();
736 if (str & I8042_STR_OBF) {
737 data = i8042_read_data();
738 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
739 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
740 if (i8042_irq_being_tested &&
741 data == 0xa5 && (str & I8042_STR_AUXDATA))
742 complete(&i8042_aux_irq_delivered);
743 ret = 1;
745 spin_unlock_irqrestore(&i8042_lock, flags);
747 return IRQ_RETVAL(ret);
751 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
752 * verifies success by readinng CTR. Used when testing for presence of AUX
753 * port.
755 static int __init i8042_toggle_aux(bool on)
757 unsigned char param;
758 int i;
760 if (i8042_command(&param,
761 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
762 return -1;
764 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
765 for (i = 0; i < 100; i++) {
766 udelay(50);
768 if (i8042_command(&param, I8042_CMD_CTL_RCTR))
769 return -1;
771 if (!(param & I8042_CTR_AUXDIS) == on)
772 return 0;
775 return -1;
779 * i8042_check_aux() applies as much paranoia as it can at detecting
780 * the presence of an AUX interface.
783 static int __init i8042_check_aux(void)
785 int retval = -1;
786 bool irq_registered = false;
787 bool aux_loop_broken = false;
788 unsigned long flags;
789 unsigned char param;
792 * Get rid of bytes in the queue.
795 i8042_flush();
798 * Internal loopback test - filters out AT-type i8042's. Unfortunately
799 * SiS screwed up and their 5597 doesn't support the LOOP command even
800 * though it has an AUX port.
803 param = 0x5a;
804 retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
805 if (retval || param != 0x5a) {
808 * External connection test - filters out AT-soldered PS/2 i8042's
809 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
810 * 0xfa - no error on some notebooks which ignore the spec
811 * Because it's common for chipsets to return error on perfectly functioning
812 * AUX ports, we test for this only when the LOOP command failed.
815 if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
816 (param && param != 0xfa && param != 0xff))
817 return -1;
820 * If AUX_LOOP completed without error but returned unexpected data
821 * mark it as broken
823 if (!retval)
824 aux_loop_broken = true;
828 * Bit assignment test - filters out PS/2 i8042's in AT mode
831 if (i8042_toggle_aux(false)) {
832 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
833 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
836 if (i8042_toggle_aux(true))
837 return -1;
840 * Reset keyboard (needed on some laptops to successfully detect
841 * touchpad, e.g., some Gigabyte laptop models with Elantech
842 * touchpads).
844 if (i8042_kbdreset) {
845 pr_warn("Attempting to reset device connected to KBD port\n");
846 i8042_kbd_write(NULL, (unsigned char) 0xff);
850 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
851 * used it for a PCI card or somethig else.
854 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
856 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
857 * is working and hope we are right.
859 retval = 0;
860 goto out;
863 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
864 "i8042", i8042_platform_device))
865 goto out;
867 irq_registered = true;
869 if (i8042_enable_aux_port())
870 goto out;
872 spin_lock_irqsave(&i8042_lock, flags);
874 init_completion(&i8042_aux_irq_delivered);
875 i8042_irq_being_tested = true;
877 param = 0xa5;
878 retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
880 spin_unlock_irqrestore(&i8042_lock, flags);
882 if (retval)
883 goto out;
885 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
886 msecs_to_jiffies(250)) == 0) {
888 * AUX IRQ was never delivered so we need to flush the controller to
889 * get rid of the byte we put there; otherwise keyboard may not work.
891 dbg(" -- i8042 (aux irq test timeout)\n");
892 i8042_flush();
893 retval = -1;
896 out:
899 * Disable the interface.
902 i8042_ctr |= I8042_CTR_AUXDIS;
903 i8042_ctr &= ~I8042_CTR_AUXINT;
905 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
906 retval = -1;
908 if (irq_registered)
909 free_irq(I8042_AUX_IRQ, i8042_platform_device);
911 return retval;
914 static int i8042_controller_check(void)
916 if (i8042_flush()) {
917 pr_info("No controller found\n");
918 return -ENODEV;
921 return 0;
924 static int i8042_controller_selftest(void)
926 unsigned char param;
927 int i = 0;
930 * We try this 5 times; on some really fragile systems this does not
931 * take the first time...
933 do {
935 if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
936 pr_err("i8042 controller selftest timeout\n");
937 return -ENODEV;
940 if (param == I8042_RET_CTL_TEST)
941 return 0;
943 dbg("i8042 controller selftest: %#x != %#x\n",
944 param, I8042_RET_CTL_TEST);
945 msleep(50);
946 } while (i++ < 5);
948 #ifdef CONFIG_X86
950 * On x86, we don't fail entire i8042 initialization if controller
951 * reset fails in hopes that keyboard port will still be functional
952 * and user will still get a working keyboard. This is especially
953 * important on netbooks. On other arches we trust hardware more.
955 pr_info("giving up on controller selftest, continuing anyway...\n");
956 return 0;
957 #else
958 pr_err("i8042 controller selftest failed\n");
959 return -EIO;
960 #endif
964 * i8042_controller init initializes the i8042 controller, and,
965 * most importantly, sets it into non-xlated mode if that's
966 * desired.
969 static int i8042_controller_init(void)
971 unsigned long flags;
972 int n = 0;
973 unsigned char ctr[2];
976 * Save the CTR for restore on unload / reboot.
979 do {
980 if (n >= 10) {
981 pr_err("Unable to get stable CTR read\n");
982 return -EIO;
985 if (n != 0)
986 udelay(50);
988 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
989 pr_err("Can't read CTR while initializing i8042\n");
990 return -EIO;
993 } while (n < 2 || ctr[0] != ctr[1]);
995 i8042_initial_ctr = i8042_ctr = ctr[0];
998 * Disable the keyboard interface and interrupt.
1001 i8042_ctr |= I8042_CTR_KBDDIS;
1002 i8042_ctr &= ~I8042_CTR_KBDINT;
1005 * Handle keylock.
1008 spin_lock_irqsave(&i8042_lock, flags);
1009 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
1010 if (i8042_unlock)
1011 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
1012 else
1013 pr_warn("Warning: Keylock active\n");
1015 spin_unlock_irqrestore(&i8042_lock, flags);
1018 * If the chip is configured into nontranslated mode by the BIOS, don't
1019 * bother enabling translating and be happy.
1022 if (~i8042_ctr & I8042_CTR_XLATE)
1023 i8042_direct = true;
1026 * Set nontranslated mode for the kbd interface if requested by an option.
1027 * After this the kbd interface becomes a simple serial in/out, like the aux
1028 * interface is. We don't do this by default, since it can confuse notebook
1029 * BIOSes.
1032 if (i8042_direct)
1033 i8042_ctr &= ~I8042_CTR_XLATE;
1036 * Write CTR back.
1039 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1040 pr_err("Can't write CTR while initializing i8042\n");
1041 return -EIO;
1045 * Flush whatever accumulated while we were disabling keyboard port.
1048 i8042_flush();
1050 return 0;
1055 * Reset the controller and reset CRT to the original value set by BIOS.
1058 static void i8042_controller_reset(bool s2r_wants_reset)
1060 i8042_flush();
1063 * Disable both KBD and AUX interfaces so they don't get in the way
1066 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1067 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1069 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1070 pr_warn("Can't write CTR while resetting\n");
1073 * Disable MUX mode if present.
1076 if (i8042_mux_present)
1077 i8042_set_mux_mode(false, NULL);
1080 * Reset the controller if requested.
1083 if (i8042_reset == I8042_RESET_ALWAYS ||
1084 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1085 i8042_controller_selftest();
1089 * Restore the original control register setting.
1092 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1093 pr_warn("Can't restore CTR\n");
1098 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1099 * when kernel panics. Flashing LEDs is useful for users running X who may
1100 * not see the console and will help distinguishing panics from "real"
1101 * lockups.
1103 * Note that DELAY has a limit of 10ms so we will not get stuck here
1104 * waiting for KBC to free up even if KBD interrupt is off
1107 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1109 static long i8042_panic_blink(int state)
1111 long delay = 0;
1112 char led;
1114 led = (state) ? 0x01 | 0x04 : 0;
1115 while (i8042_read_status() & I8042_STR_IBF)
1116 DELAY;
1117 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1118 i8042_suppress_kbd_ack = 2;
1119 i8042_write_data(0xed); /* set leds */
1120 DELAY;
1121 while (i8042_read_status() & I8042_STR_IBF)
1122 DELAY;
1123 DELAY;
1124 dbg("%02x -> i8042 (panic blink)\n", led);
1125 i8042_write_data(led);
1126 DELAY;
1127 return delay;
1130 #undef DELAY
1132 #ifdef CONFIG_X86
1133 static void i8042_dritek_enable(void)
1135 unsigned char param = 0x90;
1136 int error;
1138 error = i8042_command(&param, 0x1059);
1139 if (error)
1140 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1142 #endif
1144 #ifdef CONFIG_PM
1147 * Here we try to reset everything back to a state we had
1148 * before suspending.
1151 static int i8042_controller_resume(bool s2r_wants_reset)
1153 int error;
1155 error = i8042_controller_check();
1156 if (error)
1157 return error;
1159 if (i8042_reset == I8042_RESET_ALWAYS ||
1160 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
1161 error = i8042_controller_selftest();
1162 if (error)
1163 return error;
1167 * Restore original CTR value and disable all ports
1170 i8042_ctr = i8042_initial_ctr;
1171 if (i8042_direct)
1172 i8042_ctr &= ~I8042_CTR_XLATE;
1173 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1174 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1175 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1176 pr_warn("Can't write CTR to resume, retrying...\n");
1177 msleep(50);
1178 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1179 pr_err("CTR write retry failed\n");
1180 return -EIO;
1185 #ifdef CONFIG_X86
1186 if (i8042_dritek)
1187 i8042_dritek_enable();
1188 #endif
1190 if (i8042_mux_present) {
1191 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1192 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1193 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1194 i8042_enable_aux_port();
1196 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1197 i8042_enable_kbd_port();
1199 i8042_interrupt(0, NULL);
1201 return 0;
1205 * Here we try to restore the original BIOS settings to avoid
1206 * upsetting it.
1209 static int i8042_pm_suspend(struct device *dev)
1211 int i;
1213 if (pm_suspend_via_firmware())
1214 i8042_controller_reset(true);
1216 /* Set up serio interrupts for system wakeup. */
1217 for (i = 0; i < I8042_NUM_PORTS; i++) {
1218 struct serio *serio = i8042_ports[i].serio;
1220 if (serio && device_may_wakeup(&serio->dev))
1221 enable_irq_wake(i8042_ports[i].irq);
1224 return 0;
1227 static int i8042_pm_resume_noirq(struct device *dev)
1229 if (!pm_resume_via_firmware())
1230 i8042_interrupt(0, NULL);
1232 return 0;
1235 static int i8042_pm_resume(struct device *dev)
1237 bool want_reset;
1238 int i;
1240 for (i = 0; i < I8042_NUM_PORTS; i++) {
1241 struct serio *serio = i8042_ports[i].serio;
1243 if (serio && device_may_wakeup(&serio->dev))
1244 disable_irq_wake(i8042_ports[i].irq);
1248 * If platform firmware was not going to be involved in suspend, we did
1249 * not restore the controller state to whatever it had been at boot
1250 * time, so we do not need to do anything.
1252 if (!pm_suspend_via_firmware())
1253 return 0;
1256 * We only need to reset the controller if we are resuming after handing
1257 * off control to the platform firmware, otherwise we can simply restore
1258 * the mode.
1260 want_reset = pm_resume_via_firmware();
1262 return i8042_controller_resume(want_reset);
1265 static int i8042_pm_thaw(struct device *dev)
1267 i8042_interrupt(0, NULL);
1269 return 0;
1272 static int i8042_pm_reset(struct device *dev)
1274 i8042_controller_reset(false);
1276 return 0;
1279 static int i8042_pm_restore(struct device *dev)
1281 return i8042_controller_resume(false);
1284 static const struct dev_pm_ops i8042_pm_ops = {
1285 .suspend = i8042_pm_suspend,
1286 .resume_noirq = i8042_pm_resume_noirq,
1287 .resume = i8042_pm_resume,
1288 .thaw = i8042_pm_thaw,
1289 .poweroff = i8042_pm_reset,
1290 .restore = i8042_pm_restore,
1293 #endif /* CONFIG_PM */
1296 * We need to reset the 8042 back to original mode on system shutdown,
1297 * because otherwise BIOSes will be confused.
1300 static void i8042_shutdown(struct platform_device *dev)
1302 i8042_controller_reset(false);
1305 static int __init i8042_create_kbd_port(void)
1307 struct serio *serio;
1308 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1310 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1311 if (!serio)
1312 return -ENOMEM;
1314 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1315 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1316 serio->start = i8042_start;
1317 serio->stop = i8042_stop;
1318 serio->close = i8042_port_close;
1319 serio->ps2_cmd_mutex = &i8042_mutex;
1320 serio->port_data = port;
1321 serio->dev.parent = &i8042_platform_device->dev;
1322 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1323 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1324 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1325 sizeof(serio->firmware_id));
1327 port->serio = serio;
1328 port->irq = I8042_KBD_IRQ;
1330 return 0;
1333 static int __init i8042_create_aux_port(int idx)
1335 struct serio *serio;
1336 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1337 struct i8042_port *port = &i8042_ports[port_no];
1339 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1340 if (!serio)
1341 return -ENOMEM;
1343 serio->id.type = SERIO_8042;
1344 serio->write = i8042_aux_write;
1345 serio->start = i8042_start;
1346 serio->stop = i8042_stop;
1347 serio->ps2_cmd_mutex = &i8042_mutex;
1348 serio->port_data = port;
1349 serio->dev.parent = &i8042_platform_device->dev;
1350 if (idx < 0) {
1351 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1352 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1353 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1354 sizeof(serio->firmware_id));
1355 serio->close = i8042_port_close;
1356 } else {
1357 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1358 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1359 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1360 sizeof(serio->firmware_id));
1363 port->serio = serio;
1364 port->mux = idx;
1365 port->irq = I8042_AUX_IRQ;
1367 return 0;
1370 static void __init i8042_free_kbd_port(void)
1372 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1373 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1376 static void __init i8042_free_aux_ports(void)
1378 int i;
1380 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1381 kfree(i8042_ports[i].serio);
1382 i8042_ports[i].serio = NULL;
1386 static void __init i8042_register_ports(void)
1388 int i;
1390 for (i = 0; i < I8042_NUM_PORTS; i++) {
1391 struct serio *serio = i8042_ports[i].serio;
1393 if (serio) {
1394 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1395 serio->name,
1396 (unsigned long) I8042_DATA_REG,
1397 (unsigned long) I8042_COMMAND_REG,
1398 i8042_ports[i].irq);
1399 serio_register_port(serio);
1400 device_set_wakeup_capable(&serio->dev, true);
1405 static void i8042_unregister_ports(void)
1407 int i;
1409 for (i = 0; i < I8042_NUM_PORTS; i++) {
1410 if (i8042_ports[i].serio) {
1411 serio_unregister_port(i8042_ports[i].serio);
1412 i8042_ports[i].serio = NULL;
1417 static void i8042_free_irqs(void)
1419 if (i8042_aux_irq_registered)
1420 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1421 if (i8042_kbd_irq_registered)
1422 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1424 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1427 static int __init i8042_setup_aux(void)
1429 int (*aux_enable)(void);
1430 int error;
1431 int i;
1433 if (i8042_check_aux())
1434 return -ENODEV;
1436 if (i8042_nomux || i8042_check_mux()) {
1437 error = i8042_create_aux_port(-1);
1438 if (error)
1439 goto err_free_ports;
1440 aux_enable = i8042_enable_aux_port;
1441 } else {
1442 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1443 error = i8042_create_aux_port(i);
1444 if (error)
1445 goto err_free_ports;
1447 aux_enable = i8042_enable_mux_ports;
1450 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1451 "i8042", i8042_platform_device);
1452 if (error)
1453 goto err_free_ports;
1455 if (aux_enable())
1456 goto err_free_irq;
1458 i8042_aux_irq_registered = true;
1459 return 0;
1461 err_free_irq:
1462 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1463 err_free_ports:
1464 i8042_free_aux_ports();
1465 return error;
1468 static int __init i8042_setup_kbd(void)
1470 int error;
1472 error = i8042_create_kbd_port();
1473 if (error)
1474 return error;
1476 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1477 "i8042", i8042_platform_device);
1478 if (error)
1479 goto err_free_port;
1481 error = i8042_enable_kbd_port();
1482 if (error)
1483 goto err_free_irq;
1485 i8042_kbd_irq_registered = true;
1486 return 0;
1488 err_free_irq:
1489 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1490 err_free_port:
1491 i8042_free_kbd_port();
1492 return error;
1495 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1496 unsigned long action, void *data)
1498 struct device *dev = data;
1499 struct serio *serio = to_serio_port(dev);
1500 struct i8042_port *port = serio->port_data;
1502 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1503 return 0;
1505 switch (action) {
1506 case BUS_NOTIFY_BOUND_DRIVER:
1507 port->driver_bound = true;
1508 break;
1510 case BUS_NOTIFY_UNBIND_DRIVER:
1511 port->driver_bound = false;
1512 break;
1515 return 0;
1518 static int __init i8042_probe(struct platform_device *dev)
1520 int error;
1522 i8042_platform_device = dev;
1524 if (i8042_reset == I8042_RESET_ALWAYS) {
1525 error = i8042_controller_selftest();
1526 if (error)
1527 return error;
1530 error = i8042_controller_init();
1531 if (error)
1532 return error;
1534 #ifdef CONFIG_X86
1535 if (i8042_dritek)
1536 i8042_dritek_enable();
1537 #endif
1539 if (!i8042_noaux) {
1540 error = i8042_setup_aux();
1541 if (error && error != -ENODEV && error != -EBUSY)
1542 goto out_fail;
1545 if (!i8042_nokbd) {
1546 error = i8042_setup_kbd();
1547 if (error)
1548 goto out_fail;
1551 * Ok, everything is ready, let's register all serio ports
1553 i8042_register_ports();
1555 return 0;
1557 out_fail:
1558 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1559 i8042_free_irqs();
1560 i8042_controller_reset(false);
1561 i8042_platform_device = NULL;
1563 return error;
1566 static int i8042_remove(struct platform_device *dev)
1568 i8042_unregister_ports();
1569 i8042_free_irqs();
1570 i8042_controller_reset(false);
1571 i8042_platform_device = NULL;
1573 return 0;
1576 static struct platform_driver i8042_driver = {
1577 .driver = {
1578 .name = "i8042",
1579 #ifdef CONFIG_PM
1580 .pm = &i8042_pm_ops,
1581 #endif
1583 .remove = i8042_remove,
1584 .shutdown = i8042_shutdown,
1587 static struct notifier_block i8042_kbd_bind_notifier_block = {
1588 .notifier_call = i8042_kbd_bind_notifier,
1591 static int __init i8042_init(void)
1593 struct platform_device *pdev;
1594 int err;
1596 dbg_init();
1598 err = i8042_platform_init();
1599 if (err)
1600 return err;
1602 err = i8042_controller_check();
1603 if (err)
1604 goto err_platform_exit;
1606 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1607 if (IS_ERR(pdev)) {
1608 err = PTR_ERR(pdev);
1609 goto err_platform_exit;
1612 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1613 panic_blink = i8042_panic_blink;
1615 return 0;
1617 err_platform_exit:
1618 i8042_platform_exit();
1619 return err;
1622 static void __exit i8042_exit(void)
1624 platform_device_unregister(i8042_platform_device);
1625 platform_driver_unregister(&i8042_driver);
1626 i8042_platform_exit();
1628 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1629 panic_blink = NULL;
1632 module_init(i8042_init);
1633 module_exit(i8042_exit);