ASoC: arizona: Correct handling of FLL theta in synchroniser mode
[linux/fpc-iii.git] / drivers / mmc / host / dw_mmc-k3.c
blob8e9d886bfcda3780cf5be23f17c7e2d0f7cc5922
1 /*
2 * Copyright (c) 2013 Linaro Ltd.
3 * Copyright (c) 2013 Hisilicon Limited.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
11 #include <linux/clk.h>
12 #include <linux/mfd/syscon.h>
13 #include <linux/mmc/host.h>
14 #include <linux/mmc/dw_mmc.h>
15 #include <linux/module.h>
16 #include <linux/of_address.h>
17 #include <linux/platform_device.h>
18 #include <linux/regmap.h>
19 #include <linux/regulator/consumer.h>
21 #include "dw_mmc.h"
22 #include "dw_mmc-pltfm.h"
25 * hi6220 sd only support io voltage 1.8v and 3v
26 * Also need config AO_SCTRL_SEL18 accordingly
28 #define AO_SCTRL_SEL18 BIT(10)
29 #define AO_SCTRL_CTRL3 0x40C
31 struct k3_priv {
32 struct regmap *reg;
35 static unsigned long dw_mci_hi6220_caps[] = {
36 MMC_CAP_CMD23,
37 MMC_CAP_CMD23,
41 static void dw_mci_k3_set_ios(struct dw_mci *host, struct mmc_ios *ios)
43 int ret;
45 ret = clk_set_rate(host->ciu_clk, ios->clock);
46 if (ret)
47 dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);
49 host->bus_hz = clk_get_rate(host->ciu_clk);
52 static const struct dw_mci_drv_data k3_drv_data = {
53 .set_ios = dw_mci_k3_set_ios,
56 static int dw_mci_hi6220_parse_dt(struct dw_mci *host)
58 struct k3_priv *priv;
60 priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
61 if (!priv)
62 return -ENOMEM;
64 priv->reg = syscon_regmap_lookup_by_phandle(host->dev->of_node,
65 "hisilicon,peripheral-syscon");
66 if (IS_ERR(priv->reg))
67 priv->reg = NULL;
69 host->priv = priv;
70 return 0;
73 static int dw_mci_hi6220_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
75 struct dw_mci_slot *slot = mmc_priv(mmc);
76 struct k3_priv *priv;
77 struct dw_mci *host;
78 int min_uv, max_uv;
79 int ret;
81 host = slot->host;
82 priv = host->priv;
84 if (!priv || !priv->reg)
85 return 0;
87 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
88 ret = regmap_update_bits(priv->reg, AO_SCTRL_CTRL3,
89 AO_SCTRL_SEL18, 0);
90 min_uv = 3000000;
91 max_uv = 3000000;
92 } else if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
93 ret = regmap_update_bits(priv->reg, AO_SCTRL_CTRL3,
94 AO_SCTRL_SEL18, AO_SCTRL_SEL18);
95 min_uv = 1800000;
96 max_uv = 1800000;
97 } else {
98 dev_dbg(host->dev, "voltage not supported\n");
99 return -EINVAL;
102 if (ret) {
103 dev_dbg(host->dev, "switch voltage failed\n");
104 return ret;
107 if (IS_ERR_OR_NULL(mmc->supply.vqmmc))
108 return 0;
110 ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv);
111 if (ret) {
112 dev_dbg(host->dev, "Regulator set error %d: %d - %d\n",
113 ret, min_uv, max_uv);
114 return ret;
117 return 0;
120 static void dw_mci_hi6220_set_ios(struct dw_mci *host, struct mmc_ios *ios)
122 int ret;
123 unsigned int clock;
125 clock = (ios->clock <= 25000000) ? 25000000 : ios->clock;
127 ret = clk_set_rate(host->biu_clk, clock);
128 if (ret)
129 dev_warn(host->dev, "failed to set rate %uHz\n", clock);
131 host->bus_hz = clk_get_rate(host->biu_clk);
134 static const struct dw_mci_drv_data hi6220_data = {
135 .caps = dw_mci_hi6220_caps,
136 .switch_voltage = dw_mci_hi6220_switch_voltage,
137 .set_ios = dw_mci_hi6220_set_ios,
138 .parse_dt = dw_mci_hi6220_parse_dt,
141 static const struct of_device_id dw_mci_k3_match[] = {
142 { .compatible = "hisilicon,hi4511-dw-mshc", .data = &k3_drv_data, },
143 { .compatible = "hisilicon,hi6220-dw-mshc", .data = &hi6220_data, },
146 MODULE_DEVICE_TABLE(of, dw_mci_k3_match);
148 static int dw_mci_k3_probe(struct platform_device *pdev)
150 const struct dw_mci_drv_data *drv_data;
151 const struct of_device_id *match;
153 match = of_match_node(dw_mci_k3_match, pdev->dev.of_node);
154 drv_data = match->data;
156 return dw_mci_pltfm_register(pdev, drv_data);
159 #ifdef CONFIG_PM_SLEEP
160 static int dw_mci_k3_suspend(struct device *dev)
162 struct dw_mci *host = dev_get_drvdata(dev);
163 int ret;
165 ret = dw_mci_suspend(host);
166 if (!ret)
167 clk_disable_unprepare(host->ciu_clk);
169 return ret;
172 static int dw_mci_k3_resume(struct device *dev)
174 struct dw_mci *host = dev_get_drvdata(dev);
175 int ret;
177 ret = clk_prepare_enable(host->ciu_clk);
178 if (ret) {
179 dev_err(host->dev, "failed to enable ciu clock\n");
180 return ret;
183 return dw_mci_resume(host);
185 #endif /* CONFIG_PM_SLEEP */
187 static SIMPLE_DEV_PM_OPS(dw_mci_k3_pmops, dw_mci_k3_suspend, dw_mci_k3_resume);
189 static struct platform_driver dw_mci_k3_pltfm_driver = {
190 .probe = dw_mci_k3_probe,
191 .remove = dw_mci_pltfm_remove,
192 .driver = {
193 .name = "dwmmc_k3",
194 .of_match_table = dw_mci_k3_match,
195 .pm = &dw_mci_k3_pmops,
199 module_platform_driver(dw_mci_k3_pltfm_driver);
201 MODULE_DESCRIPTION("K3 Specific DW-MSHC Driver Extension");
202 MODULE_LICENSE("GPL v2");
203 MODULE_ALIAS("platform:dwmmc_k3");