2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2011 Guennadi Liakhovetski
7 * Copyright (C) 2007 Ian Molton
8 * Copyright (C) 2004 Ian Molton
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Driver for the MMC / SD / SDIO IP found in:
16 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
18 * This driver draws mainly on scattered spec sheets, Reverse engineering
19 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
20 * support). (Further 4 bit support from a later datasheet).
23 * Investigate using a workqueue for PIO transfers
26 * Better Power management
27 * Handle MMC errors better
28 * double buffer support
32 #include <linux/delay.h>
33 #include <linux/device.h>
34 #include <linux/highmem.h>
35 #include <linux/interrupt.h>
37 #include <linux/irq.h>
38 #include <linux/mfd/tmio.h>
39 #include <linux/mmc/host.h>
40 #include <linux/mmc/mmc.h>
41 #include <linux/mmc/slot-gpio.h>
42 #include <linux/module.h>
43 #include <linux/pagemap.h>
44 #include <linux/platform_device.h>
45 #include <linux/pm_qos.h>
46 #include <linux/pm_runtime.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/mmc/sdio.h>
49 #include <linux/scatterlist.h>
50 #include <linux/spinlock.h>
51 #include <linux/workqueue.h>
55 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
57 host
->sdcard_irq_mask
&= ~(i
& TMIO_MASK_IRQ
);
58 sd_ctrl_write32_as_16_and_16(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
61 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
63 host
->sdcard_irq_mask
|= (i
& TMIO_MASK_IRQ
);
64 sd_ctrl_write32_as_16_and_16(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
67 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
69 sd_ctrl_write32_as_16_and_16(host
, CTL_STATUS
, ~i
);
72 static void tmio_mmc_init_sg(struct tmio_mmc_host
*host
, struct mmc_data
*data
)
74 host
->sg_len
= data
->sg_len
;
75 host
->sg_ptr
= data
->sg
;
76 host
->sg_orig
= data
->sg
;
80 static int tmio_mmc_next_sg(struct tmio_mmc_host
*host
)
82 host
->sg_ptr
= sg_next(host
->sg_ptr
);
84 return --host
->sg_len
;
87 #define CMDREQ_TIMEOUT 5000
89 #ifdef CONFIG_MMC_DEBUG
91 #define STATUS_TO_TEXT(a, status, i) \
93 if (status & TMIO_STAT_##a) { \
100 static void pr_debug_status(u32 status
)
103 pr_debug("status: %08x = ", status
);
104 STATUS_TO_TEXT(CARD_REMOVE
, status
, i
);
105 STATUS_TO_TEXT(CARD_INSERT
, status
, i
);
106 STATUS_TO_TEXT(SIGSTATE
, status
, i
);
107 STATUS_TO_TEXT(WRPROTECT
, status
, i
);
108 STATUS_TO_TEXT(CARD_REMOVE_A
, status
, i
);
109 STATUS_TO_TEXT(CARD_INSERT_A
, status
, i
);
110 STATUS_TO_TEXT(SIGSTATE_A
, status
, i
);
111 STATUS_TO_TEXT(CMD_IDX_ERR
, status
, i
);
112 STATUS_TO_TEXT(STOPBIT_ERR
, status
, i
);
113 STATUS_TO_TEXT(ILL_FUNC
, status
, i
);
114 STATUS_TO_TEXT(CMD_BUSY
, status
, i
);
115 STATUS_TO_TEXT(CMDRESPEND
, status
, i
);
116 STATUS_TO_TEXT(DATAEND
, status
, i
);
117 STATUS_TO_TEXT(CRCFAIL
, status
, i
);
118 STATUS_TO_TEXT(DATATIMEOUT
, status
, i
);
119 STATUS_TO_TEXT(CMDTIMEOUT
, status
, i
);
120 STATUS_TO_TEXT(RXOVERFLOW
, status
, i
);
121 STATUS_TO_TEXT(TXUNDERRUN
, status
, i
);
122 STATUS_TO_TEXT(RXRDY
, status
, i
);
123 STATUS_TO_TEXT(TXRQ
, status
, i
);
124 STATUS_TO_TEXT(ILL_ACCESS
, status
, i
);
129 #define pr_debug_status(s) do { } while (0)
132 static void tmio_mmc_enable_sdio_irq(struct mmc_host
*mmc
, int enable
)
134 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
136 if (enable
&& !host
->sdio_irq_enabled
) {
137 /* Keep device active while SDIO irq is enabled */
138 pm_runtime_get_sync(mmc_dev(mmc
));
139 host
->sdio_irq_enabled
= true;
141 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
&
142 ~TMIO_SDIO_STAT_IOIRQ
;
143 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0001);
144 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
145 } else if (!enable
&& host
->sdio_irq_enabled
) {
146 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
;
147 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
148 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0000);
150 host
->sdio_irq_enabled
= false;
151 pm_runtime_mark_last_busy(mmc_dev(mmc
));
152 pm_runtime_put_autosuspend(mmc_dev(mmc
));
156 static void tmio_mmc_clk_start(struct tmio_mmc_host
*host
)
158 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, CLK_CTL_SCLKEN
|
159 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
160 msleep(host
->pdata
->flags
& TMIO_MMC_MIN_RCAR2
? 1 : 10);
162 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
) {
163 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0100);
168 static void tmio_mmc_clk_stop(struct tmio_mmc_host
*host
)
170 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
) {
171 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0000);
175 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, ~CLK_CTL_SCLKEN
&
176 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
177 msleep(host
->pdata
->flags
& TMIO_MMC_MIN_RCAR2
? 5 : 10);
180 static void tmio_mmc_set_clock(struct tmio_mmc_host
*host
,
181 unsigned int new_clock
)
185 if (new_clock
== 0) {
186 tmio_mmc_clk_stop(host
);
190 if (host
->clk_update
)
191 clock
= host
->clk_update(host
, new_clock
) / 512;
193 clock
= host
->mmc
->f_min
;
195 for (clk
= 0x80000080; new_clock
>= (clock
<< 1); clk
>>= 1)
198 /* 1/1 clock is option */
199 if ((host
->pdata
->flags
& TMIO_MMC_CLK_ACTUAL
) && ((clk
>> 22) & 0x1))
202 if (host
->set_clk_div
)
203 host
->set_clk_div(host
->pdev
, (clk
>> 22) & 1);
205 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, ~CLK_CTL_SCLKEN
&
206 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
207 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, clk
& CLK_CTL_DIV_MASK
);
208 if (!(host
->pdata
->flags
& TMIO_MMC_MIN_RCAR2
))
211 tmio_mmc_clk_start(host
);
214 static void tmio_mmc_reset(struct tmio_mmc_host
*host
)
216 /* FIXME - should we set stop clock reg here */
217 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0000);
218 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
)
219 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0000);
221 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0001);
222 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
)
223 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0001);
227 static void tmio_mmc_reset_work(struct work_struct
*work
)
229 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
230 delayed_reset_work
.work
);
231 struct mmc_request
*mrq
;
234 spin_lock_irqsave(&host
->lock
, flags
);
238 * is request already finished? Since we use a non-blocking
239 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
240 * us, so, have to check for IS_ERR(host->mrq)
242 if (IS_ERR_OR_NULL(mrq
)
243 || time_is_after_jiffies(host
->last_req_ts
+
244 msecs_to_jiffies(CMDREQ_TIMEOUT
))) {
245 spin_unlock_irqrestore(&host
->lock
, flags
);
249 dev_warn(&host
->pdev
->dev
,
250 "timeout waiting for hardware interrupt (CMD%u)\n",
254 host
->data
->error
= -ETIMEDOUT
;
256 host
->cmd
->error
= -ETIMEDOUT
;
258 mrq
->cmd
->error
= -ETIMEDOUT
;
262 host
->force_pio
= false;
264 spin_unlock_irqrestore(&host
->lock
, flags
);
266 tmio_mmc_reset(host
);
268 /* Ready for new calls */
271 tmio_mmc_abort_dma(host
);
272 mmc_request_done(host
->mmc
, mrq
);
275 /* called with host->lock held, interrupts disabled */
276 static void tmio_mmc_finish_request(struct tmio_mmc_host
*host
)
278 struct mmc_request
*mrq
;
281 spin_lock_irqsave(&host
->lock
, flags
);
284 if (IS_ERR_OR_NULL(mrq
)) {
285 spin_unlock_irqrestore(&host
->lock
, flags
);
291 host
->force_pio
= false;
293 cancel_delayed_work(&host
->delayed_reset_work
);
296 spin_unlock_irqrestore(&host
->lock
, flags
);
298 if (mrq
->cmd
->error
|| (mrq
->data
&& mrq
->data
->error
))
299 tmio_mmc_abort_dma(host
);
301 mmc_request_done(host
->mmc
, mrq
);
304 static void tmio_mmc_done_work(struct work_struct
*work
)
306 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
308 tmio_mmc_finish_request(host
);
311 /* These are the bitmasks the tmio chip requires to implement the MMC response
312 * types. Note that R1 and R6 are the same in this scheme. */
313 #define APP_CMD 0x0040
314 #define RESP_NONE 0x0300
315 #define RESP_R1 0x0400
316 #define RESP_R1B 0x0500
317 #define RESP_R2 0x0600
318 #define RESP_R3 0x0700
319 #define DATA_PRESENT 0x0800
320 #define TRANSFER_READ 0x1000
321 #define TRANSFER_MULTI 0x2000
322 #define SECURITY_CMD 0x4000
323 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
325 static int tmio_mmc_start_command(struct tmio_mmc_host
*host
, struct mmc_command
*cmd
)
327 struct mmc_data
*data
= host
->data
;
329 u32 irq_mask
= TMIO_MASK_CMD
;
331 /* CMD12 is handled by hardware */
332 if (cmd
->opcode
== MMC_STOP_TRANSMISSION
&& !cmd
->arg
) {
333 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x001);
337 switch (mmc_resp_type(cmd
)) {
338 case MMC_RSP_NONE
: c
|= RESP_NONE
; break;
339 case MMC_RSP_R1
: c
|= RESP_R1
; break;
340 case MMC_RSP_R1B
: c
|= RESP_R1B
; break;
341 case MMC_RSP_R2
: c
|= RESP_R2
; break;
342 case MMC_RSP_R3
: c
|= RESP_R3
; break;
344 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd
));
350 /* FIXME - this seems to be ok commented out but the spec suggest this bit
351 * should be set when issuing app commands.
352 * if(cmd->flags & MMC_FLAG_ACMD)
357 if (data
->blocks
> 1) {
358 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x100);
362 * Disable auto CMD12 at IO_RW_EXTENDED when
363 * multiple block transfer
365 if ((host
->pdata
->flags
& TMIO_MMC_HAVE_CMD12_CTRL
) &&
366 (cmd
->opcode
== SD_IO_RW_EXTENDED
))
369 if (data
->flags
& MMC_DATA_READ
)
373 if (!host
->native_hotplug
)
374 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
375 tmio_mmc_enable_mmc_irqs(host
, irq_mask
);
377 /* Fire off the command */
378 sd_ctrl_write32_as_16_and_16(host
, CTL_ARG_REG
, cmd
->arg
);
379 sd_ctrl_write16(host
, CTL_SD_CMD
, c
);
384 static void tmio_mmc_transfer_data(struct tmio_mmc_host
*host
,
388 int is_read
= host
->data
->flags
& MMC_DATA_READ
;
395 sd_ctrl_read16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
397 sd_ctrl_write16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
399 /* if count was even number */
403 /* if count was odd number */
404 buf8
= (u8
*)(buf
+ (count
>> 1));
409 * driver and this function are assuming that
410 * it is used as little endian
413 *buf8
= sd_ctrl_read16(host
, CTL_SD_DATA_PORT
) & 0xff;
415 sd_ctrl_write16(host
, CTL_SD_DATA_PORT
, *buf8
);
419 * This chip always returns (at least?) as much data as you ask for.
420 * I'm unsure what happens if you ask for less than a block. This should be
421 * looked into to ensure that a funny length read doesn't hose the controller.
423 static void tmio_mmc_pio_irq(struct tmio_mmc_host
*host
)
425 struct mmc_data
*data
= host
->data
;
431 if ((host
->chan_tx
|| host
->chan_rx
) && !host
->force_pio
) {
432 pr_err("PIO IRQ in DMA mode!\n");
435 pr_debug("Spurious PIO IRQ\n");
439 sg_virt
= tmio_mmc_kmap_atomic(host
->sg_ptr
, &flags
);
440 buf
= (unsigned short *)(sg_virt
+ host
->sg_off
);
442 count
= host
->sg_ptr
->length
- host
->sg_off
;
443 if (count
> data
->blksz
)
446 pr_debug("count: %08x offset: %08x flags %08x\n",
447 count
, host
->sg_off
, data
->flags
);
449 /* Transfer the data */
450 tmio_mmc_transfer_data(host
, buf
, count
);
452 host
->sg_off
+= count
;
454 tmio_mmc_kunmap_atomic(host
->sg_ptr
, &flags
, sg_virt
);
456 if (host
->sg_off
== host
->sg_ptr
->length
)
457 tmio_mmc_next_sg(host
);
462 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host
*host
)
464 if (host
->sg_ptr
== &host
->bounce_sg
) {
466 void *sg_vaddr
= tmio_mmc_kmap_atomic(host
->sg_orig
, &flags
);
467 memcpy(sg_vaddr
, host
->bounce_buf
, host
->bounce_sg
.length
);
468 tmio_mmc_kunmap_atomic(host
->sg_orig
, &flags
, sg_vaddr
);
472 /* needs to be called with host->lock held */
473 void tmio_mmc_do_data_irq(struct tmio_mmc_host
*host
)
475 struct mmc_data
*data
= host
->data
;
476 struct mmc_command
*stop
;
481 dev_warn(&host
->pdev
->dev
, "Spurious data end IRQ\n");
486 /* FIXME - return correct transfer count on errors */
488 data
->bytes_xfered
= data
->blocks
* data
->blksz
;
490 data
->bytes_xfered
= 0;
492 pr_debug("Completed data request\n");
495 * FIXME: other drivers allow an optional stop command of any given type
496 * which we dont do, as the chip can auto generate them.
497 * Perhaps we can be smarter about when to use auto CMD12 and
498 * only issue the auto request when we know this is the desired
499 * stop command, allowing fallback to the stop command the
500 * upper layers expect. For now, we do what works.
503 if (data
->flags
& MMC_DATA_READ
) {
504 if (host
->chan_rx
&& !host
->force_pio
)
505 tmio_mmc_check_bounce_buffer(host
);
506 dev_dbg(&host
->pdev
->dev
, "Complete Rx request %p\n",
509 dev_dbg(&host
->pdev
->dev
, "Complete Tx request %p\n",
514 if (stop
->opcode
== MMC_STOP_TRANSMISSION
&& !stop
->arg
)
515 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x000);
520 schedule_work(&host
->done
);
523 static void tmio_mmc_data_irq(struct tmio_mmc_host
*host
)
525 struct mmc_data
*data
;
526 spin_lock(&host
->lock
);
532 if (host
->chan_tx
&& (data
->flags
& MMC_DATA_WRITE
) && !host
->force_pio
) {
533 u32 status
= sd_ctrl_read16_and_16_as_32(host
, CTL_STATUS
);
537 * Has all data been written out yet? Testing on SuperH showed,
538 * that in most cases the first interrupt comes already with the
539 * BUSY status bit clear, but on some operations, like mount or
540 * in the beginning of a write / sync / umount, there is one
541 * DATAEND interrupt with the BUSY bit set, in this cases
542 * waiting for one more interrupt fixes the problem.
544 if (host
->pdata
->flags
& TMIO_MMC_HAS_IDLE_WAIT
) {
545 if (status
& TMIO_STAT_SCLKDIVEN
)
548 if (!(status
& TMIO_STAT_CMD_BUSY
))
553 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
554 tasklet_schedule(&host
->dma_complete
);
556 } else if (host
->chan_rx
&& (data
->flags
& MMC_DATA_READ
) && !host
->force_pio
) {
557 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
558 tasklet_schedule(&host
->dma_complete
);
560 tmio_mmc_do_data_irq(host
);
561 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_READOP
| TMIO_MASK_WRITEOP
);
564 spin_unlock(&host
->lock
);
567 static void tmio_mmc_cmd_irq(struct tmio_mmc_host
*host
,
570 struct mmc_command
*cmd
= host
->cmd
;
573 spin_lock(&host
->lock
);
576 pr_debug("Spurious CMD irq\n");
582 /* This controller is sicker than the PXA one. Not only do we need to
583 * drop the top 8 bits of the first response word, we also need to
584 * modify the order of the response for short response command types.
587 for (i
= 3, addr
= CTL_RESPONSE
; i
>= 0 ; i
--, addr
+= 4)
588 cmd
->resp
[i
] = sd_ctrl_read16_and_16_as_32(host
, addr
);
590 if (cmd
->flags
& MMC_RSP_136
) {
591 cmd
->resp
[0] = (cmd
->resp
[0] << 8) | (cmd
->resp
[1] >> 24);
592 cmd
->resp
[1] = (cmd
->resp
[1] << 8) | (cmd
->resp
[2] >> 24);
593 cmd
->resp
[2] = (cmd
->resp
[2] << 8) | (cmd
->resp
[3] >> 24);
595 } else if (cmd
->flags
& MMC_RSP_R3
) {
596 cmd
->resp
[0] = cmd
->resp
[3];
599 if (stat
& TMIO_STAT_CMDTIMEOUT
)
600 cmd
->error
= -ETIMEDOUT
;
601 else if (stat
& TMIO_STAT_CRCFAIL
&& cmd
->flags
& MMC_RSP_CRC
)
602 cmd
->error
= -EILSEQ
;
604 /* If there is data to handle we enable data IRQs here, and
605 * we will ultimatley finish the request in the data_end handler.
606 * If theres no data or we encountered an error, finish now.
608 if (host
->data
&& !cmd
->error
) {
609 if (host
->data
->flags
& MMC_DATA_READ
) {
610 if (host
->force_pio
|| !host
->chan_rx
)
611 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_READOP
);
613 tasklet_schedule(&host
->dma_issue
);
615 if (host
->force_pio
|| !host
->chan_tx
)
616 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_WRITEOP
);
618 tasklet_schedule(&host
->dma_issue
);
621 schedule_work(&host
->done
);
625 spin_unlock(&host
->lock
);
628 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host
*host
,
629 int ireg
, int status
)
631 struct mmc_host
*mmc
= host
->mmc
;
633 /* Card insert / remove attempts */
634 if (ireg
& (TMIO_STAT_CARD_INSERT
| TMIO_STAT_CARD_REMOVE
)) {
635 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_CARD_INSERT
|
636 TMIO_STAT_CARD_REMOVE
);
637 if ((((ireg
& TMIO_STAT_CARD_REMOVE
) && mmc
->card
) ||
638 ((ireg
& TMIO_STAT_CARD_INSERT
) && !mmc
->card
)) &&
639 !work_pending(&mmc
->detect
.work
))
640 mmc_detect_change(host
->mmc
, msecs_to_jiffies(100));
647 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host
*host
,
648 int ireg
, int status
)
650 /* Command completion */
651 if (ireg
& (TMIO_STAT_CMDRESPEND
| TMIO_STAT_CMDTIMEOUT
)) {
652 tmio_mmc_ack_mmc_irqs(host
,
653 TMIO_STAT_CMDRESPEND
|
654 TMIO_STAT_CMDTIMEOUT
);
655 tmio_mmc_cmd_irq(host
, status
);
660 if (ireg
& (TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
)) {
661 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
);
662 tmio_mmc_pio_irq(host
);
666 /* Data transfer completion */
667 if (ireg
& TMIO_STAT_DATAEND
) {
668 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_DATAEND
);
669 tmio_mmc_data_irq(host
);
676 static void tmio_mmc_sdio_irq(int irq
, void *devid
)
678 struct tmio_mmc_host
*host
= devid
;
679 struct mmc_host
*mmc
= host
->mmc
;
680 struct tmio_mmc_data
*pdata
= host
->pdata
;
681 unsigned int ireg
, status
;
682 unsigned int sdio_status
;
684 if (!(pdata
->flags
& TMIO_MMC_SDIO_IRQ
))
687 status
= sd_ctrl_read16(host
, CTL_SDIO_STATUS
);
688 ireg
= status
& TMIO_SDIO_MASK_ALL
& ~host
->sdcard_irq_mask
;
690 sdio_status
= status
& ~TMIO_SDIO_MASK_ALL
;
691 if (pdata
->flags
& TMIO_MMC_SDIO_STATUS_QUIRK
)
694 sd_ctrl_write16(host
, CTL_SDIO_STATUS
, sdio_status
);
696 if (mmc
->caps
& MMC_CAP_SDIO_IRQ
&& ireg
& TMIO_SDIO_STAT_IOIRQ
)
697 mmc_signal_sdio_irq(mmc
);
700 irqreturn_t
tmio_mmc_irq(int irq
, void *devid
)
702 struct tmio_mmc_host
*host
= devid
;
703 unsigned int ireg
, status
;
705 status
= sd_ctrl_read16_and_16_as_32(host
, CTL_STATUS
);
706 ireg
= status
& TMIO_MASK_IRQ
& ~host
->sdcard_irq_mask
;
708 pr_debug_status(status
);
709 pr_debug_status(ireg
);
711 /* Clear the status except the interrupt status */
712 sd_ctrl_write32_as_16_and_16(host
, CTL_STATUS
, TMIO_MASK_IRQ
);
714 if (__tmio_mmc_card_detect_irq(host
, ireg
, status
))
716 if (__tmio_mmc_sdcard_irq(host
, ireg
, status
))
719 tmio_mmc_sdio_irq(irq
, devid
);
723 EXPORT_SYMBOL(tmio_mmc_irq
);
725 static int tmio_mmc_start_data(struct tmio_mmc_host
*host
,
726 struct mmc_data
*data
)
728 struct tmio_mmc_data
*pdata
= host
->pdata
;
730 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
731 data
->blksz
, data
->blocks
);
733 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
734 if (host
->mmc
->ios
.bus_width
== MMC_BUS_WIDTH_4
) {
735 int blksz_2bytes
= pdata
->flags
& TMIO_MMC_BLKSZ_2BYTES
;
737 if (data
->blksz
< 2 || (data
->blksz
< 4 && !blksz_2bytes
)) {
738 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
739 mmc_hostname(host
->mmc
), data
->blksz
);
744 tmio_mmc_init_sg(host
, data
);
747 /* Set transfer length / blocksize */
748 sd_ctrl_write16(host
, CTL_SD_XFER_LEN
, data
->blksz
);
749 sd_ctrl_write16(host
, CTL_XFER_BLK_COUNT
, data
->blocks
);
751 tmio_mmc_start_dma(host
, data
);
756 /* Process requests from the MMC layer */
757 static void tmio_mmc_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
759 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
763 spin_lock_irqsave(&host
->lock
, flags
);
766 pr_debug("request not null\n");
767 if (IS_ERR(host
->mrq
)) {
768 spin_unlock_irqrestore(&host
->lock
, flags
);
769 mrq
->cmd
->error
= -EAGAIN
;
770 mmc_request_done(mmc
, mrq
);
775 host
->last_req_ts
= jiffies
;
779 spin_unlock_irqrestore(&host
->lock
, flags
);
782 ret
= tmio_mmc_start_data(host
, mrq
->data
);
787 ret
= tmio_mmc_start_command(host
, mrq
->cmd
);
789 schedule_delayed_work(&host
->delayed_reset_work
,
790 msecs_to_jiffies(CMDREQ_TIMEOUT
));
795 host
->force_pio
= false;
797 mrq
->cmd
->error
= ret
;
798 mmc_request_done(mmc
, mrq
);
801 static int tmio_mmc_clk_enable(struct tmio_mmc_host
*host
)
803 if (!host
->clk_enable
)
806 return host
->clk_enable(host
);
809 static void tmio_mmc_power_on(struct tmio_mmc_host
*host
, unsigned short vdd
)
811 struct mmc_host
*mmc
= host
->mmc
;
814 /* .set_ios() is returning void, so, no chance to report an error */
817 host
->set_pwr(host
->pdev
, 1);
819 if (!IS_ERR(mmc
->supply
.vmmc
)) {
820 ret
= mmc_regulator_set_ocr(mmc
, mmc
->supply
.vmmc
, vdd
);
822 * Attention: empiric value. With a b43 WiFi SDIO card this
823 * delay proved necessary for reliable card-insertion probing.
824 * 100us were not enough. Is this the same 140us delay, as in
825 * tmio_mmc_set_ios()?
830 * It seems, VccQ should be switched on after Vcc, this is also what the
831 * omap_hsmmc.c driver does.
833 if (!IS_ERR(mmc
->supply
.vqmmc
) && !ret
) {
834 ret
= regulator_enable(mmc
->supply
.vqmmc
);
839 dev_dbg(&host
->pdev
->dev
, "Regulators failed to power up: %d\n",
843 static void tmio_mmc_power_off(struct tmio_mmc_host
*host
)
845 struct mmc_host
*mmc
= host
->mmc
;
847 if (!IS_ERR(mmc
->supply
.vqmmc
))
848 regulator_disable(mmc
->supply
.vqmmc
);
850 if (!IS_ERR(mmc
->supply
.vmmc
))
851 mmc_regulator_set_ocr(mmc
, mmc
->supply
.vmmc
, 0);
854 host
->set_pwr(host
->pdev
, 0);
857 static void tmio_mmc_set_bus_width(struct tmio_mmc_host
*host
,
858 unsigned char bus_width
)
861 case MMC_BUS_WIDTH_1
:
862 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, 0x80e0);
864 case MMC_BUS_WIDTH_4
:
865 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, 0x00e0);
870 /* Set MMC clock / power.
871 * Note: This controller uses a simple divider scheme therefore it cannot
872 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
873 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
876 static void tmio_mmc_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
878 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
879 struct device
*dev
= &host
->pdev
->dev
;
882 mutex_lock(&host
->ios_lock
);
884 spin_lock_irqsave(&host
->lock
, flags
);
886 if (IS_ERR(host
->mrq
)) {
888 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
889 current
->comm
, task_pid_nr(current
),
890 ios
->clock
, ios
->power_mode
);
891 host
->mrq
= ERR_PTR(-EINTR
);
894 "%s.%d: CMD%u active since %lu, now %lu!\n",
895 current
->comm
, task_pid_nr(current
),
896 host
->mrq
->cmd
->opcode
, host
->last_req_ts
, jiffies
);
898 spin_unlock_irqrestore(&host
->lock
, flags
);
900 mutex_unlock(&host
->ios_lock
);
904 host
->mrq
= ERR_PTR(-EBUSY
);
906 spin_unlock_irqrestore(&host
->lock
, flags
);
908 switch (ios
->power_mode
) {
910 tmio_mmc_power_off(host
);
911 tmio_mmc_clk_stop(host
);
914 tmio_mmc_power_on(host
, ios
->vdd
);
915 tmio_mmc_set_clock(host
, ios
->clock
);
916 tmio_mmc_set_bus_width(host
, ios
->bus_width
);
919 tmio_mmc_set_clock(host
, ios
->clock
);
920 tmio_mmc_set_bus_width(host
, ios
->bus_width
);
924 /* Let things settle. delay taken from winCE driver */
926 if (PTR_ERR(host
->mrq
) == -EINTR
)
927 dev_dbg(&host
->pdev
->dev
,
928 "%s.%d: IOS interrupted: clk %u, mode %u",
929 current
->comm
, task_pid_nr(current
),
930 ios
->clock
, ios
->power_mode
);
933 host
->clk_cache
= ios
->clock
;
935 mutex_unlock(&host
->ios_lock
);
938 static int tmio_mmc_get_ro(struct mmc_host
*mmc
)
940 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
941 struct tmio_mmc_data
*pdata
= host
->pdata
;
942 int ret
= mmc_gpio_get_ro(mmc
);
946 ret
= !((pdata
->flags
& TMIO_MMC_WRPROTECT_DISABLE
) ||
947 (sd_ctrl_read16_and_16_as_32(host
, CTL_STATUS
) & TMIO_STAT_WRPROTECT
));
952 static int tmio_multi_io_quirk(struct mmc_card
*card
,
953 unsigned int direction
, int blk_size
)
955 struct tmio_mmc_host
*host
= mmc_priv(card
->host
);
957 if (host
->multi_io_quirk
)
958 return host
->multi_io_quirk(card
, direction
, blk_size
);
963 static int tmio_mmc_card_busy(struct mmc_host
*mmc
)
965 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
967 return !(sd_ctrl_read16_and_16_as_32(host
, CTL_STATUS
) & TMIO_STAT_DAT0
);
970 static struct mmc_host_ops tmio_mmc_ops
= {
971 .request
= tmio_mmc_request
,
972 .set_ios
= tmio_mmc_set_ios
,
973 .get_ro
= tmio_mmc_get_ro
,
974 .get_cd
= mmc_gpio_get_cd
,
975 .enable_sdio_irq
= tmio_mmc_enable_sdio_irq
,
976 .card_busy
= tmio_mmc_card_busy
,
977 .multi_io_quirk
= tmio_multi_io_quirk
,
980 static int tmio_mmc_init_ocr(struct tmio_mmc_host
*host
)
982 struct tmio_mmc_data
*pdata
= host
->pdata
;
983 struct mmc_host
*mmc
= host
->mmc
;
985 mmc_regulator_get_supply(mmc
);
987 /* use ocr_mask if no regulator */
989 mmc
->ocr_avail
= pdata
->ocr_mask
;
993 * There is possibility that regulator has not been probed
996 return -EPROBE_DEFER
;
1001 static void tmio_mmc_of_parse(struct platform_device
*pdev
,
1002 struct tmio_mmc_data
*pdata
)
1004 const struct device_node
*np
= pdev
->dev
.of_node
;
1008 if (of_get_property(np
, "toshiba,mmc-wrprotect-disable", NULL
))
1009 pdata
->flags
|= TMIO_MMC_WRPROTECT_DISABLE
;
1012 struct tmio_mmc_host
*
1013 tmio_mmc_host_alloc(struct platform_device
*pdev
)
1015 struct tmio_mmc_host
*host
;
1016 struct mmc_host
*mmc
;
1018 mmc
= mmc_alloc_host(sizeof(struct tmio_mmc_host
), &pdev
->dev
);
1022 host
= mmc_priv(mmc
);
1028 EXPORT_SYMBOL(tmio_mmc_host_alloc
);
1030 void tmio_mmc_host_free(struct tmio_mmc_host
*host
)
1032 mmc_free_host(host
->mmc
);
1034 EXPORT_SYMBOL(tmio_mmc_host_free
);
1036 int tmio_mmc_host_probe(struct tmio_mmc_host
*_host
,
1037 struct tmio_mmc_data
*pdata
)
1039 struct platform_device
*pdev
= _host
->pdev
;
1040 struct mmc_host
*mmc
= _host
->mmc
;
1041 struct resource
*res_ctl
;
1043 u32 irq_mask
= TMIO_MASK_CMD
;
1045 tmio_mmc_of_parse(pdev
, pdata
);
1047 if (!(pdata
->flags
& TMIO_MMC_HAS_IDLE_WAIT
))
1048 _host
->write16_hook
= NULL
;
1050 res_ctl
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1054 ret
= mmc_of_parse(mmc
);
1058 _host
->pdata
= pdata
;
1059 platform_set_drvdata(pdev
, mmc
);
1061 _host
->set_pwr
= pdata
->set_pwr
;
1062 _host
->set_clk_div
= pdata
->set_clk_div
;
1064 ret
= tmio_mmc_init_ocr(_host
);
1068 _host
->ctl
= devm_ioremap(&pdev
->dev
,
1069 res_ctl
->start
, resource_size(res_ctl
));
1075 tmio_mmc_ops
.start_signal_voltage_switch
= _host
->start_signal_voltage_switch
;
1076 mmc
->ops
= &tmio_mmc_ops
;
1078 mmc
->caps
|= MMC_CAP_4_BIT_DATA
| pdata
->capabilities
;
1079 mmc
->caps2
|= pdata
->capabilities2
;
1081 mmc
->max_blk_size
= 512;
1082 mmc
->max_blk_count
= (PAGE_SIZE
/ mmc
->max_blk_size
) *
1084 mmc
->max_req_size
= mmc
->max_blk_size
* mmc
->max_blk_count
;
1085 mmc
->max_seg_size
= mmc
->max_req_size
;
1087 _host
->native_hotplug
= !(pdata
->flags
& TMIO_MMC_USE_GPIO_CD
||
1088 mmc
->caps
& MMC_CAP_NEEDS_POLL
||
1089 !mmc_card_is_removable(mmc
) ||
1090 mmc
->slot
.cd_irq
>= 0);
1092 if (tmio_mmc_clk_enable(_host
) < 0) {
1093 mmc
->f_max
= pdata
->hclk
;
1094 mmc
->f_min
= mmc
->f_max
/ 512;
1098 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1099 * looping forever...
1101 if (mmc
->f_min
== 0) {
1107 * While using internal tmio hardware logic for card detection, we need
1108 * to ensure it stays powered for it to work.
1110 if (_host
->native_hotplug
)
1111 pm_runtime_get_noresume(&pdev
->dev
);
1113 tmio_mmc_clk_stop(_host
);
1114 tmio_mmc_reset(_host
);
1116 _host
->sdcard_irq_mask
= sd_ctrl_read16_and_16_as_32(_host
, CTL_IRQ_MASK
);
1117 tmio_mmc_disable_mmc_irqs(_host
, TMIO_MASK_ALL
);
1119 /* Unmask the IRQs we want to know about */
1120 if (!_host
->chan_rx
)
1121 irq_mask
|= TMIO_MASK_READOP
;
1122 if (!_host
->chan_tx
)
1123 irq_mask
|= TMIO_MASK_WRITEOP
;
1124 if (!_host
->native_hotplug
)
1125 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
1127 _host
->sdcard_irq_mask
&= ~irq_mask
;
1129 _host
->sdio_irq_enabled
= false;
1130 if (pdata
->flags
& TMIO_MMC_SDIO_IRQ
) {
1131 _host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
;
1132 sd_ctrl_write16(_host
, CTL_SDIO_IRQ_MASK
, _host
->sdio_irq_mask
);
1133 sd_ctrl_write16(_host
, CTL_TRANSACTION_CTL
, 0x0000);
1136 spin_lock_init(&_host
->lock
);
1137 mutex_init(&_host
->ios_lock
);
1139 /* Init delayed work for request timeouts */
1140 INIT_DELAYED_WORK(&_host
->delayed_reset_work
, tmio_mmc_reset_work
);
1141 INIT_WORK(&_host
->done
, tmio_mmc_done_work
);
1143 /* See if we also get DMA */
1144 tmio_mmc_request_dma(_host
, pdata
);
1146 pm_runtime_set_active(&pdev
->dev
);
1147 pm_runtime_set_autosuspend_delay(&pdev
->dev
, 50);
1148 pm_runtime_use_autosuspend(&pdev
->dev
);
1149 pm_runtime_enable(&pdev
->dev
);
1151 ret
= mmc_add_host(mmc
);
1153 tmio_mmc_host_remove(_host
);
1157 dev_pm_qos_expose_latency_limit(&pdev
->dev
, 100);
1159 if (pdata
->flags
& TMIO_MMC_USE_GPIO_CD
) {
1160 ret
= mmc_gpio_request_cd(mmc
, pdata
->cd_gpio
, 0);
1162 tmio_mmc_host_remove(_host
);
1165 mmc_gpiod_request_cd_irq(mmc
);
1174 EXPORT_SYMBOL(tmio_mmc_host_probe
);
1176 void tmio_mmc_host_remove(struct tmio_mmc_host
*host
)
1178 struct platform_device
*pdev
= host
->pdev
;
1179 struct mmc_host
*mmc
= host
->mmc
;
1181 if (!host
->native_hotplug
)
1182 pm_runtime_get_sync(&pdev
->dev
);
1184 dev_pm_qos_hide_latency_limit(&pdev
->dev
);
1186 mmc_remove_host(mmc
);
1187 cancel_work_sync(&host
->done
);
1188 cancel_delayed_work_sync(&host
->delayed_reset_work
);
1189 tmio_mmc_release_dma(host
);
1191 pm_runtime_put_sync(&pdev
->dev
);
1192 pm_runtime_disable(&pdev
->dev
);
1194 EXPORT_SYMBOL(tmio_mmc_host_remove
);
1197 int tmio_mmc_host_runtime_suspend(struct device
*dev
)
1199 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1200 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1202 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_ALL
);
1204 if (host
->clk_cache
)
1205 tmio_mmc_clk_stop(host
);
1207 if (host
->clk_disable
)
1208 host
->clk_disable(host
);
1212 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend
);
1214 int tmio_mmc_host_runtime_resume(struct device
*dev
)
1216 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1217 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1219 tmio_mmc_reset(host
);
1220 tmio_mmc_clk_enable(host
);
1222 if (host
->clk_cache
)
1223 tmio_mmc_set_clock(host
, host
->clk_cache
);
1225 tmio_mmc_enable_dma(host
, true);
1229 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume
);
1232 MODULE_LICENSE("GPL v2");