drivers/pinctrl/meson/pinctrl-meson.h

   1 /*
   2  * Pin controller and GPIO driver for Amlogic Meson SoCs
   3  *
   4  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  *
  10  * You should have received a copy of the GNU General Public License
  11  * along with this program. If not, see <http://www.gnu.org/licenses/>.
  12  */
  13
  14 #include <linux/gpio.h>
  15 #include <linux/pinctrl/pinctrl.h>
  16 #include <linux/regmap.h>
  17 #include <linux/types.h>
  18
  19 /**
  20  * struct meson_pmx_group - a pinmux group
  21  *
  22  * @name:       group name
  23  * @pins:       pins in the group
  24  * @num_pins:   number of pins in the group
  25  * @is_gpio:    whether the group is a single GPIO group
  26  * @reg:        register offset for the group in the domain mux registers
  27  * @bit         bit index enabling the group
  28  * @domain:     index of the domain this group belongs to
  29  */
  30 struct meson_pmx_group {
  31         const char *name;
  32         const unsigned int *pins;
  33         unsigned int num_pins;
  34         bool is_gpio;
  35         unsigned int reg;
  36         unsigned int bit;
  37 };
  38
  39 /**
  40  * struct meson_pmx_func - a pinmux function
  41  *
  42  * @name:       function name
  43  * @groups:     groups in the function
  44  * @num_groups: number of groups in the function
  45  */
  46 struct meson_pmx_func {
  47         const char *name;
  48         const char * const *groups;
  49         unsigned int num_groups;
  50 };
  51
  52 /**
  53  * struct meson_reg_desc - a register descriptor
  54  *
  55  * @reg:        register offset in the regmap
  56  * @bit:        bit index in register
  57  *
  58  * The structure describes the information needed to control pull,
  59  * pull-enable, direction, etc. for a single pin
  60  */
  61 struct meson_reg_desc {
  62         unsigned int reg;
  63         unsigned int bit;
  64 };
  65
  66 /**
  67  * enum meson_reg_type - type of registers encoded in @meson_reg_desc
  68  */
  69 enum meson_reg_type {
  70         REG_PULLEN,
  71         REG_PULL,
  72         REG_DIR,
  73         REG_OUT,
  74         REG_IN,
  75         NUM_REG,
  76 };
  77
  78 /**
  79  * struct meson bank
  80  *
  81  * @name:       bank name
  82  * @first:      first pin of the bank
  83  * @last:       last pin of the bank
  84  * @regs:       array of register descriptors
  85  *
  86  * A bank represents a set of pins controlled by a contiguous set of
  87  * bits in the domain registers. The structure specifies which bits in
  88  * the regmap control the different functionalities. Each member of
  89  * the @regs array refers to the first pin of the bank.
  90  */
  91 struct meson_bank {
  92         const char *name;
  93         unsigned int first;
  94         unsigned int last;
  95         struct meson_reg_desc regs[NUM_REG];
  96 };
  97
  98 /**
  99  * struct meson_domain_data - domain platform data
 100  *
 101  * @name:       name of the domain
 102  * @banks:      set of banks belonging to the domain
 103  * @num_banks:  number of banks in the domain
 104  */
 105 struct meson_domain_data {
 106         const char *name;
 107         struct meson_bank *banks;
 108         unsigned int num_banks;
 109         unsigned int pin_base;
 110         unsigned int num_pins;
 111 };
 112
 113 /**
 114  * struct meson_domain
 115  *
 116  * @reg_mux:    registers for mux settings
 117  * @reg_pullen: registers for pull-enable settings
 118  * @reg_pull:   registers for pull settings
 119  * @reg_gpio:   registers for gpio settings
 120  * @chip:       gpio chip associated with the domain
 121  * @data;       platform data for the domain
 122  * @node:       device tree node for the domain
 123  *
 124  * A domain represents a set of banks controlled by the same set of
 125  * registers.
 126  */
 127 struct meson_domain {
 128         struct regmap *reg_mux;
 129         struct regmap *reg_pullen;
 130         struct regmap *reg_pull;
 131         struct regmap *reg_gpio;
 132
 133         struct gpio_chip chip;
 134         struct meson_domain_data *data;
 135         struct device_node *of_node;
 136 };
 137
 138 struct meson_pinctrl_data {
 139         const struct pinctrl_pin_desc *pins;
 140         struct meson_pmx_group *groups;
 141         struct meson_pmx_func *funcs;
 142         struct meson_domain_data *domain_data;
 143         unsigned int num_pins;
 144         unsigned int num_groups;
 145         unsigned int num_funcs;
 146 };
 147
 148 struct meson_pinctrl {
 149         struct device *dev;
 150         struct pinctrl_dev *pcdev;
 151         struct pinctrl_desc desc;
 152         struct meson_pinctrl_data *data;
 153         struct meson_domain *domain;
 154 };
 155
 156 #define PIN(x, b)       (b + x)
 157
 158 #define GROUP(grp, r, b)                                                \
 159         {                                                               \
 160                 .name = #grp,                                           \
 161                 .pins = grp ## _pins,                                   \
 162                 .num_pins = ARRAY_SIZE(grp ## _pins),                   \
 163                 .reg = r,                                               \
 164                 .bit = b,                                               \
 165          }
 166
 167 #define GPIO_GROUP(gpio, b)                                             \
 168         {                                                               \
 169                 .name = #gpio,                                          \
 170                 .pins = (const unsigned int[]){ PIN(gpio, b) },         \
 171                 .num_pins = 1,                                          \
 172                 .is_gpio = true,                                        \
 173          }
 174
 175 #define FUNCTION(fn)                                                    \
 176         {                                                               \
 177                 .name = #fn,                                            \
 178                 .groups = fn ## _groups,                                \
 179                 .num_groups = ARRAY_SIZE(fn ## _groups),                \
 180         }
 181
 182 #define BANK(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib)         \
 183         {                                                               \
 184                 .name   = n,                                            \
 185                 .first  = f,                                            \
 186                 .last   = l,                                            \
 187                 .regs   = {                                             \
 188                         [REG_PULLEN]    = { per, peb },                 \
 189                         [REG_PULL]      = { pr, pb },                   \
 190                         [REG_DIR]       = { dr, db },                   \
 191                         [REG_OUT]       = { or, ob },                   \
 192                         [REG_IN]        = { ir, ib },                   \
 193                 },                                                      \
 194          }
 195
 196 #define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
 197
 198 extern struct meson_pinctrl_data meson8_cbus_pinctrl_data;
 199 extern struct meson_pinctrl_data meson8_aobus_pinctrl_data;
 200 extern struct meson_pinctrl_data meson8b_cbus_pinctrl_data;
 201 extern struct meson_pinctrl_data meson8b_aobus_pinctrl_data;
 202 extern struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data;
 203 extern struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data;