arch/arm/boot/dts/am4372.dtsi

   1 /*
   2  * Device Tree Source for AM4372 SoC
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/bus/ti-sysc.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/interrupt-controller/arm-gic.h>
  14 #include <dt-bindings/clock/am4.h>
  15
  16 / {
  17         compatible = "ti,am4372", "ti,am43";
  18         interrupt-parent = <&wakeupgen>;
  19         #address-cells = <1>;
  20         #size-cells = <1>;
  21         chosen { };
  22
  23         memory@0 {
  24                 device_type = "memory";
  25                 reg = <0 0>;
  26         };
  27
  28         aliases {
  29                 i2c0 = &i2c0;
  30                 i2c1 = &i2c1;
  31                 i2c2 = &i2c2;
  32                 serial0 = &uart0;
  33                 serial1 = &uart1;
  34                 serial2 = &uart2;
  35                 serial3 = &uart3;
  36                 serial4 = &uart4;
  37                 serial5 = &uart5;
  38                 ethernet0 = &cpsw_emac0;
  39                 ethernet1 = &cpsw_emac1;
  40                 spi0 = &qspi;
  41         };
  42
  43         cpus {
  44                 #address-cells = <1>;
  45                 #size-cells = <0>;
  46                 cpu: cpu@0 {
  47                         compatible = "arm,cortex-a9";
  48                         device_type = "cpu";
  49                         reg = <0>;
  50
  51                         clocks = <&dpll_mpu_ck>;
  52                         clock-names = "cpu";
  53
  54                         operating-points-v2 = <&cpu0_opp_table>;
  55
  56                         clock-latency = <300000>; /* From omap-cpufreq driver */
  57                 };
  58         };
  59
  60         cpu0_opp_table: opp-table {
  61                 compatible = "operating-points-v2-ti-cpu";
  62                 syscon = <&scm_conf>;
  63
  64                 opp50-300000000 {
  65                         opp-hz = /bits/ 64 <300000000>;
  66                         opp-microvolt = <950000 931000 969000>;
  67                         opp-supported-hw = <0xFF 0x01>;
  68                         opp-suspend;
  69                 };
  70
  71                 opp100-600000000 {
  72                         opp-hz = /bits/ 64 <600000000>;
  73                         opp-microvolt = <1100000 1078000 1122000>;
  74                         opp-supported-hw = <0xFF 0x04>;
  75                 };
  76
  77                 opp120-720000000 {
  78                         opp-hz = /bits/ 64 <720000000>;
  79                         opp-microvolt = <1200000 1176000 1224000>;
  80                         opp-supported-hw = <0xFF 0x08>;
  81                 };
  82
  83                 oppturbo-800000000 {
  84                         opp-hz = /bits/ 64 <800000000>;
  85                         opp-microvolt = <1260000 1234800 1285200>;
  86                         opp-supported-hw = <0xFF 0x10>;
  87                 };
  88
  89                 oppnitro-1000000000 {
  90                         opp-hz = /bits/ 64 <1000000000>;
  91                         opp-microvolt = <1325000 1298500 1351500>;
  92                         opp-supported-hw = <0xFF 0x20>;
  93                 };
  94         };
  95
  96         soc {
  97                 compatible = "ti,omap-infra";
  98                 mpu {
  99                         compatible = "ti,omap4-mpu";
 100                         ti,hwmods = "mpu";
 101                         pm-sram = <&pm_sram_code
 102                                    &pm_sram_data>;
 103                 };
 104         };
 105
 106         gic: interrupt-controller@48241000 {
 107                 compatible = "arm,cortex-a9-gic";
 108                 interrupt-controller;
 109                 #interrupt-cells = <3>;
 110                 reg = <0x48241000 0x1000>,
 111                       <0x48240100 0x0100>;
 112                 interrupt-parent = <&gic>;
 113         };
 114
 115         wakeupgen: interrupt-controller@48281000 {
 116                 compatible = "ti,omap4-wugen-mpu";
 117                 interrupt-controller;
 118                 #interrupt-cells = <3>;
 119                 reg = <0x48281000 0x1000>;
 120                 interrupt-parent = <&gic>;
 121         };
 122
 123         scu: scu@48240000 {
 124                 compatible = "arm,cortex-a9-scu";
 125                 reg = <0x48240000 0x100>;
 126         };
 127
 128         global_timer: timer@48240200 {
 129                 compatible = "arm,cortex-a9-global-timer";
 130                 reg = <0x48240200 0x100>;
 131                 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
 132                 interrupt-parent = <&gic>;
 133                 clocks = <&mpu_periphclk>;
 134         };
 135
 136         local_timer: timer@48240600 {
 137                 compatible = "arm,cortex-a9-twd-timer";
 138                 reg = <0x48240600 0x100>;
 139                 interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
 140                 interrupt-parent = <&gic>;
 141                 clocks = <&mpu_periphclk>;
 142         };
 143
 144         l2-cache-controller@48242000 {
 145                 compatible = "arm,pl310-cache";
 146                 reg = <0x48242000 0x1000>;
 147                 cache-unified;
 148                 cache-level = <2>;
 149         };
 150
 151         ocp@44000000 {
 152                 compatible = "ti,am4372-l3-noc", "simple-bus";
 153                 #address-cells = <1>;
 154                 #size-cells = <1>;
 155                 ranges;
 156                 ti,hwmods = "l3_main";
 157                 ti,no-idle;
 158                 reg = <0x44000000 0x400000
 159                        0x44800000 0x400000>;
 160                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 161                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 162
 163                 l4_wkup: interconnect@44c00000 {
 164                         wkup_m3: wkup_m3@100000 {
 165                                 compatible = "ti,am4372-wkup-m3";
 166                                 reg = <0x100000 0x4000>,
 167                                       <0x180000 0x2000>;
 168                                 reg-names = "umem", "dmem";
 169                                 ti,hwmods = "wkup_m3";
 170                                 ti,pm-firmware = "am335x-pm-firmware.elf";
 171                         };
 172                 };
 173                 l4_per: interconnect@48000000 {
 174                 };
 175                 l4_fast: interconnect@4a000000 {
 176                 };
 177
 178                 emif: emif@4c000000 {
 179                         compatible = "ti,emif-am4372";
 180                         reg = <0x4c000000 0x1000000>;
 181                         ti,hwmods = "emif";
 182                         interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
 183                         ti,no-idle;
 184                         sram = <&pm_sram_code
 185                                 &pm_sram_data>;
 186                 };
 187
 188                 edma: edma@49000000 {
 189                         compatible = "ti,edma3-tpcc";
 190                         ti,hwmods = "tpcc";
 191                         reg =   <0x49000000 0x10000>;
 192                         reg-names = "edma3_cc";
 193                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 194                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 195                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 196                         interrupt-names = "edma3_ccint", "edma3_mperr",
 197                                           "edma3_ccerrint";
 198                         dma-requests = <64>;
 199                         #dma-cells = <2>;
 200
 201                         ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
 202                                    <&edma_tptc2 0>;
 203
 204                         ti,edma-memcpy-channels = <58 59>;
 205                 };
 206
 207                 edma_tptc0: tptc@49800000 {
 208                         compatible = "ti,edma3-tptc";
 209                         ti,hwmods = "tptc0";
 210                         reg =   <0x49800000 0x100000>;
 211                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 212                         interrupt-names = "edma3_tcerrint";
 213                 };
 214
 215                 edma_tptc1: tptc@49900000 {
 216                         compatible = "ti,edma3-tptc";
 217                         ti,hwmods = "tptc1";
 218                         reg =   <0x49900000 0x100000>;
 219                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 220                         interrupt-names = "edma3_tcerrint";
 221                 };
 222
 223                 edma_tptc2: tptc@49a00000 {
 224                         compatible = "ti,edma3-tptc";
 225                         ti,hwmods = "tptc2";
 226                         reg =   <0x49a00000 0x100000>;
 227                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 228                         interrupt-names = "edma3_tcerrint";
 229                 };
 230
 231                 mmc3: mmc@47810000 {
 232                         compatible = "ti,omap4-hsmmc";
 233                         reg = <0x47810000 0x1000>;
 234                         ti,hwmods = "mmc3";
 235                         ti,needs-special-reset;
 236                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 237                         status = "disabled";
 238                 };
 239
 240                 sham: sham@53100000 {
 241                         compatible = "ti,omap5-sham";
 242                         ti,hwmods = "sham";
 243                         reg = <0x53100000 0x300>;
 244                         dmas = <&edma 36 0>;
 245                         dma-names = "rx";
 246                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 247                 };
 248
 249                 aes: aes@53501000 {
 250                         compatible = "ti,omap4-aes";
 251                         ti,hwmods = "aes";
 252                         reg = <0x53501000 0xa0>;
 253                         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 254                         dmas = <&edma 6 0>,
 255                                 <&edma 5 0>;
 256                         dma-names = "tx", "rx";
 257                 };
 258
 259                 des: des@53701000 {
 260                         compatible = "ti,omap4-des";
 261                         ti,hwmods = "des";
 262                         reg = <0x53701000 0xa0>;
 263                         interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 264                         dmas = <&edma 34 0>,
 265                                 <&edma 33 0>;
 266                         dma-names = "tx", "rx";
 267                 };
 268
 269                 gpmc: gpmc@50000000 {
 270                         compatible = "ti,am3352-gpmc";
 271                         ti,hwmods = "gpmc";
 272                         dmas = <&edma 52 0>;
 273                         dma-names = "rxtx";
 274                         clocks = <&l3s_gclk>;
 275                         clock-names = "fck";
 276                         reg = <0x50000000 0x2000>;
 277                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 278                         gpmc,num-cs = <7>;
 279                         gpmc,num-waitpins = <2>;
 280                         #address-cells = <2>;
 281                         #size-cells = <1>;
 282                         interrupt-controller;
 283                         #interrupt-cells = <2>;
 284                         gpio-controller;
 285                         #gpio-cells = <2>;
 286                         status = "disabled";
 287                 };
 288
 289                 qspi: spi@47900000 {
 290                         compatible = "ti,am4372-qspi";
 291                         reg = <0x47900000 0x100>,
 292                               <0x30000000 0x4000000>;
 293                         reg-names = "qspi_base", "qspi_mmap";
 294                         #address-cells = <1>;
 295                         #size-cells = <0>;
 296                         ti,hwmods = "qspi";
 297                         interrupts = <0 138 0x4>;
 298                         num-cs = <4>;
 299                         status = "disabled";
 300                 };
 301
 302                 dss: dss@4832a000 {
 303                         compatible = "ti,omap3-dss";
 304                         reg = <0x4832a000 0x200>;
 305                         status = "disabled";
 306                         ti,hwmods = "dss_core";
 307                         clocks = <&disp_clk>;
 308                         clock-names = "fck";
 309                         #address-cells = <1>;
 310                         #size-cells = <1>;
 311                         ranges;
 312
 313                         dispc: dispc@4832a400 {
 314                                 compatible = "ti,omap3-dispc";
 315                                 reg = <0x4832a400 0x400>;
 316                                 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 317                                 ti,hwmods = "dss_dispc";
 318                                 clocks = <&disp_clk>;
 319                                 clock-names = "fck";
 320                         };
 321
 322                         rfbi: rfbi@4832a800 {
 323                                 compatible = "ti,omap3-rfbi";
 324                                 reg = <0x4832a800 0x100>;
 325                                 ti,hwmods = "dss_rfbi";
 326                                 clocks = <&disp_clk>;
 327                                 clock-names = "fck";
 328                                 status = "disabled";
 329                         };
 330                 };
 331
 332                 ocmcram: ocmcram@40300000 {
 333                         compatible = "mmio-sram";
 334                         reg = <0x40300000 0x40000>; /* 256k */
 335                         ranges = <0x0 0x40300000 0x40000>;
 336                         #address-cells = <1>;
 337                         #size-cells = <1>;
 338
 339                         pm_sram_code: pm-sram-code@0 {
 340                                 compatible = "ti,sram";
 341                                 reg = <0x0 0x1000>;
 342                                 protect-exec;
 343                         };
 344
 345                         pm_sram_data: pm-sram-data@1000 {
 346                                 compatible = "ti,sram";
 347                                 reg = <0x1000 0x1000>;
 348                                 pool;
 349                         };
 350                 };
 351         };
 352 };
 353
 354 #include "am437x-l4.dtsi"
 355 #include "am43xx-clocks.dtsi"