| blob | 79c4956d390215dc1a9f9af2e9df820d79e96baf |
1 /*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
12 #include <dt-bindings/dma/at91.h>
13 #include <dt-bindings/pinctrl/at91.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/at91.h>
18 / {
19 #address-cells = <1>;
20 #size-cells = <1>;
21 model = "Atmel AT91SAM9x5 family SoC";
22 compatible = "atmel,at91sam9x5";
23 interrupt-parent = <&aic>;
25 aliases {
26 serial0 = &dbgu;
27 serial1 = &usart0;
28 serial2 = &usart1;
29 serial3 = &usart2;
30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 gpio3 = &pioD;
34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
36 i2c0 = &i2c0;
37 i2c1 = &i2c1;
38 i2c2 = &i2c2;
39 ssc0 = &ssc0;
40 pwm0 = &pwm0;
41 };
42 cpus {
43 #address-cells = <0>;
44 #size-cells = <0>;
46 cpu {
47 compatible = "arm,arm926ej-s";
48 device_type = "cpu";
49 };
50 };
52 memory {
53 device_type = "memory";
54 reg = <0x20000000 0x10000000>;
55 };
57 clocks {
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <0>;
62 };
64 main_xtal: main_xtal {
65 compatible = "fixed-clock";
66 #clock-cells = <0>;
67 clock-frequency = <0>;
68 };
70 adc_op_clk: adc_op_clk{
71 compatible = "fixed-clock";
72 #clock-cells = <0>;
73 clock-frequency = <1000000>;
74 };
75 };
77 sram: sram@300000 {
78 compatible = "mmio-sram";
79 reg = <0x00300000 0x8000>;
80 };
82 ahb {
83 compatible = "simple-bus";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 ranges;
88 apb {
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
92 ranges;
94 aic: interrupt-controller@fffff000 {
95 #interrupt-cells = <3>;
96 compatible = "atmel,at91rm9200-aic";
97 interrupt-controller;
98 reg = <0xfffff000 0x200>;
99 atmel,external-irqs = <31>;
100 };
102 matrix: matrix@ffffde00 {
103 compatible = "atmel,at91sam9x5-matrix", "syscon";
104 reg = <0xffffde00 0x100>;
105 };
107 pmecc: ecc-engine@ffffe000 {
108 compatible = "atmel,at91sam9g45-pmecc";
109 reg = <0xffffe000 0x600>,
110 <0xffffe600 0x200>;
111 };
113 ramc0: ramc@ffffe800 {
114 compatible = "atmel,at91sam9g45-ddramc";
115 reg = <0xffffe800 0x200>;
116 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
117 clock-names = "ddrck";
118 };
120 smc: smc@ffffea00 {
121 compatible = "atmel,at91sam9260-smc", "syscon";
122 reg = <0xffffea00 0x200>;
123 };
125 pmc: pmc@fffffc00 {
126 compatible = "atmel,at91sam9x5-pmc", "syscon";
127 reg = <0xfffffc00 0x200>;
128 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
129 #clock-cells = <2>;
130 clocks = <&clk32k>, <&main_xtal>;
131 clock-names = "slow_clk", "main_xtal";
132 };
134 reset_controller: rstc@fffffe00 {
135 compatible = "atmel,at91sam9g45-rstc";
136 reg = <0xfffffe00 0x10>;
137 clocks = <&clk32k>;
138 };
140 shutdown_controller: shdwc@fffffe10 {
141 compatible = "atmel,at91sam9x5-shdwc";
142 reg = <0xfffffe10 0x10>;
143 clocks = <&clk32k>;
144 };
146 pit: timer@fffffe30 {
147 compatible = "atmel,at91sam9260-pit";
148 reg = <0xfffffe30 0xf>;
149 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
150 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
151 };
153 sckc@fffffe50 {
154 compatible = "atmel,at91sam9x5-sckc";
155 reg = <0xfffffe50 0x4>;
157 slow_osc: slow_osc {
158 compatible = "atmel,at91sam9x5-clk-slow-osc";
159 #clock-cells = <0>;
160 clocks = <&slow_xtal>;
161 };
163 slow_rc_osc: slow_rc_osc {
164 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
165 #clock-cells = <0>;
166 clock-frequency = <32768>;
167 clock-accuracy = <50000000>;
168 };
170 clk32k: slck {
171 compatible = "atmel,at91sam9x5-clk-slow";
172 #clock-cells = <0>;
173 clocks = <&slow_rc_osc>, <&slow_osc>;
174 };
175 };
177 tcb0: timer@f8008000 {
178 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
179 #address-cells = <1>;
180 #size-cells = <0>;
181 reg = <0xf8008000 0x100>;
182 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
183 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
184 clock-names = "t0_clk", "slow_clk";
185 };
187 tcb1: timer@f800c000 {
188 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
189 #address-cells = <1>;
190 #size-cells = <0>;
191 reg = <0xf800c000 0x100>;
192 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
193 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
194 clock-names = "t0_clk", "slow_clk";
195 };
197 dma0: dma-controller@ffffec00 {
198 compatible = "atmel,at91sam9g45-dma";
199 reg = <0xffffec00 0x200>;
200 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
201 #dma-cells = <2>;
202 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
203 clock-names = "dma_clk";
204 };
206 dma1: dma-controller@ffffee00 {
207 compatible = "atmel,at91sam9g45-dma";
208 reg = <0xffffee00 0x200>;
209 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
210 #dma-cells = <2>;
211 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
212 clock-names = "dma_clk";
213 };
215 pinctrl: pinctrl@fffff400 {
216 #address-cells = <1>;
217 #size-cells = <1>;
218 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
219 ranges = <0xfffff400 0xfffff400 0x800>;
221 /* shared pinctrl settings */
222 dbgu {
223 pinctrl_dbgu: dbgu-0 {
224 atmel,pins =
225 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
226 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
227 };
228 };
230 ebi {
231 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
232 atmel,pins =
233 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
234 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
235 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
236 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
237 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
238 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
239 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
240 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
241 };
243 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
244 atmel,pins =
245 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
246 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
247 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
248 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
249 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
250 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
251 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
252 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
253 };
255 pinctrl_ebi_addr_nand: ebi-addr-0 {
256 atmel,pins =
257 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
258 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
259 };
260 };
262 usart0 {
263 pinctrl_usart0: usart0-0 {
264 atmel,pins =
265 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
266 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
267 };
269 pinctrl_usart0_rts: usart0_rts-0 {
270 atmel,pins =
271 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
272 };
274 pinctrl_usart0_cts: usart0_cts-0 {
275 atmel,pins =
276 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
277 };
279 pinctrl_usart0_sck: usart0_sck-0 {
280 atmel,pins =
281 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
282 };
283 };
285 usart1 {
286 pinctrl_usart1: usart1-0 {
287 atmel,pins =
288 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
289 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
290 };
292 pinctrl_usart1_rts: usart1_rts-0 {
293 atmel,pins =
294 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
295 };
297 pinctrl_usart1_cts: usart1_cts-0 {
298 atmel,pins =
299 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
300 };
302 pinctrl_usart1_sck: usart1_sck-0 {
303 atmel,pins =
304 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
305 };
306 };
308 usart2 {
309 pinctrl_usart2: usart2-0 {
310 atmel,pins =
311 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
312 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
313 };
315 pinctrl_usart2_rts: usart2_rts-0 {
316 atmel,pins =
317 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
318 };
320 pinctrl_usart2_cts: usart2_cts-0 {
321 atmel,pins =
322 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
323 };
325 pinctrl_usart2_sck: usart2_sck-0 {
326 atmel,pins =
327 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
328 };
329 };
331 uart0 {
332 pinctrl_uart0: uart0-0 {
333 atmel,pins =
334 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
335 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
336 };
337 };
339 uart1 {
340 pinctrl_uart1: uart1-0 {
341 atmel,pins =
342 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
343 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
344 };
345 };
347 nand {
348 pinctrl_nand_oe_we: nand-oe-we-0 {
349 atmel,pins =
350 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
351 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
352 };
354 pinctrl_nand_rb: nand-rb-0 {
355 atmel,pins =
356 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
357 };
359 pinctrl_nand_cs: nand-cs-0 {
360 atmel,pins =
361 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
362 };
363 };
365 mmc0 {
366 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
367 atmel,pins =
368 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
369 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
370 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
371 };
373 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
374 atmel,pins =
375 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
376 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
377 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
378 };
379 };
381 mmc1 {
382 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
383 atmel,pins =
384 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
385 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
386 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
387 };
389 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
390 atmel,pins =
391 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
392 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
393 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
394 };
395 };
397 ssc0 {
398 pinctrl_ssc0_tx: ssc0_tx-0 {
399 atmel,pins =
400 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
401 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
402 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
403 };
405 pinctrl_ssc0_rx: ssc0_rx-0 {
406 atmel,pins =
407 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
408 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
409 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
410 };
411 };
413 spi0 {
414 pinctrl_spi0: spi0-0 {
415 atmel,pins =
416 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
417 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
418 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
419 };
420 };
422 spi1 {
423 pinctrl_spi1: spi1-0 {
424 atmel,pins =
425 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
426 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
427 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
428 };
429 };
431 i2c0 {
432 pinctrl_i2c0: i2c0-0 {
433 atmel,pins =
434 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
435 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
436 };
437 };
439 i2c1 {
440 pinctrl_i2c1: i2c1-0 {
441 atmel,pins =
442 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
443 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
444 };
445 };
447 i2c2 {
448 pinctrl_i2c2: i2c2-0 {
449 atmel,pins =
450 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
451 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
452 };
453 };
455 i2c_gpio0 {
456 pinctrl_i2c_gpio0: i2c_gpio0-0 {
457 atmel,pins =
458 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
459 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
460 };
461 };
463 i2c_gpio1 {
464 pinctrl_i2c_gpio1: i2c_gpio1-0 {
465 atmel,pins =
466 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
467 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
468 };
469 };
471 i2c_gpio2 {
472 pinctrl_i2c_gpio2: i2c_gpio2-0 {
473 atmel,pins =
474 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
475 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
476 };
477 };
479 pwm0 {
480 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
481 atmel,pins =
482 <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
483 };
484 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
485 atmel,pins =
486 <AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
487 };
488 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
489 atmel,pins =
490 <AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
491 };
493 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
494 atmel,pins =
495 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 };
497 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
498 atmel,pins =
499 <AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
500 };
501 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
502 atmel,pins =
503 <AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
504 };
506 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
507 atmel,pins =
508 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
509 };
510 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
511 atmel,pins =
512 <AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
513 };
515 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
516 atmel,pins =
517 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
518 };
519 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
520 atmel,pins =
521 <AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
522 };
523 };
525 tcb0 {
526 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
527 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
528 };
530 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
531 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
532 };
534 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
535 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
536 };
538 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
539 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
540 };
542 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
543 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
544 };
546 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
547 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
548 };
550 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
551 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
552 };
554 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
555 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
556 };
558 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
559 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
560 };
561 };
563 tcb1 {
564 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
565 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
566 };
568 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
569 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
570 };
572 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
573 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
574 };
576 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
577 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
578 };
580 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
581 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
582 };
584 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
585 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
586 };
588 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
589 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
590 };
592 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
593 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
594 };
596 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
597 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
598 };
599 };
601 pioA: gpio@fffff400 {
602 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
603 reg = <0xfffff400 0x200>;
604 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
605 #gpio-cells = <2>;
606 gpio-controller;
607 interrupt-controller;
608 #interrupt-cells = <2>;
609 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
610 };
612 pioB: gpio@fffff600 {
613 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
614 reg = <0xfffff600 0x200>;
615 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
616 #gpio-cells = <2>;
617 gpio-controller;
618 #gpio-lines = <19>;
619 interrupt-controller;
620 #interrupt-cells = <2>;
621 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
622 };
624 pioC: gpio@fffff800 {
625 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
626 reg = <0xfffff800 0x200>;
627 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
628 #gpio-cells = <2>;
629 gpio-controller;
630 interrupt-controller;
631 #interrupt-cells = <2>;
632 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
633 };
635 pioD: gpio@fffffa00 {
636 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
637 reg = <0xfffffa00 0x200>;
638 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
639 #gpio-cells = <2>;
640 gpio-controller;
641 #gpio-lines = <22>;
642 interrupt-controller;
643 #interrupt-cells = <2>;
644 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
645 };
646 };
648 ssc0: ssc@f0010000 {
649 compatible = "atmel,at91sam9g45-ssc";
650 reg = <0xf0010000 0x4000>;
651 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
652 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
653 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
654 dma-names = "tx", "rx";
655 pinctrl-names = "default";
656 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
657 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
658 clock-names = "pclk";
659 status = "disabled";
660 };
662 mmc0: mmc@f0008000 {
663 compatible = "atmel,hsmci";
664 reg = <0xf0008000 0x600>;
665 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
666 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
667 dma-names = "rxtx";
668 pinctrl-names = "default";
669 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
670 clock-names = "mci_clk";
671 #address-cells = <1>;
672 #size-cells = <0>;
673 status = "disabled";
674 };
676 mmc1: mmc@f000c000 {
677 compatible = "atmel,hsmci";
678 reg = <0xf000c000 0x600>;
679 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
680 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
681 dma-names = "rxtx";
682 pinctrl-names = "default";
683 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
684 clock-names = "mci_clk";
685 #address-cells = <1>;
686 #size-cells = <0>;
687 status = "disabled";
688 };
690 dbgu: serial@fffff200 {
691 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
692 reg = <0xfffff200 0x200>;
693 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
694 pinctrl-names = "default";
695 pinctrl-0 = <&pinctrl_dbgu>;
696 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
697 <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
698 dma-names = "tx", "rx";
699 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
700 clock-names = "usart";
701 status = "disabled";
702 };
704 usart0: serial@f801c000 {
705 compatible = "atmel,at91sam9260-usart";
706 reg = <0xf801c000 0x200>;
707 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
708 pinctrl-names = "default";
709 pinctrl-0 = <&pinctrl_usart0>;
710 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
711 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
712 dma-names = "tx", "rx";
713 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
714 clock-names = "usart";
715 status = "disabled";
716 };
718 usart1: serial@f8020000 {
719 compatible = "atmel,at91sam9260-usart";
720 reg = <0xf8020000 0x200>;
721 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
722 pinctrl-names = "default";
723 pinctrl-0 = <&pinctrl_usart1>;
724 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
725 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
726 dma-names = "tx", "rx";
727 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
728 clock-names = "usart";
729 status = "disabled";
730 };
732 usart2: serial@f8024000 {
733 compatible = "atmel,at91sam9260-usart";
734 reg = <0xf8024000 0x200>;
735 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
736 pinctrl-names = "default";
737 pinctrl-0 = <&pinctrl_usart2>;
738 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
739 <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
740 dma-names = "tx", "rx";
741 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
742 clock-names = "usart";
743 status = "disabled";
744 };
746 i2c0: i2c@f8010000 {
747 compatible = "atmel,at91sam9x5-i2c";
748 reg = <0xf8010000 0x100>;
749 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
750 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
751 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
752 dma-names = "tx", "rx";
753 #address-cells = <1>;
754 #size-cells = <0>;
755 pinctrl-names = "default";
756 pinctrl-0 = <&pinctrl_i2c0>;
757 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
758 status = "disabled";
759 };
761 i2c1: i2c@f8014000 {
762 compatible = "atmel,at91sam9x5-i2c";
763 reg = <0xf8014000 0x100>;
764 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
765 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
766 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
767 dma-names = "tx", "rx";
768 #address-cells = <1>;
769 #size-cells = <0>;
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_i2c1>;
772 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
773 status = "disabled";
774 };
776 i2c2: i2c@f8018000 {
777 compatible = "atmel,at91sam9x5-i2c";
778 reg = <0xf8018000 0x100>;
779 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
780 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
781 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
782 dma-names = "tx", "rx";
783 #address-cells = <1>;
784 #size-cells = <0>;
785 pinctrl-names = "default";
786 pinctrl-0 = <&pinctrl_i2c2>;
787 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
788 status = "disabled";
789 };
791 uart0: serial@f8040000 {
792 compatible = "atmel,at91sam9260-usart";
793 reg = <0xf8040000 0x200>;
794 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
795 pinctrl-names = "default";
796 pinctrl-0 = <&pinctrl_uart0>;
797 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
798 clock-names = "usart";
799 status = "disabled";
800 };
802 uart1: serial@f8044000 {
803 compatible = "atmel,at91sam9260-usart";
804 reg = <0xf8044000 0x200>;
805 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
806 pinctrl-names = "default";
807 pinctrl-0 = <&pinctrl_uart1>;
808 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
809 clock-names = "usart";
810 status = "disabled";
811 };
813 adc0: adc@f804c000 {
814 #address-cells = <1>;
815 #size-cells = <0>;
816 compatible = "atmel,at91sam9x5-adc";
817 reg = <0xf804c000 0x100>;
818 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
819 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>,
820 <&adc_op_clk>;
821 clock-names = "adc_clk", "adc_op_clk";
822 atmel,adc-use-external-triggers;
823 atmel,adc-channels-used = <0xffff>;
824 atmel,adc-vref = <3300>;
825 atmel,adc-startup-time = <40>;
826 atmel,adc-sample-hold-time = <11>;
827 atmel,adc-res = <8 10>;
828 atmel,adc-res-names = "lowres", "highres";
829 atmel,adc-use-res = "highres";
831 trigger0 {
832 trigger-name = "external-rising";
833 trigger-value = <0x1>;
834 trigger-external;
835 };
837 trigger1 {
838 trigger-name = "external-falling";
839 trigger-value = <0x2>;
840 trigger-external;
841 };
843 trigger2 {
844 trigger-name = "external-any";
845 trigger-value = <0x3>;
846 trigger-external;
847 };
849 trigger3 {
850 trigger-name = "continuous";
851 trigger-value = <0x6>;
852 };
853 };
855 spi0: spi@f0000000 {
856 #address-cells = <1>;
857 #size-cells = <0>;
858 compatible = "atmel,at91rm9200-spi";
859 reg = <0xf0000000 0x100>;
860 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
861 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
862 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
863 dma-names = "tx", "rx";
864 pinctrl-names = "default";
865 pinctrl-0 = <&pinctrl_spi0>;
866 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
867 clock-names = "spi_clk";
868 status = "disabled";
869 };
871 spi1: spi@f0004000 {
872 #address-cells = <1>;
873 #size-cells = <0>;
874 compatible = "atmel,at91rm9200-spi";
875 reg = <0xf0004000 0x100>;
876 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
877 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
878 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
879 dma-names = "tx", "rx";
880 pinctrl-names = "default";
881 pinctrl-0 = <&pinctrl_spi1>;
882 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
883 clock-names = "spi_clk";
884 status = "disabled";
885 };
887 usb2: gadget@f803c000 {
888 #address-cells = <1>;
889 #size-cells = <0>;
890 compatible = "atmel,at91sam9g45-udc";
891 reg = <0x00500000 0x80000
892 0xf803c000 0x400>;
893 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
894 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 23>;
895 clock-names = "hclk", "pclk";
896 status = "disabled";
898 ep@0 {
899 reg = <0>;
900 atmel,fifo-size = <64>;
901 atmel,nb-banks = <1>;
902 };
904 ep@1 {
905 reg = <1>;
906 atmel,fifo-size = <1024>;
907 atmel,nb-banks = <2>;
908 atmel,can-dma;
909 atmel,can-isoc;
910 };
912 ep@2 {
913 reg = <2>;
914 atmel,fifo-size = <1024>;
915 atmel,nb-banks = <2>;
916 atmel,can-dma;
917 atmel,can-isoc;
918 };
920 ep@3 {
921 reg = <3>;
922 atmel,fifo-size = <1024>;
923 atmel,nb-banks = <3>;
924 atmel,can-dma;
925 };
927 ep@4 {
928 reg = <4>;
929 atmel,fifo-size = <1024>;
930 atmel,nb-banks = <3>;
931 atmel,can-dma;
932 };
934 ep@5 {
935 reg = <5>;
936 atmel,fifo-size = <1024>;
937 atmel,nb-banks = <3>;
938 atmel,can-dma;
939 atmel,can-isoc;
940 };
942 ep@6 {
943 reg = <6>;
944 atmel,fifo-size = <1024>;
945 atmel,nb-banks = <3>;
946 atmel,can-dma;
947 atmel,can-isoc;
948 };
949 };
951 watchdog: watchdog@fffffe40 {
952 compatible = "atmel,at91sam9260-wdt";
953 reg = <0xfffffe40 0x10>;
954 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
955 clocks = <&clk32k>;
956 atmel,watchdog-type = "hardware";
957 atmel,reset-type = "all";
958 atmel,dbg-halt;
959 status = "disabled";
960 };
962 rtc@fffffeb0 {
963 compatible = "atmel,at91sam9x5-rtc";
964 reg = <0xfffffeb0 0x40>;
965 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
966 clocks = <&clk32k>;
967 status = "disabled";
968 };
970 pwm0: pwm@f8034000 {
971 compatible = "atmel,at91sam9rl-pwm";
972 reg = <0xf8034000 0x300>;
973 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
974 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
975 #pwm-cells = <3>;
976 status = "disabled";
977 };
978 };
980 usb0: ohci@600000 {
981 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
982 reg = <0x00600000 0x100000>;
983 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
984 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
985 clock-names = "ohci_clk", "hclk", "uhpck";
986 status = "disabled";
987 };
989 usb1: ehci@700000 {
990 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
991 reg = <0x00700000 0x100000>;
992 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
993 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
994 clock-names = "usb_clk", "ehci_clk";
995 status = "disabled";
996 };
998 ebi: ebi@10000000 {
999 compatible = "atmel,at91sam9x5-ebi";
1000 #address-cells = <2>;
1001 #size-cells = <1>;
1002 atmel,smc = <&smc>;
1003 atmel,matrix = <&matrix>;
1004 reg = <0x10000000 0x60000000>;
1005 ranges = <0x0 0x0 0x10000000 0x10000000
1006 0x1 0x0 0x20000000 0x10000000
1007 0x2 0x0 0x30000000 0x10000000
1008 0x3 0x0 0x40000000 0x10000000
1009 0x4 0x0 0x50000000 0x10000000
1010 0x5 0x0 0x60000000 0x10000000>;
1011 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1012 status = "disabled";
1014 nand_controller: nand-controller {
1015 compatible = "atmel,at91sam9g45-nand-controller";
1016 ecc-engine = <&pmecc>;
1017 #address-cells = <2>;
1018 #size-cells = <1>;
1019 ranges;
1020 status = "disabled";
1021 };
1022 };
1023 };
1025 i2c-gpio-0 {
1026 compatible = "i2c-gpio";
1027 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1028 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1029 >;
1030 i2c-gpio,sda-open-drain;
1031 i2c-gpio,scl-open-drain;
1032 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1033 #address-cells = <1>;
1034 #size-cells = <0>;
1035 pinctrl-names = "default";
1036 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1037 status = "disabled";
1038 };
1040 i2c-gpio-1 {
1041 compatible = "i2c-gpio";
1042 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1043 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1044 >;
1045 i2c-gpio,sda-open-drain;
1046 i2c-gpio,scl-open-drain;
1047 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1048 #address-cells = <1>;
1049 #size-cells = <0>;
1050 pinctrl-names = "default";
1051 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1052 status = "disabled";
1053 };
1055 i2c-gpio-2 {
1056 compatible = "i2c-gpio";
1057 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1058 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1059 >;
1060 i2c-gpio,sda-open-drain;
1061 i2c-gpio,scl-open-drain;
1062 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1063 #address-cells = <1>;
1064 #size-cells = <0>;
1065 pinctrl-names = "default";
1066 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1067 status = "disabled";
1068 };
1069 };