arch/arm/boot/dts/imx6q-bx50v3.dtsi

   1 /*
   2  * Copyright 2015 Timesys Corporation.
   3  * Copyright 2015 General Electric Company
   4  *
   5  * This file is dual-licensed: you can use it either under the terms
   6  * of the GPL or the X11 license, at your option. Note that this dual
   7  * licensing only applies to this file, and not this project as a
   8  * whole.
   9  *
  10  *  a) This file is free software; you can redistribute it and/or
  11  *     modify it under the terms of the GNU General Public License
  12  *     version 2 as published by the Free Software Foundation.
  13  *
  14  *     This file is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 #include "imx6q-ba16.dtsi"
  44
  45 / {
  46         mclk: clock-mclk {
  47                 compatible = "fixed-clock";
  48                 #clock-cells = <0>;
  49                 clock-frequency = <22000000>;
  50         };
  51
  52         gpio-poweroff {
  53                 compatible = "gpio-poweroff";
  54                 gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
  55                 status = "okay";
  56         };
  57
  58         reg_wl18xx_vmmc: regulator-wl18xx {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "vwl1807";
  61                 regulator-min-microvolt = <3300000>;
  62                 regulator-max-microvolt = <3300000>;
  63                 gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
  64                 startup-delay-us = <70000>;
  65                 enable-active-high;
  66         };
  67
  68         reg_wlan: regulator-wlan {
  69                 compatible = "regulator-fixed";
  70                 regulator-name = "3P3V_wlan";
  71                 regulator-min-microvolt = <3300000>;
  72                 regulator-max-microvolt = <3300000>;
  73                 regulator-always-on;
  74                 regulator-boot-on;
  75                 gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
  76         };
  77
  78         sound {
  79                 compatible = "fsl,imx6q-ba16-sgtl5000",
  80                              "fsl,imx-audio-sgtl5000";
  81                 model = "imx6q-ba16-sgtl5000";
  82                 ssi-controller = <&ssi1>;
  83                 audio-codec = <&sgtl5000>;
  84                 audio-routing =
  85                         "MIC_IN", "Mic Jack",
  86                         "Mic Jack", "Mic Bias",
  87                         "LINE_IN", "Line In Jack",
  88                         "Headphone Jack", "HP_OUT";
  89                 mux-int-port = <1>;
  90                 mux-ext-port = <4>;
  91         };
  92
  93         aliases {
  94                 mdio-gpio0 = &mdio0;
  95         };
  96
  97         mdio0: mdio-gpio {
  98                 compatible = "virtual,mdio-gpio";
  99                 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
 100                         <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
 101
 102                 #address-cells = <1>;
 103                 #size-cells = <0>;
 104
 105                 switch@0 {
 106                         compatible = "marvell,mv88e6085"; /* 88e6240*/
 107                         reg = <0>;
 108
 109                         switch_ports: ports {
 110                                 #address-cells = <1>;
 111                                 #size-cells = <0>;
 112                         };
 113
 114                         mdio {
 115                                 #address-cells = <1>;
 116                                 #size-cells = <0>;
 117
 118                                 switchphy0: switchphy@0 {
 119                                         reg = <0>;
 120                                 };
 121
 122                                 switchphy1: switchphy@1 {
 123                                         reg = <1>;
 124                                 };
 125
 126                                 switchphy2: switchphy@2 {
 127                                         reg = <2>;
 128                                 };
 129
 130                                 switchphy3: switchphy@3 {
 131                                         reg = <3>;
 132                                 };
 133
 134                                 switchphy4: switchphy@4 {
 135                                         reg = <4>;
 136                                 };
 137                         };
 138                 };
 139         };
 140 };
 141
 142 &ecspi5 {
 143         cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 144         pinctrl-names = "default";
 145         pinctrl-0 = <&pinctrl_ecspi5>;
 146         status = "okay";
 147
 148         m25_eeprom: m25p80@0 {
 149                 compatible = "atmel,at25";
 150                 spi-max-frequency = <10000000>;
 151                 size = <0x8000>;
 152                 pagesize = <64>;
 153                 reg = <0>;
 154                 address-width = <16>;
 155         };
 156 };
 157
 158 &i2c1 {
 159         pinctrl-names = "default", "gpio";
 160         pinctrl-1 = <&pinctrl_i2c1_gpio>;
 161         sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
 162         scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
 163
 164         pca9547: mux@70 {
 165                 compatible = "nxp,pca9547";
 166                 reg = <0x70>;
 167                 #address-cells = <1>;
 168                 #size-cells = <0>;
 169
 170                 mux1_i2c1: i2c@0 {
 171                         #address-cells = <1>;
 172                         #size-cells = <0>;
 173                         reg = <0x0>;
 174
 175                         ads7830: ads7830@48 {
 176                                 compatible = "ti,ads7830";
 177                                 reg = <0x48>;
 178                         };
 179
 180                         mma8453: mma8453@1c {
 181                                 compatible = "fsl,mma8453";
 182                                 reg = <0x1c>;
 183                         };
 184                 };
 185
 186                 mux1_i2c2: i2c@1 {
 187                         #address-cells = <1>;
 188                         #size-cells = <0>;
 189                         reg = <0x1>;
 190
 191                         eeprom: eeprom@50 {
 192                                 compatible = "atmel,24c08";
 193                                 reg = <0x50>;
 194                         };
 195
 196                         mpl3115: mpl3115@60 {
 197                                 compatible = "fsl,mpl3115";
 198                                 reg = <0x60>;
 199                         };
 200                 };
 201
 202                 mux1_i2c3: i2c@2 {
 203                         #address-cells = <1>;
 204                         #size-cells = <0>;
 205                         reg = <0x2>;
 206                 };
 207
 208                 mux1_i2c4: i2c@3 {
 209                         #address-cells = <1>;
 210                         #size-cells = <0>;
 211                         reg = <0x3>;
 212
 213                         sgtl5000: codec@a {
 214                                 compatible = "fsl,sgtl5000";
 215                                 reg = <0x0a>;
 216                                 clocks = <&mclk>;
 217                                 VDDA-supply = <&reg_1p8v>;
 218                                 VDDIO-supply = <&reg_3p3v>;
 219                         };
 220                 };
 221
 222                 mux1_i2c5: i2c@4 {
 223                         #address-cells = <1>;
 224                         #size-cells = <0>;
 225                         reg = <0x4>;
 226
 227                         pca9539: pca9539@74 {
 228                                 compatible = "nxp,pca9539";
 229                                 reg = <0x74>;
 230                                 gpio-controller;
 231                                 #gpio-cells = <2>;
 232                                 interrupt-controller;
 233                                 interrupt-parent = <&gpio2>;
 234                                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
 235
 236                                 P12 {
 237                                         gpio-hog;
 238                                         gpios = <10 0>;
 239                                         output-low;
 240                                         line-name = "PCA9539-P12";
 241                                 };
 242
 243                                 P13 {
 244                                         gpio-hog;
 245                                         gpios = <11 0>;
 246                                         output-low;
 247                                         line-name = "PCA9539-P13";
 248                                 };
 249
 250                                 P14 {
 251                                         gpio-hog;
 252                                         gpios = <12 0>;
 253                                         output-low;
 254                                         line-name = "PCA9539-P14";
 255                                 };
 256
 257                                 P15 {
 258                                         gpio-hog;
 259                                         gpios = <13 0>;
 260                                         output-low;
 261                                         line-name = "PCA9539-P15";
 262                                 };
 263
 264                                 P16 {
 265                                         gpio-hog;
 266                                         gpios = <14 0>;
 267                                         output-low;
 268                                         line-name = "PCA9539-P16";
 269                                 };
 270
 271                                 P17 {
 272                                         gpio-hog;
 273                                         gpios = <15 0>;
 274                                         output-low;
 275                                         line-name = "PCA9539-P17";
 276                                 };
 277                         };
 278                 };
 279
 280                 mux1_i2c6: i2c@5 {
 281                         #address-cells = <1>;
 282                         #size-cells = <0>;
 283                         reg = <0x5>;
 284                 };
 285
 286                 mux1_i2c7: i2c@6 {
 287                         #address-cells = <1>;
 288                         #size-cells = <0>;
 289                         reg = <0x6>;
 290                 };
 291
 292                 mux1_i2c8: i2c@7 {
 293                         #address-cells = <1>;
 294                         #size-cells = <0>;
 295                         reg = <0x7>;
 296                 };
 297         };
 298 };
 299
 300 &i2c2 {
 301         pinctrl-names = "default", "gpio";
 302         pinctrl-1 = <&pinctrl_i2c2_gpio>;
 303         sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
 304         scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
 305 };
 306
 307 &i2c3 {
 308         pinctrl-names = "default", "gpio";
 309         pinctrl-1 = <&pinctrl_i2c3_gpio>;
 310         sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
 311         scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
 312 };
 313
 314 &iomuxc {
 315         pinctrl_i2c1_gpio: i2c1gpiogrp {
 316                 fsl,pins = <
 317                         MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26        0x1b0b0
 318                         MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27        0x1b0b0
 319                 >;
 320         };
 321
 322         pinctrl_i2c2_gpio: i2c2gpiogrp {
 323                 fsl,pins = <
 324                         MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
 325                         MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
 326                 >;
 327         };
 328
 329         pinctrl_i2c3_gpio: i2c3gpiogrp {
 330                 fsl,pins = <
 331                         MX6QDL_PAD_GPIO_3__GPIO1_IO03   0x1b0b0
 332                         MX6QDL_PAD_GPIO_6__GPIO1_IO06   0x1b0b0
 333                 >;
 334         };
 335 };
 336
 337 &pmu {
 338         secure-reg-access;
 339 };
 340
 341 &usdhc2 {
 342         status = "disabled";
 343 };
 344
 345 &usdhc4 {
 346         pinctrl-names = "default";
 347         pinctrl-0 = <&pinctrl_usdhc4>;
 348         bus-width = <4>;
 349         vmmc-supply = <&reg_wl18xx_vmmc>;
 350         no-1-8-v;
 351         non-removable;
 352         wakeup-source;
 353         keep-power-in-suspend;
 354         cap-power-off-card;
 355         max-frequency = <25000000>;
 356         #address-cells = <1>;
 357         #size-cells = <0>;
 358         status = "okay";
 359
 360         wlcore: wlcore@2 {
 361                 compatible = "ti,wl1837";
 362                 reg = <2>;
 363                 interrupt-parent = <&gpio2>;
 364                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
 365                 tcxo-clock-frequency = <26000000>;
 366         };
 367 };
 368
 369 &pcie {
 370         /* Synopsys, Inc. Device */
 371         pci_root: root@0,0 {
 372                 compatible = "pci16c3,abcd";
 373                 reg = <0x00000000 0 0 0 0>;
 374
 375                 #address-cells = <3>;
 376                 #size-cells = <2>;
 377                 #interrupt-cells = <1>;
 378         };
 379 };