arch/arm/boot/dts/mt7623a-rfb-nand.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2017-2018 MediaTek Inc.
   4  * Author: Sean Wang <sean.wang@mediatek.com>
   5  *
   6  */
   7
   8 /dts-v1/;
   9 #include <dt-bindings/input/input.h>
  10 #include "mt7623a.dtsi"
  11 #include "mt6323.dtsi"
  12
  13 / {
  14         model = "MediaTek MT7623A with NAND reference board";
  15         compatible = "mediatek,mt7623a-rfb-nand", "mediatek,mt7623";
  16
  17         aliases {
  18                 serial2 = &uart2;
  19         };
  20
  21         chosen {
  22                 stdout-path = "serial2:115200n8";
  23         };
  24
  25         cpus {
  26                 cpu@0 {
  27                         proc-supply = <&mt6323_vproc_reg>;
  28                 };
  29
  30                 cpu@1 {
  31                         proc-supply = <&mt6323_vproc_reg>;
  32                 };
  33
  34                 cpu@2 {
  35                         proc-supply = <&mt6323_vproc_reg>;
  36                 };
  37
  38                 cpu@3 {
  39                         proc-supply = <&mt6323_vproc_reg>;
  40                 };
  41         };
  42
  43         gpio-keys {
  44                 compatible = "gpio-keys";
  45                 pinctrl-names = "default";
  46                 pinctrl-0 = <&key_pins_a>;
  47
  48                 factory {
  49                         label = "factory";
  50                         linux,code = <BTN_0>;
  51                         gpios = <&pio 256 GPIO_ACTIVE_LOW>;
  52                 };
  53
  54                 wps {
  55                         label = "wps";
  56                         linux,code = <KEY_WPS_BUTTON>;
  57                         gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
  58                 };
  59         };
  60
  61         memory@80000000 {
  62                 device_type = "memory";
  63                 reg = <0 0x80000000 0 0x20000000>;
  64         };
  65
  66         reg_1p8v: regulator-1p8v {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "fixed-1.8V";
  69                 regulator-min-microvolt = <1800000>;
  70                 regulator-max-microvolt = <1800000>;
  71                 regulator-boot-on;
  72                 regulator-always-on;
  73         };
  74
  75         reg_3p3v: regulator-3p3v {
  76                 compatible = "regulator-fixed";
  77                 regulator-name = "fixed-3.3V";
  78                 regulator-min-microvolt = <3300000>;
  79                 regulator-max-microvolt = <3300000>;
  80                 regulator-boot-on;
  81                 regulator-always-on;
  82         };
  83
  84         reg_5v: regulator-5v {
  85                 compatible = "regulator-fixed";
  86                 regulator-name = "fixed-5V";
  87                 regulator-min-microvolt = <5000000>;
  88                 regulator-max-microvolt = <5000000>;
  89                 regulator-boot-on;
  90                 regulator-always-on;
  91         };
  92
  93         sound {
  94                 compatible = "mediatek,mt2701-wm8960-machine";
  95                 mediatek,platform = <&afe>;
  96                 audio-routing =
  97                         "Headphone", "HP_L",
  98                         "Headphone", "HP_R",
  99                         "LINPUT1", "AMIC",
 100                         "RINPUT1", "AMIC";
 101                 mediatek,audio-codec = <&wm8960>;
 102                 pinctrl-names = "default";
 103                 pinctrl-0 = <&i2s0_pins_a>;
 104         };
 105 };
 106
 107 &bch {
 108         status = "okay";
 109 };
 110
 111 &btif {
 112         status = "okay";
 113 };
 114
 115 &crypto {
 116         status = "okay";
 117 };
 118
 119 &eth {
 120         status = "okay";
 121
 122         gmac0: mac@0 {
 123                 compatible = "mediatek,eth-mac";
 124                 reg = <0>;
 125                 phy-mode = "trgmii";
 126
 127                 fixed-link {
 128                         speed = <1000>;
 129                         full-duplex;
 130                         pause;
 131                 };
 132         };
 133
 134         mdio-bus {
 135                 #address-cells = <1>;
 136                 #size-cells = <0>;
 137
 138                 switch@0 {
 139                         compatible = "mediatek,mt7530";
 140                         reg = <0>;
 141                         mediatek,mcm;
 142                         resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
 143                         reset-names = "mcm";
 144                         core-supply = <&mt6323_vpa_reg>;
 145                         io-supply = <&mt6323_vemc3v3_reg>;
 146
 147                         ports {
 148                                 #address-cells = <1>;
 149                                 #size-cells = <0>;
 150
 151                                 port@0 {
 152                                         reg = <0>;
 153                                         label = "lan0";
 154                                 };
 155
 156                                 port@1 {
 157                                         reg = <1>;
 158                                         label = "lan1";
 159                                 };
 160
 161                                 port@2 {
 162                                         reg = <2>;
 163                                         label = "lan2";
 164                                 };
 165
 166                                 port@3 {
 167                                         reg = <3>;
 168                                         label = "lan3";
 169                                 };
 170
 171                                 port@4 {
 172                                         reg = <4>;
 173                                         label = "wan";
 174                                 };
 175
 176                                 port@6 {
 177                                         reg = <6>;
 178                                         label = "cpu";
 179                                         ethernet = <&gmac0>;
 180                                         phy-mode = "trgmii";
 181
 182                                         fixed-link {
 183                                                 speed = <1000>;
 184                                                 full-duplex;
 185                                         };
 186                                 };
 187                         };
 188                 };
 189         };
 190 };
 191
 192 &i2c0 {
 193         pinctrl-names = "default";
 194         pinctrl-0 = <&i2c0_pins_a>;
 195         status = "okay";
 196 };
 197
 198 &i2c1 {
 199         pinctrl-names = "default";
 200         pinctrl-0 = <&i2c1_pins_b>;
 201         status = "okay";
 202
 203         wm8960: wm8960@1a {
 204                 compatible = "wlf,wm8960";
 205                 reg = <0x1a>;
 206         };
 207 };
 208
 209 &i2c2 {
 210         pinctrl-names = "default";
 211         pinctrl-0 = <&i2c2_pins_b>;
 212         status = "okay";
 213 };
 214
 215 &mmc1 {
 216         pinctrl-names = "default", "state_uhs";
 217         pinctrl-0 = <&mmc1_pins_default>;
 218         pinctrl-1 = <&mmc1_pins_uhs>;
 219         status = "okay";
 220         bus-width = <4>;
 221         max-frequency = <50000000>;
 222         cap-sd-highspeed;
 223         cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
 224         vmmc-supply = <&reg_3p3v>;
 225         vqmmc-supply = <&reg_3p3v>;
 226 };
 227
 228 &nandc {
 229         pinctrl-names = "default";
 230         pinctrl-0 = <&nand_pins_default>;
 231         status = "okay";
 232
 233         nand@0 {
 234                 reg = <0>;
 235                 spare_per_sector = <64>;
 236                 nand-ecc-mode = "hw";
 237                 nand-ecc-strength = <12>;
 238                 nand-ecc-step-size = <1024>;
 239
 240                 partitions {
 241                         compatible = "fixed-partitions";
 242                         #address-cells = <1>;
 243                         #size-cells = <1>;
 244
 245                         partition@0 {
 246                                 label = "preloader";
 247                                 reg = <0x0 0x40000>;
 248                         };
 249
 250                         partition@40000 {
 251                                 label = "uboot";
 252                                 reg = <0x40000 0x80000>;
 253                         };
 254
 255                         partition@c0000 {
 256                                 label = "uboot-env";
 257                                 reg = <0xC0000 0x40000>;
 258                         };
 259
 260                         partition@140000 {
 261                                 label = "bootimg";
 262                                 reg = <0x140000 0x2000000>;
 263                         };
 264
 265                         partition@2140000 {
 266                                 label = "recovery";
 267                                 reg = <0x2140000 0x2000000>;
 268                         };
 269
 270                         partition@4140000 {
 271                                 label = "rootfs";
 272                                 reg = <0x4140000 0x1000000>;
 273                         };
 274
 275                         partition@5140000 {
 276                                 label = "usrdata";
 277                                 reg = <0x5140000 0x1000000>;
 278                         };
 279                 };
 280         };
 281 };
 282
 283 &pcie {
 284         pinctrl-names = "default";
 285         pinctrl-0 = <&pcie_default>;
 286         status = "okay";
 287
 288         pcie@0,0 {
 289                 status = "okay";
 290         };
 291
 292         pcie@1,0 {
 293                 status = "okay";
 294         };
 295 };
 296
 297 &pcie0_phy {
 298         status = "okay";
 299 };
 300
 301 &pcie1_phy {
 302         status = "okay";
 303 };
 304
 305 &pwm {
 306         pinctrl-names = "default";
 307         pinctrl-0 = <&pwm_pins_a>;
 308         status = "okay";
 309 };
 310
 311 &spi0 {
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&spi0_pins_a>;
 314         status = "okay";
 315 };
 316
 317 &spi1 {
 318         pinctrl-names = "default";
 319         pinctrl-0 = <&spi1_pins_a>;
 320         status = "okay";
 321 };
 322
 323 &uart2 {
 324         pinctrl-names = "default";
 325         pinctrl-0 = <&uart2_pins_b>;
 326         status = "okay";
 327 };
 328
 329 &usb1 {
 330         vusb33-supply = <&reg_3p3v>;
 331         vbus-supply = <&reg_5v>;
 332         status = "okay";
 333 };
 334
 335 &u3phy1 {
 336         status = "okay";
 337 };