arch/arm/boot/dts/omap3-overo-base.dtsi

   1 /*
   2  * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /*
  10  * The Gumstix Overo must be combined with an expansion board.
  11  */
  12
  13 / {
  14
  15         memory@0 {
  16                 device_type = "memory";
  17                 reg = <0 0>;
  18         };
  19
  20         pwmleds {
  21                 compatible = "pwm-leds";
  22
  23                 overo {
  24                         label = "overo:blue:COM";
  25                         pwms = <&twl_pwmled 1 7812500>;
  26                         max-brightness = <127>;
  27                         linux,default-trigger = "mmc0";
  28                 };
  29         };
  30
  31         sound {
  32                 compatible = "ti,omap-twl4030";
  33                 ti,model = "overo";
  34
  35                 ti,mcbsp = <&mcbsp2>;
  36         };
  37
  38         /* HS USB Port 2 Power */
  39         hsusb2_power: hsusb2_power_reg {
  40                 compatible = "regulator-fixed";
  41                 regulator-name = "hsusb2_vbus";
  42                 regulator-min-microvolt = <5000000>;
  43                 regulator-max-microvolt = <5000000>;
  44                 gpio = <&gpio6 8 GPIO_ACTIVE_HIGH>;             /* gpio_168: vbus enable */
  45                 startup-delay-us = <70000>;
  46                 enable-active-high;
  47         };
  48
  49         /* HS USB Host PHY on PORT 2 */
  50         hsusb2_phy: hsusb2_phy {
  51                 compatible = "usb-nop-xceiv";
  52                 reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;      /* gpio_183 */
  53                 vcc-supply = <&hsusb2_power>;
  54                 #phy-cells = <0>;
  55         };
  56
  57         /* Regulator to trigger the nPoweron signal of the Wifi module */
  58         w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "regulator-w3cbw003c-npoweron";
  61                 regulator-min-microvolt = <3300000>;
  62                 regulator-max-microvolt = <3300000>;
  63                 gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;            /* gpio_54: nPoweron */
  64                 enable-active-high;
  65         };
  66
  67         /* Regulator to trigger the nReset signal of the Wifi module */
  68         w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset {
  69                 pinctrl-names = "default";
  70                 pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>;
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "regulator-w3cbw003c-wifi-nreset";
  73                 regulator-min-microvolt = <3300000>;
  74                 regulator-max-microvolt = <3300000>;
  75                 gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>;            /* gpio_16: WiFi nReset */
  76                 startup-delay-us = <10000>;
  77         };
  78 };
  79
  80 &omap3_pmx_core {
  81         pinctrl-names = "default";
  82         pinctrl-0 = <
  83                         &hsusb2_pins
  84         >;
  85
  86         uart2_pins: pinmux_uart2_pins {
  87                 pinctrl-single,pins = <
  88                         OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1)        /* mcbsp3_dx.uart2_cts */
  89                         OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1)       /* mcbsp3_dr.uart2_rts */
  90                         OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)       /* mcbsp3_clk.uart2_tx */
  91                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)        /* mcbsp3_fsx.uart2_rx */
  92                 >;
  93         };
  94
  95         i2c1_pins: pinmux_i2c1_pins {
  96                 pinctrl-single,pins = <
  97                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl.i2c1_scl */
  98                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda.i2c1_sda */
  99                 >;
 100         };
 101
 102         mmc1_pins: pinmux_mmc1_pins {
 103                 pinctrl-single,pins = <
 104                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_clk.sdmmc1_clk */
 105                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_cmd.sdmmc1_cmd */
 106                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0.sdmmc1_dat0 */
 107                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat1.sdmmc1_dat1 */
 108                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat2.sdmmc1_dat2 */
 109                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat3.sdmmc1_dat3 */
 110                 >;
 111         };
 112
 113         mmc2_pins: pinmux_mmc2_pins {
 114                 pinctrl-single,pins = <
 115                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_clk.sdmmc2_clk */
 116                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_cmd.sdmmc2_cmd */
 117                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0.sdmmc2_dat0 */
 118                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat1.sdmmc2_dat1 */
 119                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat2.sdmmc2_dat2 */
 120                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat3.sdmmc2_dat3 */
 121                 >;
 122         };
 123
 124         /* WiFi/BT combo */
 125         w3cbw003c_pins: pinmux_w3cbw003c_pins {
 126                 pinctrl-single,pins = <
 127                         OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4)               /* gpmc_ncs3.gpio_54 */
 128                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
 129                 >;
 130         };
 131
 132         hsusb2_pins: pinmux_hsusb2_pins {
 133                 pinctrl-single,pins = <
 134                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
 135                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
 136                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
 137                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
 138                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
 139                         OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
 140                         OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)               /* i2c2_scl.gpio_168 */
 141                         OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)               /* i2c2_sda.gpio_183 */
 142                 >;
 143         };
 144 };
 145
 146 &i2c1 {
 147         pinctrl-names = "default";
 148         pinctrl-0 = <&i2c1_pins>;
 149         clock-frequency = <2600000>;
 150
 151         twl: twl@48 {
 152                 reg = <0x48>;
 153                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 154                 interrupt-parent = <&intc>;
 155
 156                 twl_audio: audio {
 157                         compatible = "ti,twl4030-audio";
 158                         codec {
 159                         };
 160                 };
 161         };
 162 };
 163
 164 #include "twl4030.dtsi"
 165 #include "twl4030_omap3.dtsi"
 166
 167 /* i2c2 pins are used for gpio */
 168 &i2c2 {
 169         status = "disabled";
 170 };
 171
 172 /* on board microSD slot */
 173 &mmc1 {
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&mmc1_pins>;
 176         vmmc-supply = <&vmmc1>;
 177         bus-width = <4>;
 178 };
 179
 180 /* optional on board WiFi */
 181 &mmc2 {
 182         pinctrl-names = "default";
 183         pinctrl-0 = <&mmc2_pins>;
 184         vmmc-supply = <&w3cbw003c_npoweron>;
 185         vqmmc-supply = <&w3cbw003c_wifi_nreset>;
 186         bus-width = <4>;
 187         cap-sdio-irq;
 188         non-removable;
 189 };
 190
 191 &twl_gpio {
 192         ti,use-leds;
 193 };
 194
 195 &usb_otg_hs {
 196         interface-type = <0>;
 197         usb-phy = <&usb2_phy>;
 198         phys = <&usb2_phy>;
 199         phy-names = "usb2-phy";
 200         mode = <3>;
 201         power = <50>;
 202 };
 203
 204 &usbhshost {
 205         port2-mode = "ehci-phy";
 206 };
 207
 208 &usbhsehci {
 209         phys = <0 &hsusb2_phy>;
 210 };
 211
 212 &uart2 {
 213         pinctrl-names = "default";
 214         pinctrl-0 = <&uart2_pins>;
 215 };
 216
 217 &mcbsp2 {
 218         status = "okay";
 219 };
 220
 221 &gpmc {
 222         ranges = <0 0 0x30000000 0x1000000>,    /* CS0 */
 223                  <4 0 0x2b000000 0x1000000>,    /* CS4 */
 224                  <5 0 0x2c000000 0x1000000>;    /* CS5 */
 225
 226         nand@0,0 {
 227                 compatible = "ti,omap2-nand";
 228                 linux,mtd-name= "micron,mt29c4g96maz";
 229                 reg = <0 0 4>;  /* CS0, offset 0, IO size 4 */
 230                 interrupt-parent = <&gpmc>;
 231                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 232                              <1 IRQ_TYPE_NONE>; /* termcount */
 233                 nand-bus-width = <16>;
 234                 gpmc,device-width = <2>;
 235                 ti,nand-ecc-opt = "bch8";
 236
 237                 gpmc,sync-clk-ps = <0>;
 238                 gpmc,cs-on-ns = <0>;
 239                 gpmc,cs-rd-off-ns = <44>;
 240                 gpmc,cs-wr-off-ns = <44>;
 241                 gpmc,adv-on-ns = <6>;
 242                 gpmc,adv-rd-off-ns = <34>;
 243                 gpmc,adv-wr-off-ns = <44>;
 244                 gpmc,we-off-ns = <40>;
 245                 gpmc,oe-off-ns = <54>;
 246                 gpmc,access-ns = <64>;
 247                 gpmc,rd-cycle-ns = <82>;
 248                 gpmc,wr-cycle-ns = <82>;
 249                 gpmc,wr-access-ns = <40>;
 250                 gpmc,wr-data-mux-bus-ns = <0>;
 251
 252                 #address-cells = <1>;
 253                 #size-cells = <1>;
 254
 255                 partition@0 {
 256                         label = "SPL";
 257                         reg = <0 0x80000>; /* 512KiB */
 258                 };
 259                 partition@80000 {
 260                         label = "U-Boot";
 261                         reg = <0x80000 0x1C0000>; /* 1792KiB */
 262                 };
 263                 partition@1c0000 {
 264                         label = "Environment";
 265                         reg = <0x240000 0x40000>; /* 256KiB */
 266                 };
 267                 partition@280000 {
 268                         label = "Kernel";
 269                         reg = <0x280000 0x800000>; /* 8192KiB */
 270                 };
 271                 partition@780000 {
 272                         label = "Filesystem";
 273                         reg = <0xA80000 0>;
 274                         /* HACK: MTDPART_SIZ_FULL=0 so fill to end */
 275                 };
 276         };
 277 };