arch/arm/boot/dts/rk3288-veyron-brain.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Veyron Brain Rev 0 board device tree source
   4  *
   5  * Copyright 2014 Google, Inc
   6  */
   7
   8 /dts-v1/;
   9 #include "rk3288-veyron.dtsi"
  10
  11 / {
  12         model = "Google Brain";
  13         compatible = "google,veyron-brain-rev0", "google,veyron-brain",
  14                      "google,veyron", "rockchip,rk3288";
  15
  16         vcc33_sys: vcc33-sys {
  17                 vin-supply = <&vcc_5v>;
  18         };
  19
  20         vcc33_io: vcc33_io {
  21                 compatible = "regulator-fixed";
  22                 regulator-name = "vcc33_io";
  23                 regulator-always-on;
  24                 regulator-boot-on;
  25                 vin-supply = <&vcc33_sys>;
  26                 /* This is gated by vcc_18 too */
  27         };
  28
  29         /* This turns on vbus for host2 and otg (dwc2) */
  30         vcc5_host2: vcc5-host2-regulator {
  31                 compatible = "regulator-fixed";
  32                 enable-active-high;
  33                 gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
  34                 pinctrl-names = "default";
  35                 pinctrl-0 = <&usb2_pwr_en>;
  36                 regulator-name = "vcc5_host2";
  37                 regulator-always-on;
  38                 regulator-boot-on;
  39         };
  40 };
  41
  42 &pinctrl {
  43         hdmi {
  44                 vcc50_hdmi_en: vcc50-hdmi-en {
  45                         rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
  46                 };
  47         };
  48
  49         pmic {
  50                 dvs_1: dvs-1 {
  51                         rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_down>;
  52                 };
  53
  54                 dvs_2: dvs-2 {
  55                         rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
  56                 };
  57         };
  58
  59         usb-host {
  60                 usb2_pwr_en: usb2-pwr-en {
  61                         rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
  62                 };
  63         };
  64 };
  65
  66 &rk808 {
  67         pinctrl-names = "default";
  68         pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
  69         dvs-gpios = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>,
  70                     <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
  71
  72         /delete-property/ vcc6-supply;
  73
  74         regulators {
  75                 /* vcc33_io is sourced directly from vcc33_sys */
  76                 /delete-node/ LDO_REG1;
  77
  78                 /* This is not a pwren anymore, but the real power supply */
  79                 vdd10_lcd: LDO_REG7 {
  80                         regulator-always-on;
  81                         regulator-boot-on;
  82                         regulator-min-microvolt = <1000000>;
  83                         regulator-max-microvolt = <1000000>;
  84                         regulator-name = "vdd10_lcd";
  85                         regulator-suspend-mem-disabled;
  86                 };
  87
  88                 vcc18_hdmi: SWITCH_REG2 {
  89                         regulator-always-on;
  90                         regulator-boot-on;
  91                         regulator-name = "vcc18_hdmi";
  92                         regulator-suspend-mem-disabled;
  93                 };
  94         };
  95 };
  96
  97 &vcc50_hdmi {
  98         enable-active-high;
  99         gpio = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
 100         pinctrl-names = "default";
 101         pinctrl-0 = <&vcc50_hdmi_en>;
 102 };