arch/mips/kernel/cpu-bugs64.c

   1 /*
   2  * Copyright (C) 2003, 2004, 2007  Maciej W. Rozycki
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * as published by the Free Software Foundation; either version
   7  * 2 of the License, or (at your option) any later version.
   8  */
   9 #include <linux/context_tracking.h>
  10 #include <linux/init.h>
  11 #include <linux/kernel.h>
  12 #include <linux/ptrace.h>
  13 #include <linux/stddef.h>
  14
  15 #include <asm/bugs.h>
  16 #include <asm/compiler.h>
  17 #include <asm/cpu.h>
  18 #include <asm/fpu.h>
  19 #include <asm/mipsregs.h>
  20 #include <asm/setup.h>
  21
  22 static char bug64hit[] __initdata =
  23         "reliable operation impossible!\n%s";
  24 static char nowar[] __initdata =
  25         "Please report to <linux-mips@linux-mips.org>.";
  26 static char r4kwar[] __initdata =
  27         "Enable CPU_R4000_WORKAROUNDS to rectify.";
  28 static char daddiwar[] __initdata =
  29         "Enable CPU_DADDI_WORKAROUNDS to rectify.";
  30
  31 static inline void align_mod(const int align, const int mod)
  32 {
  33         asm volatile(
  34                 ".set   push\n\t"
  35                 ".set   noreorder\n\t"
  36                 ".balign %0\n\t"
  37                 ".rept  %1\n\t"
  38                 "nop\n\t"
  39                 ".endr\n\t"
  40                 ".set   pop"
  41                 :
  42                 : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod));
  43 }
  44
  45 static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
  46                                      const int align, const int mod)
  47 {
  48         unsigned long flags;
  49         int m1, m2;
  50         long p, s, lv1, lv2, lw;
  51
  52         /*
  53          * We want the multiply and the shift to be isolated from the
  54          * rest of the code to disable gcc optimizations.  Hence the
  55          * asm statements that execute nothing, but make gcc not know
  56          * what the values of m1, m2 and s are and what lv2 and p are
  57          * used for.
  58          */
  59
  60         local_irq_save(flags);
  61         /*
  62          * The following code leads to a wrong result of the first
  63          * dsll32 when executed on R4000 rev. 2.2 or 3.0 (PRId
  64          * 00000422 or 00000430, respectively).
  65          *
  66          * See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and
  67          * 3.0" by MIPS Technologies, Inc., errata #16 and #28 for
  68          * details.  I got no permission to duplicate them here,
  69          * sigh... --macro
  70          */
  71         asm volatile(
  72                 ""
  73                 : "=r" (m1), "=r" (m2), "=r" (s)
  74                 : "0" (5), "1" (8), "2" (5));
  75         align_mod(align, mod);
  76         /*
  77          * The trailing nop is needed to fulfill the two-instruction
  78          * requirement between reading hi/lo and staring a mult/div.
  79          * Leaving it out may cause gas insert a nop itself breaking
  80          * the desired alignment of the next chunk.
  81          */
  82         asm volatile(
  83                 ".set   push\n\t"
  84                 ".set   noat\n\t"
  85                 ".set   noreorder\n\t"
  86                 ".set   nomacro\n\t"
  87                 "mult   %2, %3\n\t"
  88                 "dsll32 %0, %4, %5\n\t"
  89                 "mflo   $0\n\t"
  90                 "dsll32 %1, %4, %5\n\t"
  91                 "nop\n\t"
  92                 ".set   pop"
  93                 : "=&r" (lv1), "=r" (lw)
  94                 : "r" (m1), "r" (m2), "r" (s), "I" (0)
  95                 : "hi", "lo", GCC_REG_ACCUM);
  96         /* We have to use single integers for m1 and m2 and a double
  97          * one for p to be sure the mulsidi3 gcc's RTL multiplication
  98          * instruction has the workaround applied.  Older versions of
  99          * gcc have correct umulsi3 and mulsi3, but other
 100          * multiplication variants lack the workaround.
 101          */
 102         asm volatile(
 103                 ""
 104                 : "=r" (m1), "=r" (m2), "=r" (s)
 105                 : "0" (m1), "1" (m2), "2" (s));
 106         align_mod(align, mod);
 107         p = m1 * m2;
 108         lv2 = s << 32;
 109         asm volatile(
 110                 ""
 111                 : "=r" (lv2)
 112                 : "0" (lv2), "r" (p));
 113         local_irq_restore(flags);
 114
 115         *v1 = lv1;
 116         *v2 = lv2;
 117         *w = lw;
 118 }
 119
 120 static inline void check_mult_sh(void)
 121 {
 122         long v1[8], v2[8], w[8];
 123         int bug, fix, i;
 124
 125         printk("Checking for the multiply/shift bug... ");
 126
 127         /*
 128          * Testing discovered false negatives for certain code offsets
 129          * into cache lines.  Hence we test all possible offsets for
 130          * the worst assumption of an R4000 I-cache line width of 32
 131          * bytes.
 132          *
 133          * We can't use a loop as alignment directives need to be
 134          * immediates.
 135          */
 136         mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0);
 137         mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1);
 138         mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2);
 139         mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3);
 140         mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4);
 141         mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5);
 142         mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6);
 143         mult_sh_align_mod(&v1[7], &v2[7], &w[7], 32, 7);
 144
 145         bug = 0;
 146         for (i = 0; i < 8; i++)
 147                 if (v1[i] != w[i])
 148                         bug = 1;
 149
 150         if (bug == 0) {
 151                 printk("no.\n");
 152                 return;
 153         }
 154
 155         printk("yes, workaround... ");
 156
 157         fix = 1;
 158         for (i = 0; i < 8; i++)
 159                 if (v2[i] != w[i])
 160                         fix = 0;
 161
 162         if (fix == 1) {
 163                 printk("yes.\n");
 164                 return;
 165         }
 166
 167         printk("no.\n");
 168         panic(bug64hit, !R4000_WAR ? r4kwar : nowar);
 169 }
 170
 171 static volatile int daddi_ov;
 172
 173 asmlinkage void __init do_daddi_ov(struct pt_regs *regs)
 174 {
 175         enum ctx_state prev_state;
 176
 177         prev_state = exception_enter();
 178         daddi_ov = 1;
 179         regs->cp0_epc += 4;
 180         exception_exit(prev_state);
 181 }
 182
 183 static inline void check_daddi(void)
 184 {
 185         extern asmlinkage void handle_daddi_ov(void);
 186         unsigned long flags;
 187         void *handler;
 188         long v, tmp;
 189
 190         printk("Checking for the daddi bug... ");
 191
 192         local_irq_save(flags);
 193         handler = set_except_vector(12, handle_daddi_ov);
 194         /*
 195          * The following code fails to trigger an overflow exception
 196          * when executed on R4000 rev. 2.2 or 3.0 (PRId 00000422 or
 197          * 00000430, respectively).
 198          *
 199          * See "MIPS R4000PC/SC Errata, Processor Revision 2.2 and
 200          * 3.0" by MIPS Technologies, Inc., erratum #23 for details.
 201          * I got no permission to duplicate it here, sigh... --macro
 202          */
 203         asm volatile(
 204                 ".set   push\n\t"
 205                 ".set   noat\n\t"
 206                 ".set   noreorder\n\t"
 207                 ".set   nomacro\n\t"
 208                 "addiu  %1, $0, %2\n\t"
 209                 "dsrl   %1, %1, 1\n\t"
 210 #ifdef HAVE_AS_SET_DADDI
 211                 ".set   daddi\n\t"
 212 #endif
 213                 "daddi  %0, %1, %3\n\t"
 214                 ".set   pop"
 215                 : "=r" (v), "=&r" (tmp)
 216                 : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
 217         set_except_vector(12, handler);
 218         local_irq_restore(flags);
 219
 220         if (daddi_ov) {
 221                 printk("no.\n");
 222                 return;
 223         }
 224
 225         printk("yes, workaround... ");
 226
 227         local_irq_save(flags);
 228         handler = set_except_vector(12, handle_daddi_ov);
 229         asm volatile(
 230                 "addiu  %1, $0, %2\n\t"
 231                 "dsrl   %1, %1, 1\n\t"
 232                 "daddi  %0, %1, %3"
 233                 : "=r" (v), "=&r" (tmp)
 234                 : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
 235         set_except_vector(12, handler);
 236         local_irq_restore(flags);
 237
 238         if (daddi_ov) {
 239                 printk("yes.\n");
 240                 return;
 241         }
 242
 243         printk("no.\n");
 244         panic(bug64hit, !DADDI_WAR ? daddiwar : nowar);
 245 }
 246
 247 int daddiu_bug  = -1;
 248
 249 static inline void check_daddiu(void)
 250 {
 251         long v, w, tmp;
 252
 253         printk("Checking for the daddiu bug... ");
 254
 255         /*
 256          * The following code leads to a wrong result of daddiu when
 257          * executed on R4400 rev. 1.0 (PRId 00000440).
 258          *
 259          * See "MIPS R4400PC/SC Errata, Processor Revision 1.0" by
 260          * MIPS Technologies, Inc., erratum #7 for details.
 261          *
 262          * According to "MIPS R4000PC/SC Errata, Processor Revision
 263          * 2.2 and 3.0" by MIPS Technologies, Inc., erratum #41 this
 264          * problem affects R4000 rev. 2.2 and 3.0 (PRId 00000422 and
 265          * 00000430, respectively), too.  Testing failed to trigger it
 266          * so far.
 267          *
 268          * I got no permission to duplicate the errata here, sigh...
 269          * --macro
 270          */
 271         asm volatile(
 272                 ".set   push\n\t"
 273                 ".set   noat\n\t"
 274                 ".set   noreorder\n\t"
 275                 ".set   nomacro\n\t"
 276                 "addiu  %2, $0, %3\n\t"
 277                 "dsrl   %2, %2, 1\n\t"
 278 #ifdef HAVE_AS_SET_DADDI
 279                 ".set   daddi\n\t"
 280 #endif
 281                 "daddiu %0, %2, %4\n\t"
 282                 "addiu  %1, $0, %4\n\t"
 283                 "daddu  %1, %2\n\t"
 284                 ".set   pop"
 285                 : "=&r" (v), "=&r" (w), "=&r" (tmp)
 286                 : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
 287
 288         daddiu_bug = v != w;
 289
 290         if (!daddiu_bug) {
 291                 printk("no.\n");
 292                 return;
 293         }
 294
 295         printk("yes, workaround... ");
 296
 297         asm volatile(
 298                 "addiu  %2, $0, %3\n\t"
 299                 "dsrl   %2, %2, 1\n\t"
 300                 "daddiu %0, %2, %4\n\t"
 301                 "addiu  %1, $0, %4\n\t"
 302                 "daddu  %1, %2"
 303                 : "=&r" (v), "=&r" (w), "=&r" (tmp)
 304                 : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
 305
 306         if (v == w) {
 307                 printk("yes.\n");
 308                 return;
 309         }
 310
 311         printk("no.\n");
 312         panic(bug64hit, !DADDI_WAR ? daddiwar : nowar);
 313 }
 314
 315 void __init check_bugs64_early(void)
 316 {
 317         check_mult_sh();
 318         check_daddiu();
 319 }
 320
 321 void __init check_bugs64(void)
 322 {
 323         check_daddi();
 324 }