arch/x86/pci/common.c

   1 /*
   2  *      Low-Level PCI Support for PC
   3  *
   4  *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
   5  */
   6
   7 #include <linux/sched.h>
   8 #include <linux/pci.h>
   9 #include <linux/pci-acpi.h>
  10 #include <linux/ioport.h>
  11 #include <linux/init.h>
  12 #include <linux/dmi.h>
  13 #include <linux/slab.h>
  14
  15 #include <asm-generic/pci-bridge.h>
  16 #include <asm/acpi.h>
  17 #include <asm/segment.h>
  18 #include <asm/io.h>
  19 #include <asm/smp.h>
  20 #include <asm/pci_x86.h>
  21 #include <asm/setup.h>
  22
  23 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  24                                 PCI_PROBE_MMCONF;
  25
  26 unsigned int pci_early_dump_regs;
  27 static int pci_bf_sort;
  28 static int smbios_type_b1_flag;
  29 int pci_routeirq;
  30 int noioapicquirk;
  31 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
  32 int noioapicreroute = 0;
  33 #else
  34 int noioapicreroute = 1;
  35 #endif
  36 int pcibios_last_bus = -1;
  37 unsigned long pirq_table_addr;
  38 const struct pci_raw_ops *__read_mostly raw_pci_ops;
  39 const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
  40
  41 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
  42                                                 int reg, int len, u32 *val)
  43 {
  44         if (domain == 0 && reg < 256 && raw_pci_ops)
  45                 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
  46         if (raw_pci_ext_ops)
  47                 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
  48         return -EINVAL;
  49 }
  50
  51 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
  52                                                 int reg, int len, u32 val)
  53 {
  54         if (domain == 0 && reg < 256 && raw_pci_ops)
  55                 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
  56         if (raw_pci_ext_ops)
  57                 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
  58         return -EINVAL;
  59 }
  60
  61 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  62 {
  63         return raw_pci_read(pci_domain_nr(bus), bus->number,
  64                                  devfn, where, size, value);
  65 }
  66
  67 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  68 {
  69         return raw_pci_write(pci_domain_nr(bus), bus->number,
  70                                   devfn, where, size, value);
  71 }
  72
  73 struct pci_ops pci_root_ops = {
  74         .read = pci_read,
  75         .write = pci_write,
  76 };
  77
  78 /*
  79  * This interrupt-safe spinlock protects all accesses to PCI
  80  * configuration space.
  81  */
  82 DEFINE_RAW_SPINLOCK(pci_config_lock);
  83
  84 static int can_skip_ioresource_align(const struct dmi_system_id *d)
  85 {
  86         pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  87         printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
  88         return 0;
  89 }
  90
  91 static const struct dmi_system_id can_skip_pciprobe_dmi_table[] = {
  92 /*
  93  * Systems where PCI IO resource ISA alignment can be skipped
  94  * when the ISA enable bit in the bridge control is not set
  95  */
  96         {
  97                 .callback = can_skip_ioresource_align,
  98                 .ident = "IBM System x3800",
  99                 .matches = {
 100                         DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
 101                         DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
 102                 },
 103         },
 104         {
 105                 .callback = can_skip_ioresource_align,
 106                 .ident = "IBM System x3850",
 107                 .matches = {
 108                         DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
 109                         DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
 110                 },
 111         },
 112         {
 113                 .callback = can_skip_ioresource_align,
 114                 .ident = "IBM System x3950",
 115                 .matches = {
 116                         DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
 117                         DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
 118                 },
 119         },
 120         {}
 121 };
 122
 123 void __init dmi_check_skip_isa_align(void)
 124 {
 125         dmi_check_system(can_skip_pciprobe_dmi_table);
 126 }
 127
 128 static void pcibios_fixup_device_resources(struct pci_dev *dev)
 129 {
 130         struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
 131         struct resource *bar_r;
 132         int bar;
 133
 134         if (pci_probe & PCI_NOASSIGN_BARS) {
 135                 /*
 136                 * If the BIOS did not assign the BAR, zero out the
 137                 * resource so the kernel doesn't attmept to assign
 138                 * it later on in pci_assign_unassigned_resources
 139                 */
 140                 for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
 141                         bar_r = &dev->resource[bar];
 142                         if (bar_r->start == 0 && bar_r->end != 0) {
 143                                 bar_r->flags = 0;
 144                                 bar_r->end = 0;
 145                         }
 146                 }
 147         }
 148
 149         if (pci_probe & PCI_NOASSIGN_ROMS) {
 150                 if (rom_r->parent)
 151                         return;
 152                 if (rom_r->start) {
 153                         /* we deal with BIOS assigned ROM later */
 154                         return;
 155                 }
 156                 rom_r->start = rom_r->end = rom_r->flags = 0;
 157         }
 158 }
 159
 160 /*
 161  *  Called after each bus is probed, but before its children
 162  *  are examined.
 163  */
 164
 165 void pcibios_fixup_bus(struct pci_bus *b)
 166 {
 167         struct pci_dev *dev;
 168
 169         pci_read_bridge_bases(b);
 170         list_for_each_entry(dev, &b->devices, bus_list)
 171                 pcibios_fixup_device_resources(dev);
 172 }
 173
 174 void pcibios_add_bus(struct pci_bus *bus)
 175 {
 176         acpi_pci_add_bus(bus);
 177 }
 178
 179 void pcibios_remove_bus(struct pci_bus *bus)
 180 {
 181         acpi_pci_remove_bus(bus);
 182 }
 183
 184 /*
 185  * Only use DMI information to set this if nothing was passed
 186  * on the kernel command line (which was parsed earlier).
 187  */
 188
 189 static int set_bf_sort(const struct dmi_system_id *d)
 190 {
 191         if (pci_bf_sort == pci_bf_sort_default) {
 192                 pci_bf_sort = pci_dmi_bf;
 193                 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
 194         }
 195         return 0;
 196 }
 197
 198 static void read_dmi_type_b1(const struct dmi_header *dm,
 199                                        void *private_data)
 200 {
 201         u8 *d = (u8 *)dm + 4;
 202
 203         if (dm->type != 0xB1)
 204                 return;
 205         switch (((*(u32 *)d) >> 9) & 0x03) {
 206         case 0x00:
 207                 printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
 208                 break;
 209         case 0x01: /* set pci=bfsort */
 210                 smbios_type_b1_flag = 1;
 211                 break;
 212         case 0x02: /* do not set pci=bfsort */
 213                 smbios_type_b1_flag = 2;
 214                 break;
 215         default:
 216                 break;
 217         }
 218 }
 219
 220 static int find_sort_method(const struct dmi_system_id *d)
 221 {
 222         dmi_walk(read_dmi_type_b1, NULL);
 223
 224         if (smbios_type_b1_flag == 1) {
 225                 set_bf_sort(d);
 226                 return 0;
 227         }
 228         return -1;
 229 }
 230
 231 /*
 232  * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
 233  */
 234 #ifdef __i386__
 235 static int assign_all_busses(const struct dmi_system_id *d)
 236 {
 237         pci_probe |= PCI_ASSIGN_ALL_BUSSES;
 238         printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
 239                         " (pci=assign-busses)\n", d->ident);
 240         return 0;
 241 }
 242 #endif
 243
 244 static int set_scan_all(const struct dmi_system_id *d)
 245 {
 246         printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
 247                d->ident);
 248         pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
 249         return 0;
 250 }
 251
 252 static const struct dmi_system_id pciprobe_dmi_table[] = {
 253 #ifdef __i386__
 254 /*
 255  * Laptops which need pci=assign-busses to see Cardbus cards
 256  */
 257         {
 258                 .callback = assign_all_busses,
 259                 .ident = "Samsung X20 Laptop",
 260                 .matches = {
 261                         DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
 262                         DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
 263                 },
 264         },
 265 #endif          /* __i386__ */
 266         {
 267                 .callback = set_bf_sort,
 268                 .ident = "Dell PowerEdge 1950",
 269                 .matches = {
 270                         DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
 271                         DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
 272                 },
 273         },
 274         {
 275                 .callback = set_bf_sort,
 276                 .ident = "Dell PowerEdge 1955",
 277                 .matches = {
 278                         DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
 279                         DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
 280                 },
 281         },
 282         {
 283                 .callback = set_bf_sort,
 284                 .ident = "Dell PowerEdge 2900",
 285                 .matches = {
 286                         DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
 287                         DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
 288                 },
 289         },
 290         {
 291                 .callback = set_bf_sort,
 292                 .ident = "Dell PowerEdge 2950",
 293                 .matches = {
 294                         DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
 295                         DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
 296                 },
 297         },
 298         {
 299                 .callback = set_bf_sort,
 300                 .ident = "Dell PowerEdge R900",
 301                 .matches = {
 302                         DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
 303                         DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
 304                 },
 305         },
 306         {
 307                 .callback = find_sort_method,
 308                 .ident = "Dell System",
 309                 .matches = {
 310                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
 311                 },
 312         },
 313         {
 314                 .callback = set_bf_sort,
 315                 .ident = "HP ProLiant BL20p G3",
 316                 .matches = {
 317                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 318                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
 319                 },
 320         },
 321         {
 322                 .callback = set_bf_sort,
 323                 .ident = "HP ProLiant BL20p G4",
 324                 .matches = {
 325                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 326                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
 327                 },
 328         },
 329         {
 330                 .callback = set_bf_sort,
 331                 .ident = "HP ProLiant BL30p G1",
 332                 .matches = {
 333                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 334                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
 335                 },
 336         },
 337         {
 338                 .callback = set_bf_sort,
 339                 .ident = "HP ProLiant BL25p G1",
 340                 .matches = {
 341                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 342                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
 343                 },
 344         },
 345         {
 346                 .callback = set_bf_sort,
 347                 .ident = "HP ProLiant BL35p G1",
 348                 .matches = {
 349                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 350                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
 351                 },
 352         },
 353         {
 354                 .callback = set_bf_sort,
 355                 .ident = "HP ProLiant BL45p G1",
 356                 .matches = {
 357                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 358                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
 359                 },
 360         },
 361         {
 362                 .callback = set_bf_sort,
 363                 .ident = "HP ProLiant BL45p G2",
 364                 .matches = {
 365                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 366                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
 367                 },
 368         },
 369         {
 370                 .callback = set_bf_sort,
 371                 .ident = "HP ProLiant BL460c G1",
 372                 .matches = {
 373                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 374                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
 375                 },
 376         },
 377         {
 378                 .callback = set_bf_sort,
 379                 .ident = "HP ProLiant BL465c G1",
 380                 .matches = {
 381                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 382                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
 383                 },
 384         },
 385         {
 386                 .callback = set_bf_sort,
 387                 .ident = "HP ProLiant BL480c G1",
 388                 .matches = {
 389                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 390                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
 391                 },
 392         },
 393         {
 394                 .callback = set_bf_sort,
 395                 .ident = "HP ProLiant BL685c G1",
 396                 .matches = {
 397                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 398                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
 399                 },
 400         },
 401         {
 402                 .callback = set_bf_sort,
 403                 .ident = "HP ProLiant DL360",
 404                 .matches = {
 405                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 406                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
 407                 },
 408         },
 409         {
 410                 .callback = set_bf_sort,
 411                 .ident = "HP ProLiant DL380",
 412                 .matches = {
 413                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 414                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
 415                 },
 416         },
 417 #ifdef __i386__
 418         {
 419                 .callback = assign_all_busses,
 420                 .ident = "Compaq EVO N800c",
 421                 .matches = {
 422                         DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
 423                         DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
 424                 },
 425         },
 426 #endif
 427         {
 428                 .callback = set_bf_sort,
 429                 .ident = "HP ProLiant DL385 G2",
 430                 .matches = {
 431                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 432                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
 433                 },
 434         },
 435         {
 436                 .callback = set_bf_sort,
 437                 .ident = "HP ProLiant DL585 G2",
 438                 .matches = {
 439                         DMI_MATCH(DMI_SYS_VENDOR, "HP"),
 440                         DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
 441                 },
 442         },
 443         {
 444                 .callback = set_scan_all,
 445                 .ident = "Stratus/NEC ftServer",
 446                 .matches = {
 447                         DMI_MATCH(DMI_SYS_VENDOR, "Stratus"),
 448                         DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"),
 449                 },
 450         },
 451         {}
 452 };
 453
 454 void __init dmi_check_pciprobe(void)
 455 {
 456         dmi_check_system(pciprobe_dmi_table);
 457 }
 458
 459 struct pci_bus *pcibios_scan_root(int busnum)
 460 {
 461         struct pci_bus *bus = NULL;
 462
 463         while ((bus = pci_find_next_bus(bus)) != NULL) {
 464                 if (bus->number == busnum) {
 465                         /* Already scanned */
 466                         return bus;
 467                 }
 468         }
 469
 470         return pci_scan_bus_on_node(busnum, &pci_root_ops,
 471                                         get_mp_bus_to_node(busnum));
 472 }
 473
 474 void __init pcibios_set_cache_line_size(void)
 475 {
 476         struct cpuinfo_x86 *c = &boot_cpu_data;
 477
 478         /*
 479          * Set PCI cacheline size to that of the CPU if the CPU has reported it.
 480          * (For older CPUs that don't support cpuid, we se it to 32 bytes
 481          * It's also good for 386/486s (which actually have 16)
 482          * as quite a few PCI devices do not support smaller values.
 483          */
 484         if (c->x86_clflush_size > 0) {
 485                 pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
 486                 printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
 487                         pci_dfl_cache_line_size << 2);
 488         } else {
 489                 pci_dfl_cache_line_size = 32 >> 2;
 490                 printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
 491         }
 492 }
 493
 494 int __init pcibios_init(void)
 495 {
 496         if (!raw_pci_ops) {
 497                 printk(KERN_WARNING "PCI: System does not support PCI\n");
 498                 return 0;
 499         }
 500
 501         pcibios_set_cache_line_size();
 502         pcibios_resource_survey();
 503
 504         if (pci_bf_sort >= pci_force_bf)
 505                 pci_sort_breadthfirst();
 506         return 0;
 507 }
 508
 509 char * __init pcibios_setup(char *str)
 510 {
 511         if (!strcmp(str, "off")) {
 512                 pci_probe = 0;
 513                 return NULL;
 514         } else if (!strcmp(str, "bfsort")) {
 515                 pci_bf_sort = pci_force_bf;
 516                 return NULL;
 517         } else if (!strcmp(str, "nobfsort")) {
 518                 pci_bf_sort = pci_force_nobf;
 519                 return NULL;
 520         }
 521 #ifdef CONFIG_PCI_BIOS
 522         else if (!strcmp(str, "bios")) {
 523                 pci_probe = PCI_PROBE_BIOS;
 524                 return NULL;
 525         } else if (!strcmp(str, "nobios")) {
 526                 pci_probe &= ~PCI_PROBE_BIOS;
 527                 return NULL;
 528         } else if (!strcmp(str, "biosirq")) {
 529                 pci_probe |= PCI_BIOS_IRQ_SCAN;
 530                 return NULL;
 531         } else if (!strncmp(str, "pirqaddr=", 9)) {
 532                 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
 533                 return NULL;
 534         }
 535 #endif
 536 #ifdef CONFIG_PCI_DIRECT
 537         else if (!strcmp(str, "conf1")) {
 538                 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
 539                 return NULL;
 540         }
 541         else if (!strcmp(str, "conf2")) {
 542                 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
 543                 return NULL;
 544         }
 545 #endif
 546 #ifdef CONFIG_PCI_MMCONFIG
 547         else if (!strcmp(str, "nommconf")) {
 548                 pci_probe &= ~PCI_PROBE_MMCONF;
 549                 return NULL;
 550         }
 551         else if (!strcmp(str, "check_enable_amd_mmconf")) {
 552                 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
 553                 return NULL;
 554         }
 555 #endif
 556         else if (!strcmp(str, "noacpi")) {
 557                 acpi_noirq_set();
 558                 return NULL;
 559         }
 560         else if (!strcmp(str, "noearly")) {
 561                 pci_probe |= PCI_PROBE_NOEARLY;
 562                 return NULL;
 563         }
 564 #ifndef CONFIG_X86_VISWS
 565         else if (!strcmp(str, "usepirqmask")) {
 566                 pci_probe |= PCI_USE_PIRQ_MASK;
 567                 return NULL;
 568         } else if (!strncmp(str, "irqmask=", 8)) {
 569                 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
 570                 return NULL;
 571         } else if (!strncmp(str, "lastbus=", 8)) {
 572                 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
 573                 return NULL;
 574         }
 575 #endif
 576         else if (!strcmp(str, "rom")) {
 577                 pci_probe |= PCI_ASSIGN_ROMS;
 578                 return NULL;
 579         } else if (!strcmp(str, "norom")) {
 580                 pci_probe |= PCI_NOASSIGN_ROMS;
 581                 return NULL;
 582         } else if (!strcmp(str, "nobar")) {
 583                 pci_probe |= PCI_NOASSIGN_BARS;
 584                 return NULL;
 585         } else if (!strcmp(str, "assign-busses")) {
 586                 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
 587                 return NULL;
 588         } else if (!strcmp(str, "use_crs")) {
 589                 pci_probe |= PCI_USE__CRS;
 590                 return NULL;
 591         } else if (!strcmp(str, "nocrs")) {
 592                 pci_probe |= PCI_ROOT_NO_CRS;
 593                 return NULL;
 594         } else if (!strcmp(str, "earlydump")) {
 595                 pci_early_dump_regs = 1;
 596                 return NULL;
 597         } else if (!strcmp(str, "routeirq")) {
 598                 pci_routeirq = 1;
 599                 return NULL;
 600         } else if (!strcmp(str, "skip_isa_align")) {
 601                 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
 602                 return NULL;
 603         } else if (!strcmp(str, "noioapicquirk")) {
 604                 noioapicquirk = 1;
 605                 return NULL;
 606         } else if (!strcmp(str, "ioapicreroute")) {
 607                 if (noioapicreroute != -1)
 608                         noioapicreroute = 0;
 609                 return NULL;
 610         } else if (!strcmp(str, "noioapicreroute")) {
 611                 if (noioapicreroute != -1)
 612                         noioapicreroute = 1;
 613                 return NULL;
 614         }
 615         return str;
 616 }
 617
 618 unsigned int pcibios_assign_all_busses(void)
 619 {
 620         return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
 621 }
 622
 623 int pcibios_add_device(struct pci_dev *dev)
 624 {
 625         struct setup_data *data;
 626         struct pci_setup_rom *rom;
 627         u64 pa_data;
 628
 629         pa_data = boot_params.hdr.setup_data;
 630         while (pa_data) {
 631                 data = ioremap(pa_data, sizeof(*rom));
 632                 if (!data)
 633                         return -ENOMEM;
 634
 635                 if (data->type == SETUP_PCI) {
 636                         rom = (struct pci_setup_rom *)data;
 637
 638                         if ((pci_domain_nr(dev->bus) == rom->segment) &&
 639                             (dev->bus->number == rom->bus) &&
 640                             (PCI_SLOT(dev->devfn) == rom->device) &&
 641                             (PCI_FUNC(dev->devfn) == rom->function) &&
 642                             (dev->vendor == rom->vendor) &&
 643                             (dev->device == rom->devid)) {
 644                                 dev->rom = pa_data +
 645                                       offsetof(struct pci_setup_rom, romdata);
 646                                 dev->romlen = rom->pcilen;
 647                         }
 648                 }
 649                 pa_data = data->next;
 650                 iounmap(data);
 651         }
 652         return 0;
 653 }
 654
 655 int pcibios_enable_device(struct pci_dev *dev, int mask)
 656 {
 657         int err;
 658
 659         if ((err = pci_enable_resources(dev, mask)) < 0)
 660                 return err;
 661
 662         if (!pci_dev_msi_enabled(dev))
 663                 return pcibios_enable_irq(dev);
 664         return 0;
 665 }
 666
 667 void pcibios_disable_device (struct pci_dev *dev)
 668 {
 669         if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
 670                 pcibios_disable_irq(dev);
 671 }
 672
 673 int pci_ext_cfg_avail(void)
 674 {
 675         if (raw_pci_ext_ops)
 676                 return 1;
 677         else
 678                 return 0;
 679 }
 680
 681 struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
 682 {
 683         LIST_HEAD(resources);
 684         struct pci_bus *bus = NULL;
 685         struct pci_sysdata *sd;
 686
 687         /*
 688          * Allocate per-root-bus (not per bus) arch-specific data.
 689          * TODO: leak; this memory is never freed.
 690          * It's arguable whether it's worth the trouble to care.
 691          */
 692         sd = kzalloc(sizeof(*sd), GFP_KERNEL);
 693         if (!sd) {
 694                 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
 695                 return NULL;
 696         }
 697         sd->node = node;
 698         x86_pci_root_bus_resources(busno, &resources);
 699         printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busno);
 700         bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
 701         if (!bus) {
 702                 pci_free_resource_list(&resources);
 703                 kfree(sd);
 704         }
 705
 706         return bus;
 707 }
 708
 709 struct pci_bus *pci_scan_bus_with_sysdata(int busno)
 710 {
 711         return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
 712 }
 713
 714 /*
 715  * NUMA info for PCI busses
 716  *
 717  * Early arch code is responsible for filling in reasonable values here.
 718  * A node id of "-1" means "use current node".  In other words, if a bus
 719  * has a -1 node id, it's not tightly coupled to any particular chunk
 720  * of memory (as is the case on some Nehalem systems).
 721  */
 722 #ifdef CONFIG_NUMA
 723
 724 #define BUS_NR 256
 725
 726 #ifdef CONFIG_X86_64
 727
 728 static int mp_bus_to_node[BUS_NR] = {
 729         [0 ... BUS_NR - 1] = -1
 730 };
 731
 732 void set_mp_bus_to_node(int busnum, int node)
 733 {
 734         if (busnum >= 0 &&  busnum < BUS_NR)
 735                 mp_bus_to_node[busnum] = node;
 736 }
 737
 738 int get_mp_bus_to_node(int busnum)
 739 {
 740         int node = -1;
 741
 742         if (busnum < 0 || busnum > (BUS_NR - 1))
 743                 return node;
 744
 745         node = mp_bus_to_node[busnum];
 746
 747         /*
 748          * let numa_node_id to decide it later in dma_alloc_pages
 749          * if there is no ram on that node
 750          */
 751         if (node != -1 && !node_online(node))
 752                 node = -1;
 753
 754         return node;
 755 }
 756
 757 #else /* CONFIG_X86_32 */
 758
 759 static int mp_bus_to_node[BUS_NR] = {
 760         [0 ... BUS_NR - 1] = -1
 761 };
 762
 763 void set_mp_bus_to_node(int busnum, int node)
 764 {
 765         if (busnum >= 0 &&  busnum < BUS_NR)
 766         mp_bus_to_node[busnum] = (unsigned char) node;
 767 }
 768
 769 int get_mp_bus_to_node(int busnum)
 770 {
 771         int node;
 772
 773         if (busnum < 0 || busnum > (BUS_NR - 1))
 774                 return 0;
 775         node = mp_bus_to_node[busnum];
 776         return node;
 777 }
 778
 779 #endif /* CONFIG_X86_32 */
 780
 781 #endif /* CONFIG_NUMA */