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Linux 2.6.16.22
[linux/fpc-iii.git] / drivers / hwmon / w83792d.c
bloba2f6bb676235e520202b74481dddb9d47d9b26a6
1 /*
2 w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (C) 2004, 2005 Winbond Electronics Corp.
5 Chunhao Huang <DZShen@Winbond.com.tw>,
6 Rudolf Marek <r.marek@sh.cvut.cz>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22 Note:
23 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
24 2. This driver is only for Winbond W83792D C version device, there
25 are also some motherboards with B version W83792D device. The
26 calculation method to in6-in7(measured value, limits) is a little
27 different between C and B version. C or B version can be identified
28 by CR[0x49h].
29 */
30
31 /*
32 Supports following chips:
33
34 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
35 w83792d 9 7 7 3 0x7a 0x5ca3 yes no
36 */
37
38 #include <linux/config.h>
39 #include <linux/module.h>
40 #include <linux/init.h>
41 #include <linux/slab.h>
42 #include <linux/i2c.h>
43 #include <linux/hwmon.h>
44 #include <linux/hwmon-sysfs.h>
45 #include <linux/err.h>
46
47 /* Addresses to scan */
48 static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
49
50 /* Insmod parameters */
51 I2C_CLIENT_INSMOD_1(w83792d);
52 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
53 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
54
55 static int init;
56 module_param(init, bool, 0);
57 MODULE_PARM_DESC(init, "Set to one to force chip initialization");
58
59 /* The W83792D registers */
60 static const u8 W83792D_REG_IN[9] = {
61 0x20, /* Vcore A in DataSheet */
62 0x21, /* Vcore B in DataSheet */
63 0x22, /* VIN0 in DataSheet */
64 0x23, /* VIN1 in DataSheet */
65 0x24, /* VIN2 in DataSheet */
66 0x25, /* VIN3 in DataSheet */
67 0x26, /* 5VCC in DataSheet */
68 0xB0, /* 5VSB in DataSheet */
69 0xB1 /* VBAT in DataSheet */
70 };
71 #define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
72 #define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
73 static const u8 W83792D_REG_IN_MAX[9] = {
74 0x2B, /* Vcore A High Limit in DataSheet */
75 0x2D, /* Vcore B High Limit in DataSheet */
76 0x2F, /* VIN0 High Limit in DataSheet */
77 0x31, /* VIN1 High Limit in DataSheet */
78 0x33, /* VIN2 High Limit in DataSheet */
79 0x35, /* VIN3 High Limit in DataSheet */
80 0x37, /* 5VCC High Limit in DataSheet */
81 0xB4, /* 5VSB High Limit in DataSheet */
82 0xB6 /* VBAT High Limit in DataSheet */
83 };
84 static const u8 W83792D_REG_IN_MIN[9] = {
85 0x2C, /* Vcore A Low Limit in DataSheet */
86 0x2E, /* Vcore B Low Limit in DataSheet */
87 0x30, /* VIN0 Low Limit in DataSheet */
88 0x32, /* VIN1 Low Limit in DataSheet */
89 0x34, /* VIN2 Low Limit in DataSheet */
90 0x36, /* VIN3 Low Limit in DataSheet */
91 0x38, /* 5VCC Low Limit in DataSheet */
92 0xB5, /* 5VSB Low Limit in DataSheet */
93 0xB7 /* VBAT Low Limit in DataSheet */
94 };
95 static const u8 W83792D_REG_FAN[7] = {
96 0x28, /* FAN 1 Count in DataSheet */
97 0x29, /* FAN 2 Count in DataSheet */
98 0x2A, /* FAN 3 Count in DataSheet */
99 0xB8, /* FAN 4 Count in DataSheet */
100 0xB9, /* FAN 5 Count in DataSheet */
101 0xBA, /* FAN 6 Count in DataSheet */
102 0xBE /* FAN 7 Count in DataSheet */
103 };
104 static const u8 W83792D_REG_FAN_MIN[7] = {
105 0x3B, /* FAN 1 Count Low Limit in DataSheet */
106 0x3C, /* FAN 2 Count Low Limit in DataSheet */
107 0x3D, /* FAN 3 Count Low Limit in DataSheet */
108 0xBB, /* FAN 4 Count Low Limit in DataSheet */
109 0xBC, /* FAN 5 Count Low Limit in DataSheet */
110 0xBD, /* FAN 6 Count Low Limit in DataSheet */
111 0xBF /* FAN 7 Count Low Limit in DataSheet */
112 };
113 #define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
114 static const u8 W83792D_REG_FAN_DIV[4] = {
115 0x47, /* contains FAN2 and FAN1 Divisor */
116 0x5B, /* contains FAN4 and FAN3 Divisor */
117 0x5C, /* contains FAN6 and FAN5 Divisor */
118 0x9E /* contains FAN7 Divisor. */
119 };
120 static const u8 W83792D_REG_PWM[7] = {
121 0x81, /* FAN 1 Duty Cycle, be used to control */
122 0x83, /* FAN 2 Duty Cycle, be used to control */
123 0x94, /* FAN 3 Duty Cycle, be used to control */
124 0xA3, /* FAN 4 Duty Cycle, be used to control */
125 0xA4, /* FAN 5 Duty Cycle, be used to control */
126 0xA5, /* FAN 6 Duty Cycle, be used to control */
127 0xA6 /* FAN 7 Duty Cycle, be used to control */
128 };
129 #define W83792D_REG_BANK 0x4E
130 #define W83792D_REG_TEMP2_CONFIG 0xC2
131 #define W83792D_REG_TEMP3_CONFIG 0xCA
132
133 static const u8 W83792D_REG_TEMP1[3] = {
134 0x27, /* TEMP 1 in DataSheet */
135 0x39, /* TEMP 1 Over in DataSheet */
136 0x3A, /* TEMP 1 Hyst in DataSheet */
137 };
138
139 static const u8 W83792D_REG_TEMP_ADD[2][6] = {
140 { 0xC0, /* TEMP 2 in DataSheet */
141 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
142 0xC5, /* TEMP 2 Over High part in DataSheet */
143 0xC6, /* TEMP 2 Over Low part in DataSheet */
144 0xC3, /* TEMP 2 Thyst High part in DataSheet */
145 0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
146 { 0xC8, /* TEMP 3 in DataSheet */
147 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
148 0xCD, /* TEMP 3 Over High part in DataSheet */
149 0xCE, /* TEMP 3 Over Low part in DataSheet */
150 0xCB, /* TEMP 3 Thyst High part in DataSheet */
151 0xCC } /* TEMP 3 Thyst Low part in DataSheet */
152 };
153
154 static const u8 W83792D_REG_THERMAL[3] = {
155 0x85, /* SmartFanI: Fan1 target value */
156 0x86, /* SmartFanI: Fan2 target value */
157 0x96 /* SmartFanI: Fan3 target value */
158 };
159
160 static const u8 W83792D_REG_TOLERANCE[3] = {
161 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
162 0x87, /* (bit7-4)SmartFan Fan2 tolerance */
163 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
164 };
165
166 static const u8 W83792D_REG_POINTS[3][4] = {
167 { 0x85, /* SmartFanII: Fan1 temp point 1 */
168 0xE3, /* SmartFanII: Fan1 temp point 2 */
169 0xE4, /* SmartFanII: Fan1 temp point 3 */
170 0xE5 }, /* SmartFanII: Fan1 temp point 4 */
171 { 0x86, /* SmartFanII: Fan2 temp point 1 */
172 0xE6, /* SmartFanII: Fan2 temp point 2 */
173 0xE7, /* SmartFanII: Fan2 temp point 3 */
174 0xE8 }, /* SmartFanII: Fan2 temp point 4 */
175 { 0x96, /* SmartFanII: Fan3 temp point 1 */
176 0xE9, /* SmartFanII: Fan3 temp point 2 */
177 0xEA, /* SmartFanII: Fan3 temp point 3 */
178 0xEB } /* SmartFanII: Fan3 temp point 4 */
179 };
180
181 static const u8 W83792D_REG_LEVELS[3][4] = {
182 { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
183 0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
184 0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
185 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
186 { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
187 0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
188 0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
189 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
190 { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
191 0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
192 0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
193 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
194 };
195
196 #define W83792D_REG_GPIO_EN 0x1A
197 #define W83792D_REG_CONFIG 0x40
198 #define W83792D_REG_VID_FANDIV 0x47
199 #define W83792D_REG_CHIPID 0x49
200 #define W83792D_REG_WCHIPID 0x58
201 #define W83792D_REG_CHIPMAN 0x4F
202 #define W83792D_REG_PIN 0x4B
203 #define W83792D_REG_I2C_SUBADDR 0x4A
204
205 #define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
206 #define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
207 #define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
208 #define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
209 #define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
210
211 /* control in0/in1 's limit modifiability */
212 #define W83792D_REG_VID_IN_B 0x17
213
214 #define W83792D_REG_VBAT 0x5D
215 #define W83792D_REG_I2C_ADDR 0x48
216
217 /* Conversions. Rounding and limit checking is only done on the TO_REG
218 variants. Note that you should be a bit careful with which arguments
219 these macros are called: arguments may be evaluated more than once.
220 Fixing this is just not worth it. */
221 #define IN_FROM_REG(nr,val) (((nr)<=1)?(val*2): \
222 ((((nr)==6)||((nr)==7))?(val*6):(val*4)))
223 #define IN_TO_REG(nr,val) (((nr)<=1)?(val/2): \
224 ((((nr)==6)||((nr)==7))?(val/6):(val/4)))
225
226 static inline u8
227 FAN_TO_REG(long rpm, int div)
228 {
229 if (rpm == 0)
230 return 255;
231 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
232 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
233 }
234
235 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
236 ((val) == 255 ? 0 : \
237 1350000 / ((val) * (div))))
238
239 /* for temp1 */
240 #define TEMP1_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
241 : (val)) / 1000, 0, 0xff))
242 #define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
243 /* for temp2 and temp3, because they need addtional resolution */
244 #define TEMP_ADD_FROM_REG(val1, val2) \
245 ((((val1) & 0x80 ? (val1)-0x100 \
246 : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
247 #define TEMP_ADD_TO_REG_HIGH(val) \
248 (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
249 : (val)) / 1000, 0, 0xff))
250 #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
251
252 #define PWM_FROM_REG(val) (val)
253 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
254 #define DIV_FROM_REG(val) (1 << (val))
255
256 static inline u8
257 DIV_TO_REG(long val)
258 {
259 int i;
260 val = SENSORS_LIMIT(val, 1, 128) >> 1;
261 for (i = 0; i < 7; i++) {
262 if (val == 0)
263 break;
264 val >>= 1;
265 }
266 return ((u8) i);
267 }
268
269 struct w83792d_data {
270 struct i2c_client client;
271 struct class_device *class_dev;
272 enum chips type;
273
274 struct semaphore update_lock;
275 char valid; /* !=0 if following fields are valid */
276 unsigned long last_updated; /* In jiffies */
277
278 /* array of 2 pointers to subclients */
279 struct i2c_client *lm75[2];
280
281 u8 in[9]; /* Register value */
282 u8 in_max[9]; /* Register value */
283 u8 in_min[9]; /* Register value */
284 u16 low_bits; /* Additional resolution to voltage in6-0 */
285 u8 fan[7]; /* Register value */
286 u8 fan_min[7]; /* Register value */
287 u8 temp1[3]; /* current, over, thyst */
288 u8 temp_add[2][6]; /* Register value */
289 u8 fan_div[7]; /* Register encoding, shifted right */
290 u8 pwm[7]; /* We only consider the first 3 set of pwm,
291 although 792 chip has 7 set of pwm. */
292 u8 pwmenable[3];
293 u8 pwm_mode[7]; /* indicates PWM or DC mode: 1->PWM; 0->DC */
294 u32 alarms; /* realtime status register encoding,combined */
295 u8 chassis; /* Chassis status */
296 u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */
297 u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
298 u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
299 u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
300 u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
301 };
302
303 static int w83792d_attach_adapter(struct i2c_adapter *adapter);
304 static int w83792d_detect(struct i2c_adapter *adapter, int address, int kind);
305 static int w83792d_detach_client(struct i2c_client *client);
306 static struct w83792d_data *w83792d_update_device(struct device *dev);
307
308 #ifdef DEBUG
309 static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
310 #endif
311
312 static void w83792d_init_client(struct i2c_client *client);
313
314 static struct i2c_driver w83792d_driver = {
315 .driver = {
316 .name = "w83792d",
317 },
318 .attach_adapter = w83792d_attach_adapter,
319 .detach_client = w83792d_detach_client,
320 };
321
322 static inline long in_count_from_reg(int nr, struct w83792d_data *data)
323 {
324 /* in7 and in8 do not have low bits, but the formula still works */
325 return ((data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03));
326 }
327
328 /* The SMBus locks itself. The Winbond W83792D chip has a bank register,
329 but the driver only accesses registers in bank 0, so we don't have
330 to switch banks and lock access between switches. */
331 static inline int w83792d_read_value(struct i2c_client *client, u8 reg)
332 {
333 return i2c_smbus_read_byte_data(client, reg);
334 }
335
336 static inline int
337 w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
338 {
339 return i2c_smbus_write_byte_data(client, reg, value);
340 }
341
342 /* following are the sysfs callback functions */
343 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
344 char *buf)
345 {
346 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
347 int nr = sensor_attr->index;
348 struct w83792d_data *data = w83792d_update_device(dev);
349 return sprintf(buf,"%ld\n", IN_FROM_REG(nr,(in_count_from_reg(nr, data))));
350 }
351
352 #define show_in_reg(reg) \
353 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
354 char *buf) \
355 { \
356 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
357 int nr = sensor_attr->index; \
358 struct w83792d_data *data = w83792d_update_device(dev); \
359 return sprintf(buf,"%ld\n", (long)(IN_FROM_REG(nr, (data->reg[nr])*4))); \
360 }
361
362 show_in_reg(in_min);
363 show_in_reg(in_max);
364
365 #define store_in_reg(REG, reg) \
366 static ssize_t store_in_##reg (struct device *dev, \
367 struct device_attribute *attr, \
368 const char *buf, size_t count) \
369 { \
370 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
371 int nr = sensor_attr->index; \
372 struct i2c_client *client = to_i2c_client(dev); \
373 struct w83792d_data *data = i2c_get_clientdata(client); \
374 u32 val; \
375 \
376 val = simple_strtoul(buf, NULL, 10); \
377 data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \
378 w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \
379 \
380 return count; \
381 }
382 store_in_reg(MIN, min);
383 store_in_reg(MAX, max);
384
385 #define sysfs_in_reg(offset) \
386 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, show_in, \
387 NULL, offset); \
388 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
389 show_in_min, store_in_min, offset); \
390 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
391 show_in_max, store_in_max, offset);
392
393 sysfs_in_reg(0);
394 sysfs_in_reg(1);
395 sysfs_in_reg(2);
396 sysfs_in_reg(3);
397 sysfs_in_reg(4);
398 sysfs_in_reg(5);
399 sysfs_in_reg(6);
400 sysfs_in_reg(7);
401 sysfs_in_reg(8);
402
403 #define device_create_file_in(client, offset) \
404 do { \
405 device_create_file(&client->dev, &sensor_dev_attr_in##offset##_input.dev_attr); \
406 device_create_file(&client->dev, &sensor_dev_attr_in##offset##_max.dev_attr); \
407 device_create_file(&client->dev, &sensor_dev_attr_in##offset##_min.dev_attr); \
408 } while (0)
409
410 #define show_fan_reg(reg) \
411 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
412 char *buf) \
413 { \
414 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
415 int nr = sensor_attr->index - 1; \
416 struct w83792d_data *data = w83792d_update_device(dev); \
417 return sprintf(buf,"%d\n", \
418 FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
419 }
420
421 show_fan_reg(fan);
422 show_fan_reg(fan_min);
423
424 static ssize_t
425 store_fan_min(struct device *dev, struct device_attribute *attr,
426 const char *buf, size_t count)
427 {
428 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
429 int nr = sensor_attr->index - 1;
430 struct i2c_client *client = to_i2c_client(dev);
431 struct w83792d_data *data = i2c_get_clientdata(client);
432 u32 val;
433
434 val = simple_strtoul(buf, NULL, 10);
435 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
436 w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
437 data->fan_min[nr]);
438
439 return count;
440 }
441
442 static ssize_t
443 show_fan_div(struct device *dev, struct device_attribute *attr,
444 char *buf)
445 {
446 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
447 int nr = sensor_attr->index;
448 struct w83792d_data *data = w83792d_update_device(dev);
449 return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
450 }
451
452 /* Note: we save and restore the fan minimum here, because its value is
453 determined in part by the fan divisor. This follows the principle of
454 least suprise; the user doesn't expect the fan minimum to change just
455 because the divisor changed. */
456 static ssize_t
457 store_fan_div(struct device *dev, struct device_attribute *attr,
458 const char *buf, size_t count)
459 {
460 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
461 int nr = sensor_attr->index - 1;
462 struct i2c_client *client = to_i2c_client(dev);
463 struct w83792d_data *data = i2c_get_clientdata(client);
464 unsigned long min;
465 /*u8 reg;*/
466 u8 fan_div_reg = 0;
467 u8 tmp_fan_div;
468
469 /* Save fan_min */
470 min = FAN_FROM_REG(data->fan_min[nr],
471 DIV_FROM_REG(data->fan_div[nr]));
472
473 data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10));
474
475 fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
476 fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
477 tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
478 : ((data->fan_div[nr]) & 0x07);
479 w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
480 fan_div_reg | tmp_fan_div);
481
482 /* Restore fan_min */
483 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
484 w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
485
486 return count;
487 }
488
489 #define sysfs_fan(offset) \
490 static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_fan, NULL, \
491 offset); \
492 static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
493 show_fan_div, store_fan_div, offset); \
494 static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
495 show_fan_min, store_fan_min, offset);
496
497 sysfs_fan(1);
498 sysfs_fan(2);
499 sysfs_fan(3);
500 sysfs_fan(4);
501 sysfs_fan(5);
502 sysfs_fan(6);
503 sysfs_fan(7);
504
505 #define device_create_file_fan(client, offset) \
506 do { \
507 device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_input.dev_attr); \
508 device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_div.dev_attr); \
509 device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_min.dev_attr); \
510 } while (0)
511
512
513 /* read/write the temperature1, includes measured value and limits */
514
515 static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
516 char *buf)
517 {
518 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
519 int nr = sensor_attr->index;
520 struct w83792d_data *data = w83792d_update_device(dev);
521 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
522 }
523
524 static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
525 const char *buf, size_t count)
526 {
527 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
528 int nr = sensor_attr->index;
529 struct i2c_client *client = to_i2c_client(dev);
530 struct w83792d_data *data = i2c_get_clientdata(client);
531 s32 val;
532
533 val = simple_strtol(buf, NULL, 10);
534
535 data->temp1[nr] = TEMP1_TO_REG(val);
536 w83792d_write_value(client, W83792D_REG_TEMP1[nr],
537 data->temp1[nr]);
538
539 return count;
540 }
541
542
543 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0);
544 static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1,
545 store_temp1, 1);
546 static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1,
547 store_temp1, 2);
548
549 #define device_create_file_temp1(client) \
550 do { \
551 device_create_file(&client->dev, &sensor_dev_attr_temp1_input.dev_attr); \
552 device_create_file(&client->dev, &sensor_dev_attr_temp1_max.dev_attr); \
553 device_create_file(&client->dev, &sensor_dev_attr_temp1_max_hyst.dev_attr); \
554 } while (0)
555
556
557 /* read/write the temperature2-3, includes measured value and limits */
558
559 static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
560 char *buf)
561 {
562 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
563 int nr = sensor_attr->nr;
564 int index = sensor_attr->index;
565 struct w83792d_data *data = w83792d_update_device(dev);
566 return sprintf(buf,"%ld\n",
567 (long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
568 data->temp_add[nr][index+1]));
569 }
570
571 static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
572 const char *buf, size_t count)
573 {
574 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
575 int nr = sensor_attr->nr;
576 int index = sensor_attr->index;
577 struct i2c_client *client = to_i2c_client(dev);
578 struct w83792d_data *data = i2c_get_clientdata(client);
579 s32 val;
580
581 val = simple_strtol(buf, NULL, 10);
582
583 data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
584 data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
585 w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
586 data->temp_add[nr][index]);
587 w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
588 data->temp_add[nr][index+1]);
589
590 return count;
591 }
592
593 #define sysfs_temp23(name,idx) \
594 static SENSOR_DEVICE_ATTR_2(name##_input, S_IRUGO, show_temp23, NULL, \
595 idx, 0); \
596 static SENSOR_DEVICE_ATTR_2(name##_max, S_IRUGO | S_IWUSR, \
597 show_temp23, store_temp23, idx, 2); \
598 static SENSOR_DEVICE_ATTR_2(name##_max_hyst, S_IRUGO | S_IWUSR, \
599 show_temp23, store_temp23, idx, 4);
600
601 sysfs_temp23(temp2,0)
602 sysfs_temp23(temp3,1)
603
604 #define device_create_file_temp_add(client, offset) \
605 do { \
606 device_create_file(&client->dev, &sensor_dev_attr_temp##offset##_input.dev_attr); \
607 device_create_file(&client->dev, &sensor_dev_attr_temp##offset##_max.dev_attr); \
608 device_create_file(&client->dev, \
609 &sensor_dev_attr_temp##offset##_max_hyst.dev_attr); \
610 } while (0)
611
612
613 /* get reatime status of all sensors items: voltage, temp, fan */
614 static ssize_t
615 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
616 {
617 struct w83792d_data *data = w83792d_update_device(dev);
618 return sprintf(buf, "%d\n", data->alarms);
619 }
620
621 static
622 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
623 #define device_create_file_alarms(client) \
624 device_create_file(&client->dev, &dev_attr_alarms);
625
626
627
628 static ssize_t
629 show_pwm(struct device *dev, struct device_attribute *attr,
630 char *buf)
631 {
632 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
633 int nr = sensor_attr->index;
634 struct w83792d_data *data = w83792d_update_device(dev);
635 return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr-1]));
636 }
637
638 static ssize_t
639 show_pwmenable(struct device *dev, struct device_attribute *attr,
640 char *buf)
641 {
642 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
643 int nr = sensor_attr->index - 1;
644 struct w83792d_data *data = w83792d_update_device(dev);
645 long pwm_enable_tmp = 1;
646
647 switch (data->pwmenable[nr]) {
648 case 0:
649 pwm_enable_tmp = 1; /* manual mode */
650 break;
651 case 1:
652 pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
653 break;
654 case 2:
655 pwm_enable_tmp = 2; /* Smart Fan II */
656 break;
657 }
658
659 return sprintf(buf, "%ld\n", pwm_enable_tmp);
660 }
661
662 static ssize_t
663 store_pwm(struct device *dev, struct device_attribute *attr,
664 const char *buf, size_t count)
665 {
666 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
667 int nr = sensor_attr->index - 1;
668 struct i2c_client *client = to_i2c_client(dev);
669 struct w83792d_data *data = i2c_get_clientdata(client);
670 u32 val;
671
672 val = simple_strtoul(buf, NULL, 10);
673 data->pwm[nr] = PWM_TO_REG(val);
674 w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
675
676 return count;
677 }
678
679 static ssize_t
680 store_pwmenable(struct device *dev, struct device_attribute *attr,
681 const char *buf, size_t count)
682 {
683 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
684 int nr = sensor_attr->index - 1;
685 struct i2c_client *client = to_i2c_client(dev);
686 struct w83792d_data *data = i2c_get_clientdata(client);
687 u32 val;
688 u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
689
690 val = simple_strtoul(buf, NULL, 10);
691 switch (val) {
692 case 1:
693 data->pwmenable[nr] = 0; /* manual mode */
694 break;
695 case 2:
696 data->pwmenable[nr] = 2; /* Smart Fan II */
697 break;
698 case 3:
699 data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
700 break;
701 default:
702 return -EINVAL;
703 }
704 cfg1_tmp = data->pwmenable[0];
705 cfg2_tmp = (data->pwmenable[1]) << 2;
706 cfg3_tmp = (data->pwmenable[2]) << 4;
707 cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0;
708 fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
709 w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
710
711 return count;
712 }
713
714 #define sysfs_pwm(offset) \
715 static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
716 show_pwm, store_pwm, offset); \
717 static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
718 show_pwmenable, store_pwmenable, offset); \
719
720 sysfs_pwm(1);
721 sysfs_pwm(2);
722 sysfs_pwm(3);
723
724
725 #define device_create_file_pwm(client, offset) \
726 do { \
727 device_create_file(&client->dev, &sensor_dev_attr_pwm##offset.dev_attr); \
728 } while (0)
729
730 #define device_create_file_pwmenable(client, offset) \
731 do { \
732 device_create_file(&client->dev, &sensor_dev_attr_pwm##offset##_enable.dev_attr); \
733 } while (0)
734
735
736 static ssize_t
737 show_pwm_mode(struct device *dev, struct device_attribute *attr,
738 char *buf)
739 {
740 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
741 int nr = sensor_attr->index;
742 struct w83792d_data *data = w83792d_update_device(dev);
743 return sprintf(buf, "%d\n", data->pwm_mode[nr-1]);
744 }
745
746 static ssize_t
747 store_pwm_mode(struct device *dev, struct device_attribute *attr,
748 const char *buf, size_t count)
749 {
750 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
751 int nr = sensor_attr->index - 1;
752 struct i2c_client *client = to_i2c_client(dev);
753 struct w83792d_data *data = i2c_get_clientdata(client);
754 u32 val;
755 u8 pwm_mode_mask = 0;
756
757 val = simple_strtoul(buf, NULL, 10);
758 data->pwm_mode[nr] = SENSORS_LIMIT(val, 0, 1);
759 pwm_mode_mask = w83792d_read_value(client,
760 W83792D_REG_PWM[nr]) & 0x7f;
761 w83792d_write_value(client, W83792D_REG_PWM[nr],
762 ((data->pwm_mode[nr]) << 7) | pwm_mode_mask);
763
764 return count;
765 }
766
767 #define sysfs_pwm_mode(offset) \
768 static SENSOR_DEVICE_ATTR(pwm##offset##_mode, S_IRUGO | S_IWUSR, \
769 show_pwm_mode, store_pwm_mode, offset);
770
771 sysfs_pwm_mode(1);
772 sysfs_pwm_mode(2);
773 sysfs_pwm_mode(3);
774
775 #define device_create_file_pwm_mode(client, offset) \
776 do { \
777 device_create_file(&client->dev, &sensor_dev_attr_pwm##offset##_mode.dev_attr); \
778 } while (0)
779
780
781 static ssize_t
782 show_regs_chassis(struct device *dev, struct device_attribute *attr,
783 char *buf)
784 {
785 struct w83792d_data *data = w83792d_update_device(dev);
786 return sprintf(buf, "%d\n", data->chassis);
787 }
788
789 static DEVICE_ATTR(chassis, S_IRUGO, show_regs_chassis, NULL);
790
791 #define device_create_file_chassis(client) \
792 do { \
793 device_create_file(&client->dev, &dev_attr_chassis); \
794 } while (0)
795
796
797 static ssize_t
798 show_chassis_clear(struct device *dev, struct device_attribute *attr, char *buf)
799 {
800 struct w83792d_data *data = w83792d_update_device(dev);
801 return sprintf(buf, "%d\n", data->chassis_clear);
802 }
803
804 static ssize_t
805 store_chassis_clear(struct device *dev, struct device_attribute *attr,
806 const char *buf, size_t count)
807 {
808 struct i2c_client *client = to_i2c_client(dev);
809 struct w83792d_data *data = i2c_get_clientdata(client);
810 u32 val;
811 u8 temp1 = 0, temp2 = 0;
812
813 val = simple_strtoul(buf, NULL, 10);
814
815 data->chassis_clear = SENSORS_LIMIT(val, 0 ,1);
816 temp1 = ((data->chassis_clear) << 7) & 0x80;
817 temp2 = w83792d_read_value(client,
818 W83792D_REG_CHASSIS_CLR) & 0x7f;
819 w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2);
820
821 return count;
822 }
823
824 static DEVICE_ATTR(chassis_clear, S_IRUGO | S_IWUSR,
825 show_chassis_clear, store_chassis_clear);
826
827 #define device_create_file_chassis_clear(client) \
828 do { \
829 device_create_file(&client->dev, &dev_attr_chassis_clear); \
830 } while (0)
831
832
833
834 /* For Smart Fan I / Thermal Cruise */
835 static ssize_t
836 show_thermal_cruise(struct device *dev, struct device_attribute *attr,
837 char *buf)
838 {
839 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
840 int nr = sensor_attr->index;
841 struct w83792d_data *data = w83792d_update_device(dev);
842 return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
843 }
844
845 static ssize_t
846 store_thermal_cruise(struct device *dev, struct device_attribute *attr,
847 const char *buf, size_t count)
848 {
849 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
850 int nr = sensor_attr->index - 1;
851 struct i2c_client *client = to_i2c_client(dev);
852 struct w83792d_data *data = i2c_get_clientdata(client);
853 u32 val;
854 u8 target_tmp=0, target_mask=0;
855
856 val = simple_strtoul(buf, NULL, 10);
857 target_tmp = val;
858 target_tmp = target_tmp & 0x7f;
859 target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80;
860 data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255);
861 w83792d_write_value(client, W83792D_REG_THERMAL[nr],
862 (data->thermal_cruise[nr]) | target_mask);
863
864 return count;
865 }
866
867 #define sysfs_thermal_cruise(offset) \
868 static SENSOR_DEVICE_ATTR(thermal_cruise##offset, S_IRUGO | S_IWUSR, \
869 show_thermal_cruise, store_thermal_cruise, offset);
870
871 sysfs_thermal_cruise(1);
872 sysfs_thermal_cruise(2);
873 sysfs_thermal_cruise(3);
874
875 #define device_create_file_thermal_cruise(client, offset) \
876 do { \
877 device_create_file(&client->dev, \
878 &sensor_dev_attr_thermal_cruise##offset.dev_attr); \
879 } while (0)
880
881
882 /* For Smart Fan I/Thermal Cruise and Smart Fan II */
883 static ssize_t
884 show_tolerance(struct device *dev, struct device_attribute *attr,
885 char *buf)
886 {
887 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
888 int nr = sensor_attr->index;
889 struct w83792d_data *data = w83792d_update_device(dev);
890 return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
891 }
892
893 static ssize_t
894 store_tolerance(struct device *dev, struct device_attribute *attr,
895 const char *buf, size_t count)
896 {
897 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
898 int nr = sensor_attr->index - 1;
899 struct i2c_client *client = to_i2c_client(dev);
900 struct w83792d_data *data = i2c_get_clientdata(client);
901 u32 val;
902 u8 tol_tmp, tol_mask;
903
904 val = simple_strtoul(buf, NULL, 10);
905 tol_mask = w83792d_read_value(client,
906 W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
907 tol_tmp = SENSORS_LIMIT(val, 0, 15);
908 tol_tmp &= 0x0f;
909 data->tolerance[nr] = tol_tmp;
910 if (nr == 1) {
911 tol_tmp <<= 4;
912 }
913 w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
914 tol_mask | tol_tmp);
915
916 return count;
917 }
918
919 #define sysfs_tolerance(offset) \
920 static SENSOR_DEVICE_ATTR(tolerance##offset, S_IRUGO | S_IWUSR, \
921 show_tolerance, store_tolerance, offset);
922
923 sysfs_tolerance(1);
924 sysfs_tolerance(2);
925 sysfs_tolerance(3);
926
927 #define device_create_file_tolerance(client, offset) \
928 do { \
929 device_create_file(&client->dev, &sensor_dev_attr_tolerance##offset.dev_attr); \
930 } while (0)
931
932
933 /* For Smart Fan II */
934 static ssize_t
935 show_sf2_point(struct device *dev, struct device_attribute *attr,
936 char *buf)
937 {
938 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
939 int nr = sensor_attr->nr;
940 int index = sensor_attr->index;
941 struct w83792d_data *data = w83792d_update_device(dev);
942 return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
943 }
944
945 static ssize_t
946 store_sf2_point(struct device *dev, struct device_attribute *attr,
947 const char *buf, size_t count)
948 {
949 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
950 int nr = sensor_attr->nr - 1;
951 int index = sensor_attr->index - 1;
952 struct i2c_client *client = to_i2c_client(dev);
953 struct w83792d_data *data = i2c_get_clientdata(client);
954 u32 val;
955 u8 mask_tmp = 0;
956
957 val = simple_strtoul(buf, NULL, 10);
958 data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127);
959 mask_tmp = w83792d_read_value(client,
960 W83792D_REG_POINTS[index][nr]) & 0x80;
961 w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
962 mask_tmp|data->sf2_points[index][nr]);
963
964 return count;
965 }
966
967 #define sysfs_sf2_point(offset, index) \
968 static SENSOR_DEVICE_ATTR_2(sf2_point##offset##_fan##index, S_IRUGO | S_IWUSR, \
969 show_sf2_point, store_sf2_point, offset, index);
970
971 sysfs_sf2_point(1, 1); /* Fan1 */
972 sysfs_sf2_point(2, 1); /* Fan1 */
973 sysfs_sf2_point(3, 1); /* Fan1 */
974 sysfs_sf2_point(4, 1); /* Fan1 */
975 sysfs_sf2_point(1, 2); /* Fan2 */
976 sysfs_sf2_point(2, 2); /* Fan2 */
977 sysfs_sf2_point(3, 2); /* Fan2 */
978 sysfs_sf2_point(4, 2); /* Fan2 */
979 sysfs_sf2_point(1, 3); /* Fan3 */
980 sysfs_sf2_point(2, 3); /* Fan3 */
981 sysfs_sf2_point(3, 3); /* Fan3 */
982 sysfs_sf2_point(4, 3); /* Fan3 */
983
984 #define device_create_file_sf2_point(client, offset, index) \
985 do { \
986 device_create_file(&client->dev, \
987 &sensor_dev_attr_sf2_point##offset##_fan##index.dev_attr); \
988 } while (0)
989
990
991 static ssize_t
992 show_sf2_level(struct device *dev, struct device_attribute *attr,
993 char *buf)
994 {
995 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
996 int nr = sensor_attr->nr;
997 int index = sensor_attr->index;
998 struct w83792d_data *data = w83792d_update_device(dev);
999 return sprintf(buf, "%d\n",
1000 (((data->sf2_levels[index-1][nr]) * 100) / 15));
1001 }
1002
1003 static ssize_t
1004 store_sf2_level(struct device *dev, struct device_attribute *attr,
1005 const char *buf, size_t count)
1006 {
1007 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
1008 int nr = sensor_attr->nr;
1009 int index = sensor_attr->index - 1;
1010 struct i2c_client *client = to_i2c_client(dev);
1011 struct w83792d_data *data = i2c_get_clientdata(client);
1012 u32 val;
1013 u8 mask_tmp=0, level_tmp=0;
1014
1015 val = simple_strtoul(buf, NULL, 10);
1016 data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15);
1017 mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
1018 & ((nr==3) ? 0xf0 : 0x0f);
1019 if (nr==3) {
1020 level_tmp = data->sf2_levels[index][nr];
1021 } else {
1022 level_tmp = data->sf2_levels[index][nr] << 4;
1023 }
1024 w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp);
1025
1026 return count;
1027 }
1028
1029 #define sysfs_sf2_level(offset, index) \
1030 static SENSOR_DEVICE_ATTR_2(sf2_level##offset##_fan##index, S_IRUGO | S_IWUSR, \
1031 show_sf2_level, store_sf2_level, offset, index);
1032
1033 sysfs_sf2_level(1, 1); /* Fan1 */
1034 sysfs_sf2_level(2, 1); /* Fan1 */
1035 sysfs_sf2_level(3, 1); /* Fan1 */
1036 sysfs_sf2_level(1, 2); /* Fan2 */
1037 sysfs_sf2_level(2, 2); /* Fan2 */
1038 sysfs_sf2_level(3, 2); /* Fan2 */
1039 sysfs_sf2_level(1, 3); /* Fan3 */
1040 sysfs_sf2_level(2, 3); /* Fan3 */
1041 sysfs_sf2_level(3, 3); /* Fan3 */
1042
1043 #define device_create_file_sf2_level(client, offset, index) \
1044 do { \
1045 device_create_file(&client->dev, \
1046 &sensor_dev_attr_sf2_level##offset##_fan##index.dev_attr); \
1047 } while (0)
1048
1049
1050 /* This function is called when:
1051 * w83792d_driver is inserted (when this module is loaded), for each
1052 available adapter
1053 * when a new adapter is inserted (and w83792d_driver is still present) */
1054 static int
1055 w83792d_attach_adapter(struct i2c_adapter *adapter)
1056 {
1057 if (!(adapter->class & I2C_CLASS_HWMON))
1058 return 0;
1059 return i2c_probe(adapter, &addr_data, w83792d_detect);
1060 }
1061
1062
1063 static int
1064 w83792d_create_subclient(struct i2c_adapter *adapter,
1065 struct i2c_client *new_client, int addr,
1066 struct i2c_client **sub_cli)
1067 {
1068 int err;
1069 struct i2c_client *sub_client;
1070
1071 (*sub_cli) = sub_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1072 if (!(sub_client)) {
1073 return -ENOMEM;
1074 }
1075 sub_client->addr = 0x48 + addr;
1076 i2c_set_clientdata(sub_client, NULL);
1077 sub_client->adapter = adapter;
1078 sub_client->driver = &w83792d_driver;
1079 sub_client->flags = 0;
1080 strlcpy(sub_client->name, "w83792d subclient", I2C_NAME_SIZE);
1081 if ((err = i2c_attach_client(sub_client))) {
1082 dev_err(&new_client->dev, "subclient registration "
1083 "at address 0x%x failed\n", sub_client->addr);
1084 kfree(sub_client);
1085 return err;
1086 }
1087 return 0;
1088 }
1089
1090
1091 static int
1092 w83792d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
1093 struct i2c_client *new_client)
1094 {
1095 int i, id, err;
1096 u8 val;
1097 struct w83792d_data *data = i2c_get_clientdata(new_client);
1098
1099 id = i2c_adapter_id(adapter);
1100 if (force_subclients[0] == id && force_subclients[1] == address) {
1101 for (i = 2; i <= 3; i++) {
1102 if (force_subclients[i] < 0x48 ||
1103 force_subclients[i] > 0x4f) {
1104 dev_err(&new_client->dev, "invalid subclient "
1105 "address %d; must be 0x48-0x4f\n",
1106 force_subclients[i]);
1107 err = -ENODEV;
1108 goto ERROR_SC_0;
1109 }
1110 }
1111 w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
1112 (force_subclients[2] & 0x07) |
1113 ((force_subclients[3] & 0x07) << 4));
1114 }
1115
1116 val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
1117 if (!(val & 0x08)) {
1118 err = w83792d_create_subclient(adapter, new_client, val & 0x7,
1119 &data->lm75[0]);
1120 if (err < 0)
1121 goto ERROR_SC_0;
1122 }
1123 if (!(val & 0x80)) {
1124 if ((data->lm75[0] != NULL) &&
1125 ((val & 0x7) == ((val >> 4) & 0x7))) {
1126 dev_err(&new_client->dev, "duplicate addresses 0x%x, "
1127 "use force_subclient\n", data->lm75[0]->addr);
1128 err = -ENODEV;
1129 goto ERROR_SC_1;
1130 }
1131 err = w83792d_create_subclient(adapter, new_client,
1132 (val >> 4) & 0x7, &data->lm75[1]);
1133 if (err < 0)
1134 goto ERROR_SC_1;
1135 }
1136
1137 return 0;
1138
1139 /* Undo inits in case of errors */
1140
1141 ERROR_SC_1:
1142 if (data->lm75[0] != NULL) {
1143 i2c_detach_client(data->lm75[0]);
1144 kfree(data->lm75[0]);
1145 }
1146 ERROR_SC_0:
1147 return err;
1148 }
1149
1150
1151 static int
1152 w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
1153 {
1154 int i = 0, val1 = 0, val2;
1155 struct i2c_client *new_client;
1156 struct w83792d_data *data;
1157 int err = 0;
1158 const char *client_name = "";
1159
1160 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1161 goto ERROR0;
1162 }
1163
1164 /* OK. For now, we presume we have a valid client. We now create the
1165 client structure, even though we cannot fill it completely yet.
1166 But it allows us to access w83792d_{read,write}_value. */
1167
1168 if (!(data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL))) {
1169 err = -ENOMEM;
1170 goto ERROR0;
1171 }
1172
1173 new_client = &data->client;
1174 i2c_set_clientdata(new_client, data);
1175 new_client->addr = address;
1176 new_client->adapter = adapter;
1177 new_client->driver = &w83792d_driver;
1178 new_client->flags = 0;
1179
1180 /* Now, we do the remaining detection. */
1181
1182 /* The w83792d may be stuck in some other bank than bank 0. This may
1183 make reading other information impossible. Specify a force=... or
1184 force_*=... parameter, and the Winbond will be reset to the right
1185 bank. */
1186 if (kind < 0) {
1187 if (w83792d_read_value(new_client, W83792D_REG_CONFIG) & 0x80) {
1188 dev_warn(&new_client->dev, "Detection failed at step "
1189 "3\n");
1190 goto ERROR1;
1191 }
1192 val1 = w83792d_read_value(new_client, W83792D_REG_BANK);
1193 val2 = w83792d_read_value(new_client, W83792D_REG_CHIPMAN);
1194 /* Check for Winbond ID if in bank 0 */
1195 if (!(val1 & 0x07)) { /* is Bank0 */
1196 if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
1197 ((val1 & 0x80) && (val2 != 0x5c))) {
1198 goto ERROR1;
1199 }
1200 }
1201 /* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
1202 should match */
1203 if (w83792d_read_value(new_client,
1204 W83792D_REG_I2C_ADDR) != address) {
1205 dev_warn(&new_client->dev, "Detection failed "
1206 "at step 5\n");
1207 goto ERROR1;
1208 }
1209 }
1210
1211 /* We have either had a force parameter, or we have already detected the
1212 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1213 w83792d_write_value(new_client,
1214 W83792D_REG_BANK,
1215 (w83792d_read_value(new_client,
1216 W83792D_REG_BANK) & 0x78) | 0x80);
1217
1218 /* Determine the chip type. */
1219 if (kind <= 0) {
1220 /* get vendor ID */
1221 val2 = w83792d_read_value(new_client, W83792D_REG_CHIPMAN);
1222 if (val2 != 0x5c) { /* the vendor is NOT Winbond */
1223 goto ERROR1;
1224 }
1225 val1 = w83792d_read_value(new_client, W83792D_REG_WCHIPID);
1226 if (val1 == 0x7a) {
1227 kind = w83792d;
1228 } else {
1229 if (kind == 0)
1230 dev_warn(&new_client->dev,
1231 "w83792d: Ignoring 'force' parameter for"
1232 " unknown chip at adapter %d, address"
1233 " 0x%02x\n", i2c_adapter_id(adapter),
1234 address);
1235 goto ERROR1;
1236 }
1237 }
1238
1239 if (kind == w83792d) {
1240 client_name = "w83792d";
1241 } else {
1242 dev_err(&new_client->dev, "w83792d: Internal error: unknown"
1243 " kind (%d)?!?", kind);
1244 goto ERROR1;
1245 }
1246
1247 /* Fill in the remaining client fields and put into the global list */
1248 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1249 data->type = kind;
1250
1251 data->valid = 0;
1252 init_MUTEX(&data->update_lock);
1253
1254 /* Tell the I2C layer a new client has arrived */
1255 if ((err = i2c_attach_client(new_client)))
1256 goto ERROR1;
1257
1258 if ((err = w83792d_detect_subclients(adapter, address,
1259 kind, new_client)))
1260 goto ERROR2;
1261
1262 /* Initialize the chip */
1263 w83792d_init_client(new_client);
1264
1265 /* A few vars need to be filled upon startup */
1266 for (i = 0; i < 7; i++) {
1267 data->fan_min[i] = w83792d_read_value(new_client,
1268 W83792D_REG_FAN_MIN[i]);
1269 }
1270
1271 /* Register sysfs hooks */
1272 data->class_dev = hwmon_device_register(&new_client->dev);
1273 if (IS_ERR(data->class_dev)) {
1274 err = PTR_ERR(data->class_dev);
1275 goto ERROR3;
1276 }
1277 device_create_file_in(new_client, 0);
1278 device_create_file_in(new_client, 1);
1279 device_create_file_in(new_client, 2);
1280 device_create_file_in(new_client, 3);
1281 device_create_file_in(new_client, 4);
1282 device_create_file_in(new_client, 5);
1283 device_create_file_in(new_client, 6);
1284 device_create_file_in(new_client, 7);
1285 device_create_file_in(new_client, 8);
1286
1287 device_create_file_fan(new_client, 1);
1288 device_create_file_fan(new_client, 2);
1289 device_create_file_fan(new_client, 3);
1290
1291 /* Read GPIO enable register to check if pins for fan 4,5 are used as
1292 GPIO */
1293 val1 = w83792d_read_value(new_client, W83792D_REG_GPIO_EN);
1294 if (!(val1 & 0x40))
1295 device_create_file_fan(new_client, 4);
1296 if (!(val1 & 0x20))
1297 device_create_file_fan(new_client, 5);
1298
1299 val1 = w83792d_read_value(new_client, W83792D_REG_PIN);
1300 if (val1 & 0x40)
1301 device_create_file_fan(new_client, 6);
1302 if (val1 & 0x04)
1303 device_create_file_fan(new_client, 7);
1304
1305 device_create_file_temp1(new_client); /* Temp1 */
1306 device_create_file_temp_add(new_client, 2); /* Temp2 */
1307 device_create_file_temp_add(new_client, 3); /* Temp3 */
1308
1309 device_create_file_alarms(new_client);
1310
1311 device_create_file_pwm(new_client, 1);
1312 device_create_file_pwm(new_client, 2);
1313 device_create_file_pwm(new_client, 3);
1314
1315 device_create_file_pwmenable(new_client, 1);
1316 device_create_file_pwmenable(new_client, 2);
1317 device_create_file_pwmenable(new_client, 3);
1318
1319 device_create_file_pwm_mode(new_client, 1);
1320 device_create_file_pwm_mode(new_client, 2);
1321 device_create_file_pwm_mode(new_client, 3);
1322
1323 device_create_file_chassis(new_client);
1324 device_create_file_chassis_clear(new_client);
1325
1326 device_create_file_thermal_cruise(new_client, 1);
1327 device_create_file_thermal_cruise(new_client, 2);
1328 device_create_file_thermal_cruise(new_client, 3);
1329
1330 device_create_file_tolerance(new_client, 1);
1331 device_create_file_tolerance(new_client, 2);
1332 device_create_file_tolerance(new_client, 3);
1333
1334 device_create_file_sf2_point(new_client, 1, 1); /* Fan1 */
1335 device_create_file_sf2_point(new_client, 2, 1); /* Fan1 */
1336 device_create_file_sf2_point(new_client, 3, 1); /* Fan1 */
1337 device_create_file_sf2_point(new_client, 4, 1); /* Fan1 */
1338 device_create_file_sf2_point(new_client, 1, 2); /* Fan2 */
1339 device_create_file_sf2_point(new_client, 2, 2); /* Fan2 */
1340 device_create_file_sf2_point(new_client, 3, 2); /* Fan2 */
1341 device_create_file_sf2_point(new_client, 4, 2); /* Fan2 */
1342 device_create_file_sf2_point(new_client, 1, 3); /* Fan3 */
1343 device_create_file_sf2_point(new_client, 2, 3); /* Fan3 */
1344 device_create_file_sf2_point(new_client, 3, 3); /* Fan3 */
1345 device_create_file_sf2_point(new_client, 4, 3); /* Fan3 */
1346
1347 device_create_file_sf2_level(new_client, 1, 1); /* Fan1 */
1348 device_create_file_sf2_level(new_client, 2, 1); /* Fan1 */
1349 device_create_file_sf2_level(new_client, 3, 1); /* Fan1 */
1350 device_create_file_sf2_level(new_client, 1, 2); /* Fan2 */
1351 device_create_file_sf2_level(new_client, 2, 2); /* Fan2 */
1352 device_create_file_sf2_level(new_client, 3, 2); /* Fan2 */
1353 device_create_file_sf2_level(new_client, 1, 3); /* Fan3 */
1354 device_create_file_sf2_level(new_client, 2, 3); /* Fan3 */
1355 device_create_file_sf2_level(new_client, 3, 3); /* Fan3 */
1356
1357 return 0;
1358
1359 ERROR3:
1360 if (data->lm75[0] != NULL) {
1361 i2c_detach_client(data->lm75[0]);
1362 kfree(data->lm75[0]);
1363 }
1364 if (data->lm75[1] != NULL) {
1365 i2c_detach_client(data->lm75[1]);
1366 kfree(data->lm75[1]);
1367 }
1368 ERROR2:
1369 i2c_detach_client(new_client);
1370 ERROR1:
1371 kfree(data);
1372 ERROR0:
1373 return err;
1374 }
1375
1376 static int
1377 w83792d_detach_client(struct i2c_client *client)
1378 {
1379 struct w83792d_data *data = i2c_get_clientdata(client);
1380 int err;
1381
1382 /* main client */
1383 if (data)
1384 hwmon_device_unregister(data->class_dev);
1385
1386 if ((err = i2c_detach_client(client)))
1387 return err;
1388
1389 /* main client */
1390 if (data)
1391 kfree(data);
1392 /* subclient */
1393 else
1394 kfree(client);
1395
1396 return 0;
1397 }
1398
1399 static void
1400 w83792d_init_client(struct i2c_client *client)
1401 {
1402 u8 temp2_cfg, temp3_cfg, vid_in_b;
1403
1404 if (init) {
1405 w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
1406 }
1407 /* Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
1408 W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
1409 vin0/vin1 can be modified by user;
1410 W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
1411 vin0/vin1 auto-updated, can NOT be modified by user. */
1412 vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
1413 w83792d_write_value(client, W83792D_REG_VID_IN_B,
1414 vid_in_b & 0xbf);
1415
1416 temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
1417 temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
1418 w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
1419 temp2_cfg & 0xe6);
1420 w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
1421 temp3_cfg & 0xe6);
1422
1423 /* Start monitoring */
1424 w83792d_write_value(client, W83792D_REG_CONFIG,
1425 (w83792d_read_value(client,
1426 W83792D_REG_CONFIG) & 0xf7)
1427 | 0x01);
1428 }
1429
1430 static struct w83792d_data *w83792d_update_device(struct device *dev)
1431 {
1432 struct i2c_client *client = to_i2c_client(dev);
1433 struct w83792d_data *data = i2c_get_clientdata(client);
1434 int i, j;
1435 u8 reg_array_tmp[4], pwm_array_tmp[7], reg_tmp;
1436
1437 down(&data->update_lock);
1438
1439 if (time_after
1440 (jiffies - data->last_updated, (unsigned long) (HZ * 3))
1441 || time_before(jiffies, data->last_updated) || !data->valid) {
1442 dev_dbg(dev, "Starting device update\n");
1443
1444 /* Update the voltages measured value and limits */
1445 for (i = 0; i < 9; i++) {
1446 data->in[i] = w83792d_read_value(client,
1447 W83792D_REG_IN[i]);
1448 data->in_max[i] = w83792d_read_value(client,
1449 W83792D_REG_IN_MAX[i]);
1450 data->in_min[i] = w83792d_read_value(client,
1451 W83792D_REG_IN_MIN[i]);
1452 }
1453 data->low_bits = w83792d_read_value(client,
1454 W83792D_REG_LOW_BITS1) +
1455 (w83792d_read_value(client,
1456 W83792D_REG_LOW_BITS2) << 8);
1457 for (i = 0; i < 7; i++) {
1458 /* Update the Fan measured value and limits */
1459 data->fan[i] = w83792d_read_value(client,
1460 W83792D_REG_FAN[i]);
1461 data->fan_min[i] = w83792d_read_value(client,
1462 W83792D_REG_FAN_MIN[i]);
1463 /* Update the PWM/DC Value and PWM/DC flag */
1464 pwm_array_tmp[i] = w83792d_read_value(client,
1465 W83792D_REG_PWM[i]);
1466 data->pwm[i] = pwm_array_tmp[i] & 0x0f;
1467 data->pwm_mode[i] = pwm_array_tmp[i] >> 7;
1468 }
1469
1470 reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
1471 data->pwmenable[0] = reg_tmp & 0x03;
1472 data->pwmenable[1] = (reg_tmp>>2) & 0x03;
1473 data->pwmenable[2] = (reg_tmp>>4) & 0x03;
1474
1475 for (i = 0; i < 3; i++) {
1476 data->temp1[i] = w83792d_read_value(client,
1477 W83792D_REG_TEMP1[i]);
1478 }
1479 for (i = 0; i < 2; i++) {
1480 for (j = 0; j < 6; j++) {
1481 data->temp_add[i][j] = w83792d_read_value(
1482 client,W83792D_REG_TEMP_ADD[i][j]);
1483 }
1484 }
1485
1486 /* Update the Fan Divisor */
1487 for (i = 0; i < 4; i++) {
1488 reg_array_tmp[i] = w83792d_read_value(client,
1489 W83792D_REG_FAN_DIV[i]);
1490 }
1491 data->fan_div[0] = reg_array_tmp[0] & 0x07;
1492 data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
1493 data->fan_div[2] = reg_array_tmp[1] & 0x07;
1494 data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
1495 data->fan_div[4] = reg_array_tmp[2] & 0x07;
1496 data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
1497 data->fan_div[6] = reg_array_tmp[3] & 0x07;
1498
1499 /* Update the realtime status */
1500 data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
1501 (w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
1502 (w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
1503
1504 /* Update CaseOpen status and it's CLR_CHS. */
1505 data->chassis = (w83792d_read_value(client,
1506 W83792D_REG_CHASSIS) >> 5) & 0x01;
1507 data->chassis_clear = (w83792d_read_value(client,
1508 W83792D_REG_CHASSIS_CLR) >> 7) & 0x01;
1509
1510 /* Update Thermal Cruise/Smart Fan I target value */
1511 for (i = 0; i < 3; i++) {
1512 data->thermal_cruise[i] =
1513 w83792d_read_value(client,
1514 W83792D_REG_THERMAL[i]) & 0x7f;
1515 }
1516
1517 /* Update Smart Fan I/II tolerance */
1518 reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
1519 data->tolerance[0] = reg_tmp & 0x0f;
1520 data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
1521 data->tolerance[2] = w83792d_read_value(client,
1522 W83792D_REG_TOLERANCE[2]) & 0x0f;
1523
1524 /* Update Smart Fan II temperature points */
1525 for (i = 0; i < 3; i++) {
1526 for (j = 0; j < 4; j++) {
1527 data->sf2_points[i][j] = w83792d_read_value(
1528 client,W83792D_REG_POINTS[i][j]) & 0x7f;
1529 }
1530 }
1531
1532 /* Update Smart Fan II duty cycle levels */
1533 for (i = 0; i < 3; i++) {
1534 reg_tmp = w83792d_read_value(client,
1535 W83792D_REG_LEVELS[i][0]);
1536 data->sf2_levels[i][0] = reg_tmp & 0x0f;
1537 data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
1538 reg_tmp = w83792d_read_value(client,
1539 W83792D_REG_LEVELS[i][2]);
1540 data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
1541 data->sf2_levels[i][3] = reg_tmp & 0x0f;
1542 }
1543
1544 data->last_updated = jiffies;
1545 data->valid = 1;
1546 }
1547
1548 up(&data->update_lock);
1549
1550 #ifdef DEBUG
1551 w83792d_print_debug(data, dev);
1552 #endif
1553
1554 return data;
1555 }
1556
1557 #ifdef DEBUG
1558 static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
1559 {
1560 int i=0, j=0;
1561 dev_dbg(dev, "==========The following is the debug message...========\n");
1562 dev_dbg(dev, "9 set of Voltages: =====>\n");
1563 for (i=0; i<9; i++) {
1564 dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
1565 dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
1566 dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
1567 }
1568 dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
1569 dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
1570 dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
1571 for (i=0; i<7; i++) {
1572 dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
1573 dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
1574 dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
1575 dev_dbg(dev, "pwm_mode[%d] is: 0x%x\n", i, data->pwm_mode[i]);
1576 }
1577 dev_dbg(dev, "3 set of Temperatures: =====>\n");
1578 for (i=0; i<3; i++) {
1579 dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
1580 }
1581
1582 for (i=0; i<2; i++) {
1583 for (j=0; j<6; j++) {
1584 dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
1585 data->temp_add[i][j]);
1586 }
1587 }
1588
1589 for (i=0; i<7; i++) {
1590 dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
1591 }
1592 dev_dbg(dev, "==========End of the debug message...==================\n");
1593 dev_dbg(dev, "\n");
1594 }
1595 #endif
1596
1597 static int __init
1598 sensors_w83792d_init(void)
1599 {
1600 return i2c_add_driver(&w83792d_driver);
1601 }
1602
1603 static void __exit
1604 sensors_w83792d_exit(void)
1605 {
1606 i2c_del_driver(&w83792d_driver);
1607 }
1608
1609 MODULE_AUTHOR("Chunhao Huang @ Winbond <DZShen@Winbond.com.tw>");
1610 MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
1611 MODULE_LICENSE("GPL");
1612
1613 module_init(sensors_w83792d_init);
1614 module_exit(sensors_w83792d_exit);
1615
Linux with added FPC-III support