4 #include <linux/config.h>
8 #include <linux/i2c-id.h>
9 #include <linux/i2c-algo-bit.h>
13 /* GGI compatibility macros */
14 #define NUM_SEQ_REGS 0x05
15 #define NUM_CRT_REGS 0x41
16 #define NUM_GRC_REGS 0x09
17 #define NUM_ATC_REGS 0x15
20 #define DDC_SCL_READ_MASK (1 << 2)
21 #define DDC_SCL_WRITE_MASK (1 << 5)
22 #define DDC_SDA_READ_MASK (1 << 3)
23 #define DDC_SDA_WRITE_MASK (1 << 4)
25 /* holds the state of the VGA core and extended Riva hw state from riva_hw.c.
26 * From KGI originally. */
28 u8 attr
[NUM_ATC_REGS
];
29 u8 crtc
[NUM_CRT_REGS
];
38 struct riva_i2c_chan
{
40 unsigned long ddc_base
;
41 struct i2c_adapter adapter
;
42 struct i2c_algo_bit_data algo
;
46 RIVA_HW_INST riva
; /* interface to riva_hw.c */
47 u32 pseudo_palette
[16]; /* default palette */
48 u32 palette
[16]; /* for Riva128 */
49 u8 __iomem
*ctrl_base
; /* virtual control register base addr */
50 unsigned dclk_max
; /* max DCLK */
52 struct riva_regs initial_state
; /* initial startup video mode */
53 struct riva_regs current_state
;
55 struct vgastate state
;
67 struct { int vram
; int vram_valid
; } mtrr
;
69 struct riva_i2c_chan chan
[3];
72 void riva_common_setup(struct riva_par
*);
73 unsigned long riva_get_memlen(struct riva_par
*);
74 unsigned long riva_get_maxdclk(struct riva_par
*);
75 void riva_delete_i2c_busses(struct riva_par
*par
);
76 void riva_create_i2c_busses(struct riva_par
*par
);
77 int riva_probe_i2c_connector(struct riva_par
*par
, int conn
, u8
**out_edid
);
79 #endif /* __RIVAFB_H */